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path: root/lib/Target/ARM/A15SDOptimizer.cpp
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Diffstat (limited to 'lib/Target/ARM/A15SDOptimizer.cpp')
-rw-r--r--lib/Target/ARM/A15SDOptimizer.cpp24
1 files changed, 10 insertions, 14 deletions
diff --git a/lib/Target/ARM/A15SDOptimizer.cpp b/lib/Target/ARM/A15SDOptimizer.cpp
index 89859ba063d9..8640c873f441 100644
--- a/lib/Target/ARM/A15SDOptimizer.cpp
+++ b/lib/Target/ARM/A15SDOptimizer.cpp
@@ -427,13 +427,11 @@ unsigned A15SDOptimizer::createDupLane(MachineBasicBlock &MBB,
unsigned Lane, bool QPR) {
unsigned Out = MRI->createVirtualRegister(QPR ? &ARM::QPRRegClass :
&ARM::DPRRegClass);
- AddDefaultPred(BuildMI(MBB,
- InsertBefore,
- DL,
- TII->get(QPR ? ARM::VDUPLN32q : ARM::VDUPLN32d),
- Out)
- .addReg(Reg)
- .addImm(Lane));
+ BuildMI(MBB, InsertBefore, DL,
+ TII->get(QPR ? ARM::VDUPLN32q : ARM::VDUPLN32d), Out)
+ .addReg(Reg)
+ .addImm(Lane)
+ .add(predOps(ARMCC::AL));
return Out;
}
@@ -476,13 +474,11 @@ unsigned A15SDOptimizer::createVExt(MachineBasicBlock &MBB,
const DebugLoc &DL, unsigned Ssub0,
unsigned Ssub1) {
unsigned Out = MRI->createVirtualRegister(&ARM::DPRRegClass);
- AddDefaultPred(BuildMI(MBB,
- InsertBefore,
- DL,
- TII->get(ARM::VEXTd32), Out)
- .addReg(Ssub0)
- .addReg(Ssub1)
- .addImm(1));
+ BuildMI(MBB, InsertBefore, DL, TII->get(ARM::VEXTd32), Out)
+ .addReg(Ssub0)
+ .addReg(Ssub1)
+ .addImm(1)
+ .add(predOps(ARMCC::AL));
return Out;
}