diff options
Diffstat (limited to 'lib/Target/Mips/MipsInstrInfo.h')
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.h | 45 | 
1 files changed, 45 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.h b/lib/Target/Mips/MipsInstrInfo.h index aca2bc7ae98d..8c05d97beac2 100644 --- a/lib/Target/Mips/MipsInstrInfo.h +++ b/lib/Target/Mips/MipsInstrInfo.h @@ -31,6 +31,15 @@ protected:    unsigned UncondBrOpc;  public: +  enum BranchType { +    BT_None,       // Couldn't analyze branch. +    BT_NoBranch,   // No branches found. +    BT_Uncond,     // One unconditional branch. +    BT_Cond,       // One conditional branch. +    BT_CondUncond, // A conditional branch followed by an unconditional branch. +    BT_Indirect    // One indirct branch. +  }; +    explicit MipsInstrInfo(MipsTargetMachine &TM, unsigned UncondBrOpc);    static const MipsInstrInfo *create(MipsTargetMachine &TM); @@ -51,6 +60,12 @@ public:    virtual    bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; +  BranchType AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, +                           MachineBasicBlock *&FBB, +                           SmallVectorImpl<MachineOperand> &Cond, +                           bool AllowModify, +                           SmallVectorImpl<MachineInstr*> &BranchInstrs) const; +    virtual MachineInstr* emitFrameIndexDebugValue(MachineFunction &MF,                                                   int FrameIx, uint64_t Offset,                                                   const MDNode *MDPtr, @@ -71,6 +86,36 @@ public:    /// Return the number of bytes of code the specified instruction may be.    unsigned GetInstSizeInBytes(const MachineInstr *MI) const; +  virtual void storeRegToStackSlot(MachineBasicBlock &MBB, +                                   MachineBasicBlock::iterator MBBI, +                                   unsigned SrcReg, bool isKill, int FrameIndex, +                                   const TargetRegisterClass *RC, +                                   const TargetRegisterInfo *TRI) const { +    storeRegToStack(MBB, MBBI, SrcReg, isKill, FrameIndex, RC, TRI, 0); +  } + +  virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, +                                    MachineBasicBlock::iterator MBBI, +                                    unsigned DestReg, int FrameIndex, +                                    const TargetRegisterClass *RC, +                                    const TargetRegisterInfo *TRI) const { +    loadRegFromStack(MBB, MBBI, DestReg, FrameIndex, RC, TRI, 0); +  } + +  virtual void storeRegToStack(MachineBasicBlock &MBB, +                               MachineBasicBlock::iterator MI, +                               unsigned SrcReg, bool isKill, int FrameIndex, +                               const TargetRegisterClass *RC, +                               const TargetRegisterInfo *TRI, +                               int64_t Offset) const = 0; + +  virtual void loadRegFromStack(MachineBasicBlock &MBB, +                                MachineBasicBlock::iterator MI, +                                unsigned DestReg, int FrameIndex, +                                const TargetRegisterClass *RC, +                                const TargetRegisterInfo *TRI, +                                int64_t Offset) const = 0; +  protected:    bool isZeroImm(const MachineOperand &op) const;  | 
