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Diffstat (limited to 'lib/Target/Nios2/Nios2TargetMachine.cpp')
-rw-r--r--lib/Target/Nios2/Nios2TargetMachine.cpp91
1 files changed, 82 insertions, 9 deletions
diff --git a/lib/Target/Nios2/Nios2TargetMachine.cpp b/lib/Target/Nios2/Nios2TargetMachine.cpp
index 16d4eabcfaf7..b7594dde709d 100644
--- a/lib/Target/Nios2/Nios2TargetMachine.cpp
+++ b/lib/Target/Nios2/Nios2TargetMachine.cpp
@@ -13,6 +13,10 @@
#include "Nios2TargetMachine.h"
#include "Nios2.h"
+#include "Nios2TargetObjectFile.h"
+
+#include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
@@ -20,27 +24,96 @@ using namespace llvm;
extern "C" void LLVMInitializeNios2Target() {
// Register the target.
+ RegisterTargetMachine<Nios2TargetMachine> X(getTheNios2Target());
}
-static std::string computeDataLayout(const Triple &TT, StringRef CPU,
- const TargetOptions &Options) {
+static std::string computeDataLayout() {
return "e-p:32:32:32-i8:8:32-i16:16:32-n32";
}
-static Reloc::Model getEffectiveRelocModel(CodeModel::Model CM,
- Optional<Reloc::Model> RM) {
- if (!RM.hasValue() || CM == CodeModel::JITDefault)
+static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
+ if (!RM.hasValue())
return Reloc::Static;
return *RM;
}
+static CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM,
+ Reloc::Model RM, bool JIT) {
+ if (CM)
+ return *CM;
+ return CodeModel::Small;
+}
+
Nios2TargetMachine::Nios2TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
- CodeModel::Model CM,
- CodeGenOpt::Level OL)
- : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
- Options, getEffectiveRelocModel(CM, RM), CM, OL) {}
+ Optional<CodeModel::Model> CM,
+ CodeGenOpt::Level OL, bool JIT)
+ : LLVMTargetMachine(
+ T, computeDataLayout(), TT, CPU, FS, Options,
+ getEffectiveRelocModel(RM),
+ getEffectiveCodeModel(CM, getEffectiveRelocModel(RM), JIT), OL),
+ TLOF(make_unique<Nios2TargetObjectFile>()),
+ Subtarget(TT, CPU, FS, *this) {
+ initAsmInfo();
+}
Nios2TargetMachine::~Nios2TargetMachine() {}
+
+const Nios2Subtarget *
+Nios2TargetMachine::getSubtargetImpl(const Function &F) const {
+ Attribute CPUAttr = F.getFnAttribute("target-cpu");
+ Attribute FSAttr = F.getFnAttribute("target-features");
+
+ std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
+ ? CPUAttr.getValueAsString().str()
+ : TargetCPU;
+ std::string FS = !FSAttr.hasAttribute(Attribute::None)
+ ? FSAttr.getValueAsString().str()
+ : TargetFS;
+
+ auto &I = SubtargetMap[CPU + FS];
+ if (!I) {
+ // This needs to be done before we create a new subtarget since any
+ // creation will depend on the TM and the code generation flags on the
+ // function that reside in TargetOptions.
+ resetTargetOptions(F);
+ I = llvm::make_unique<Nios2Subtarget>(TargetTriple, CPU, FS, *this);
+ }
+ return I.get();
+}
+
+namespace {
+/// Nios2 Code Generator Pass Configuration Options.
+class Nios2PassConfig : public TargetPassConfig {
+public:
+ Nios2PassConfig(Nios2TargetMachine &TM, PassManagerBase *PM)
+ : TargetPassConfig(TM, *PM) {}
+
+ Nios2TargetMachine &getNios2TargetMachine() const {
+ return getTM<Nios2TargetMachine>();
+ }
+
+ void addCodeGenPrepare() override;
+ bool addInstSelector() override;
+ void addIRPasses() override;
+};
+} // namespace
+
+TargetPassConfig *Nios2TargetMachine::createPassConfig(PassManagerBase &PM) {
+ return new Nios2PassConfig(*this, &PM);
+}
+
+void Nios2PassConfig::addCodeGenPrepare() {
+ TargetPassConfig::addCodeGenPrepare();
+}
+
+void Nios2PassConfig::addIRPasses() { TargetPassConfig::addIRPasses(); }
+
+// Install an instruction selector pass using
+// the ISelDag to gen Nios2 code.
+bool Nios2PassConfig::addInstSelector() {
+ addPass(createNios2ISelDag(getNios2TargetMachine(), getOptLevel()));
+ return false;
+}