diff options
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrFormats.td')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrFormats.td | 72 |
1 files changed, 67 insertions, 5 deletions
diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index f2845415ecb5..f5f4b46344cf 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -46,6 +46,10 @@ class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin> bits<1> UseVSXReg = 0; let TSFlags{6} = UseVSXReg; + // Indicate that this instruction is of type X-Form Load or Store + bits<1> XFormMemOp = 0; + let TSFlags{7} = XFormMemOp; + // Fields used for relation models. string BaseName = ""; @@ -71,6 +75,7 @@ class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; } class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; } class UseVSXReg { bits<1> UseVSXReg = 1; } +class XFormMemOp { bits<1> XFormMemOp = 1; } // Two joined instructions; used to emit two adjacent instructions as one. // The itinerary from the first instruction is used for scheduling and @@ -109,6 +114,11 @@ class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr, bit Interpretation64Bit = 0; } +// Base class for all X-Form memory instructions +class IXFormMemOp<bits<6> opcode, dag OOL, dag IOL, string asmstr, + InstrItinClass itin> + :I<opcode, OOL, IOL, asmstr, itin>, XFormMemOp; + // 1.7.1 I-Form class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> @@ -437,6 +447,11 @@ class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asms let Inst{31} = RC; } +class XForm_base_r3xo_memOp<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, + string asmstr, InstrItinClass itin, + list<dag> pattern> + : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>, XFormMemOp; + class XForm_tlb<bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin> : XForm_base_r3xo<31, xo, OOL, IOL, asmstr, itin, []> { let RST = 0; @@ -469,9 +484,13 @@ class XForm_base_r3xo_swapped class XForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, - InstrItinClass itin, list<dag> pattern> + InstrItinClass itin, list<dag> pattern> : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>; +class XForm_1_memOp<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, + InstrItinClass itin, list<dag> pattern> + : XForm_base_r3xo_memOp<opcode, xo, OOL, IOL, asmstr, itin, pattern>; + class XForm_1a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { @@ -511,6 +530,10 @@ class XForm_8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>; +class XForm_8_memOp<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, + InstrItinClass itin, list<dag> pattern> + : XForm_base_r3xo_memOp<opcode, xo, OOL, IOL, asmstr, itin, pattern>; + class XForm_10<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { @@ -692,24 +715,34 @@ class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, } class XForm_24_eieio<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, - string asmstr, InstrItinClass itin, list<dag> pattern> + string asmstr, InstrItinClass itin, list<dag> pattern> : XForm_24_sync<opcode, xo, OOL, IOL, asmstr, itin, pattern> { let L = 0; } class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, - InstrItinClass itin, list<dag> pattern> + InstrItinClass itin, list<dag> pattern> : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { } +class XForm_25_memOp<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, + string asmstr, InstrItinClass itin, list<dag> pattern> + : XForm_base_r3xo_memOp<opcode, xo, OOL, IOL, asmstr, itin, pattern> { +} + class XForm_26<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { let A = 0; } +class XForm_28_memOp<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, + string asmstr, InstrItinClass itin, list<dag> pattern> + : XForm_base_r3xo_memOp<opcode, xo, OOL, IOL, asmstr, itin, pattern> { +} + class XForm_28<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, - InstrItinClass itin, list<dag> pattern> + InstrItinClass itin, list<dag> pattern> : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { } @@ -980,7 +1013,7 @@ class X_RD6_IMM8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, // to specify an SDAG pattern for matching. class X_RD5_RS5_IM5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin> - : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, []> { + : XForm_base_r3xo_memOp<opcode, xo, OOL, IOL, asmstr, itin, []> { } class X_BF3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, @@ -1018,6 +1051,10 @@ class XX1Form<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, let Inst{31} = XT{5}; } +class XX1Form_memOp<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, + string asmstr, InstrItinClass itin, list<dag> pattern> + : XX1Form<opcode, xo, OOL, IOL, asmstr, itin, pattern>, XFormMemOp; + class XX1_RS6_RD5_XO<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> : XX1Form<opcode, xo, OOL, IOL, asmstr, itin, pattern> { @@ -2094,6 +2131,27 @@ class Z23Form_3<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, let Inst{31} = RC; } +class Z23Form_8<bits<6> opcode, bits<8> xo, dag OOL, dag IOL, string asmstr, + InstrItinClass itin, list<dag> pattern> + : I<opcode, OOL, IOL, asmstr, itin> { + bits<5> VRT; + bit R; + bits<5> VRB; + bits<2> idx; + + let Pattern = pattern; + + bit RC = 0; // set by isDOT + + let Inst{6-10} = VRT; + let Inst{11-14} = 0; + let Inst{15} = R; + let Inst{16-20} = VRB; + let Inst{21-22} = idx; + let Inst{23-30} = xo; + let Inst{31} = RC; +} + //===----------------------------------------------------------------------===// class Pseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern> : I<0, OOL, IOL, asmstr, NoItinerary> { @@ -2103,3 +2161,7 @@ class Pseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern> let Inst{31-0} = 0; let hasNoSchedulingInfo = 1; } + +class PseudoXFormMemOp<dag OOL, dag IOL, string asmstr, list<dag> pattern> + : Pseudo<OOL, IOL, asmstr, pattern>, XFormMemOp; + |