diff options
Diffstat (limited to 'lib/Target/RISCV/RISCVSubtarget.h')
| -rw-r--r-- | lib/Target/RISCV/RISCVSubtarget.h | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/lib/Target/RISCV/RISCVSubtarget.h b/lib/Target/RISCV/RISCVSubtarget.h index 0e09391e7829..106ff49f021a 100644 --- a/lib/Target/RISCV/RISCVSubtarget.h +++ b/lib/Target/RISCV/RISCVSubtarget.h @@ -1,9 +1,8 @@ //===-- RISCVSubtarget.h - Define Subtarget for the RISCV -------*- C++ -*-===// // -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // @@ -17,6 +16,7 @@ #include "RISCVFrameLowering.h" #include "RISCVISelLowering.h" #include "RISCVInstrInfo.h" +#include "Utils/RISCVBaseInfo.h" #include "llvm/CodeGen/SelectionDAGTargetInfo.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/IR/DataLayout.h" @@ -36,9 +36,11 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo { bool HasStdExtD = false; bool HasStdExtC = false; bool HasRV64 = false; + bool IsRV32E = false; bool EnableLinkerRelax = false; unsigned XLen = 32; MVT XLenVT = MVT::i32; + RISCVABI::ABI TargetABI = RISCVABI::ABI_Unknown; RISCVFrameLowering FrameLowering; RISCVInstrInfo InstrInfo; RISCVRegisterInfo RegInfo; @@ -47,13 +49,14 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo { /// Initializes using the passed in CPU and feature strings so that we can /// use initializer lists for subtarget initialization. - RISCVSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS, - bool Is64Bit); + RISCVSubtarget &initializeSubtargetDependencies(const Triple &TT, + StringRef CPU, StringRef FS, + StringRef ABIName); public: // Initializes the data members to match that of the specified triple. - RISCVSubtarget(const Triple &TT, const std::string &CPU, - const std::string &FS, const TargetMachine &TM); + RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef FS, + StringRef ABIName, const TargetMachine &TM); // Parses features string setting specified subtarget options. The // definition of this function is auto-generated by tblgen. @@ -78,9 +81,11 @@ public: bool hasStdExtD() const { return HasStdExtD; } bool hasStdExtC() const { return HasStdExtC; } bool is64Bit() const { return HasRV64; } + bool isRV32E() const { return IsRV32E; } bool enableLinkerRelax() const { return EnableLinkerRelax; } MVT getXLenVT() const { return XLenVT; } unsigned getXLen() const { return XLen; } + RISCVABI::ABI getTargetABI() const { return TargetABI; } }; } // End llvm namespace |