diff options
Diffstat (limited to 'lib/Target/SystemZ')
| -rw-r--r-- | lib/Target/SystemZ/SystemZISelDAGToDAG.cpp | 56 | ||||
| -rw-r--r-- | lib/Target/SystemZ/SystemZInstrFP.td | 2 | ||||
| -rw-r--r-- | lib/Target/SystemZ/SystemZInstrInfo.td | 2 | ||||
| -rw-r--r-- | lib/Target/SystemZ/SystemZMachineFunctionInfo.h | 3 |
4 files changed, 11 insertions, 52 deletions
diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp index 7f0d9fb4d7d9..8152e1dbe1a1 100644 --- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp +++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp @@ -100,8 +100,6 @@ namespace { Lowering(*TM.getTargetLowering()), Subtarget(*TM.getSubtargetImpl()) { } - virtual void InstructionSelect(); - virtual const char *getPassName() const { return "SystemZ DAG->DAG Pattern Instruction Selection"; } @@ -152,10 +150,6 @@ namespace { bool MatchAddressBase(SDValue N, SystemZRRIAddressMode &AM); bool MatchAddressRI(SDValue N, SystemZRRIAddressMode &AM, bool is12Bit); - - #ifndef NDEBUG - unsigned Indent; - #endif }; } // end anonymous namespace @@ -599,35 +593,17 @@ bool SystemZDAGToDAGISel::TryFoldLoad(SDNode *P, SDValue N, return false; } -/// InstructionSelect - This callback is invoked by -/// SelectionDAGISel when it has created a SelectionDAG for us to codegen. -void SystemZDAGToDAGISel::InstructionSelect() { - // Codegen the basic block. - DEBUG(errs() << "===== Instruction selection begins:\n"); - DEBUG(Indent = 0); - SelectRoot(*CurDAG); - DEBUG(errs() << "===== Instruction selection ends:\n"); - - CurDAG->RemoveDeadNodes(); -} - SDNode *SystemZDAGToDAGISel::Select(SDNode *Node) { EVT NVT = Node->getValueType(0); DebugLoc dl = Node->getDebugLoc(); unsigned Opcode = Node->getOpcode(); // Dump information about the Node being selected - DEBUG(errs().indent(Indent) << "Selecting: "; - Node->dump(CurDAG); - errs() << "\n"); - DEBUG(Indent += 2); + DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n"); // If we have a custom node, we already have selected! if (Node->isMachineOpcode()) { - DEBUG(errs().indent(Indent-2) << "== "; - Node->dump(CurDAG); - errs() << "\n"); - DEBUG(Indent -= 2); + DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n"); return NULL; // Already selected. } @@ -693,9 +669,7 @@ SDNode *SystemZDAGToDAGISel::Select(SDNode *Node) { MVT::i32)); ReplaceUses(SDValue(Node, 0), SDValue(Div, 0)); - DEBUG(errs().indent(Indent-2) << "=> "; - Result->dump(CurDAG); - errs() << "\n"); + DEBUG(errs() << "=> "; Result->dump(CurDAG); errs() << "\n"); } // Copy the remainder (even subreg) result, if it is needed. @@ -708,15 +682,9 @@ SDNode *SystemZDAGToDAGISel::Select(SDNode *Node) { MVT::i32)); ReplaceUses(SDValue(Node, 1), SDValue(Rem, 0)); - DEBUG(errs().indent(Indent-2) << "=> "; - Result->dump(CurDAG); - errs() << "\n"); + DEBUG(errs() << "=> "; Result->dump(CurDAG); errs() << "\n"); } -#ifndef NDEBUG - Indent -= 2; -#endif - return NULL; } case ISD::UDIVREM: { @@ -782,9 +750,7 @@ SDNode *SystemZDAGToDAGISel::Select(SDNode *Node) { CurDAG->getTargetConstant(SubRegIdx, MVT::i32)); ReplaceUses(SDValue(Node, 0), SDValue(Div, 0)); - DEBUG(errs().indent(Indent-2) << "=> "; - Result->dump(CurDAG); - errs() << "\n"); + DEBUG(errs() << "=> "; Result->dump(CurDAG); errs() << "\n"); } // Copy the remainder (even subreg) result, if it is needed. @@ -796,15 +762,9 @@ SDNode *SystemZDAGToDAGISel::Select(SDNode *Node) { CurDAG->getTargetConstant(SubRegIdx, MVT::i32)); ReplaceUses(SDValue(Node, 1), SDValue(Rem, 0)); - DEBUG(errs().indent(Indent-2) << "=> "; - Result->dump(CurDAG); - errs() << "\n"); + DEBUG(errs() << "=> "; Result->dump(CurDAG); errs() << "\n"); } -#ifndef NDEBUG - Indent -= 2; -#endif - return NULL; } } @@ -812,14 +772,12 @@ SDNode *SystemZDAGToDAGISel::Select(SDNode *Node) { // Select the default instruction SDNode *ResNode = SelectCode(Node); - DEBUG(errs().indent(Indent-2) << "=> "; + DEBUG(errs() << "=> "; if (ResNode == NULL || ResNode == Node) Node->dump(CurDAG); else ResNode->dump(CurDAG); errs() << "\n"; ); - DEBUG(Indent -= 2); - return ResNode; } diff --git a/lib/Target/SystemZ/SystemZInstrFP.td b/lib/Target/SystemZ/SystemZInstrFP.td index 336e20ed895c..f46840c46c6a 100644 --- a/lib/Target/SystemZ/SystemZInstrFP.td +++ b/lib/Target/SystemZ/SystemZInstrFP.td @@ -58,7 +58,7 @@ def FMOV64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src), []>; } -let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in { +let canFoldAsLoad = 1, isReMaterializable = 1 in { def FMOV32rm : Pseudo<(outs FP32:$dst), (ins rriaddr12:$src), "le\t{$dst, $src}", [(set FP32:$dst, (load rriaddr12:$src))]>; diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td index 1891bba2aa4a..a44f6d9754f4 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.td +++ b/lib/Target/SystemZ/SystemZInstrInfo.td @@ -257,7 +257,7 @@ def MOV64rihi32 : RILI<0xEC0, (outs GR64:$dst), (ins i64imm:$src), [(set GR64:$dst, i64hi32:$src)]>; } -let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in { +let canFoldAsLoad = 1, isReMaterializable = 1 in { def MOV32rm : RXI<0x58, (outs GR32:$dst), (ins rriaddr12:$src), "l\t{$dst, $src}", diff --git a/lib/Target/SystemZ/SystemZMachineFunctionInfo.h b/lib/Target/SystemZ/SystemZMachineFunctionInfo.h index e47d41962ea8..fd6e330344b6 100644 --- a/lib/Target/SystemZ/SystemZMachineFunctionInfo.h +++ b/lib/Target/SystemZ/SystemZMachineFunctionInfo.h @@ -33,7 +33,8 @@ class SystemZMachineFunctionInfo : public MachineFunctionInfo { public: SystemZMachineFunctionInfo() : CalleeSavedFrameSize(0) {} - SystemZMachineFunctionInfo(MachineFunction &MF) : CalleeSavedFrameSize(0) {} + explicit SystemZMachineFunctionInfo(MachineFunction &MF) + : CalleeSavedFrameSize(0) {} unsigned getCalleeSavedFrameSize() const { return CalleeSavedFrameSize; } void setCalleeSavedFrameSize(unsigned bytes) { CalleeSavedFrameSize = bytes; } |