diff options
Diffstat (limited to 'lib/Target/X86/Disassembler/X86Disassembler.cpp')
| -rw-r--r-- | lib/Target/X86/Disassembler/X86Disassembler.cpp | 217 |
1 files changed, 8 insertions, 209 deletions
diff --git a/lib/Target/X86/Disassembler/X86Disassembler.cpp b/lib/Target/X86/Disassembler/X86Disassembler.cpp index 62312777318e..9a635bbe5f85 100644 --- a/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -1,9 +1,8 @@ //===-- X86Disassembler.cpp - Disassembler for x86 and x86_64 -------------===// // -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // @@ -76,6 +75,7 @@ #include "MCTargetDesc/X86BaseInfo.h" #include "MCTargetDesc/X86MCTargetDesc.h" +#include "TargetInfo/X86TargetInfo.h" #include "X86DisassemblerDecoder.h" #include "llvm/MC/MCContext.h" #include "llvm/MC/MCDisassembler/MCDisassembler.h" @@ -446,211 +446,6 @@ static void translateImmediate(MCInst &mcInst, uint64_t immediate, case ENCODING_IO: break; } - } else if (type == TYPE_IMM3) { - // Check for immediates that printSSECC can't handle. - if (immediate >= 8) { - unsigned NewOpc; - switch (mcInst.getOpcode()) { - default: llvm_unreachable("unexpected opcode"); - case X86::CMPPDrmi: NewOpc = X86::CMPPDrmi_alt; break; - case X86::CMPPDrri: NewOpc = X86::CMPPDrri_alt; break; - case X86::CMPPSrmi: NewOpc = X86::CMPPSrmi_alt; break; - case X86::CMPPSrri: NewOpc = X86::CMPPSrri_alt; break; - case X86::CMPSDrm: NewOpc = X86::CMPSDrm_alt; break; - case X86::CMPSDrr: NewOpc = X86::CMPSDrr_alt; break; - case X86::CMPSSrm: NewOpc = X86::CMPSSrm_alt; break; - case X86::CMPSSrr: NewOpc = X86::CMPSSrr_alt; break; - case X86::VPCOMBri: NewOpc = X86::VPCOMBri_alt; break; - case X86::VPCOMBmi: NewOpc = X86::VPCOMBmi_alt; break; - case X86::VPCOMWri: NewOpc = X86::VPCOMWri_alt; break; - case X86::VPCOMWmi: NewOpc = X86::VPCOMWmi_alt; break; - case X86::VPCOMDri: NewOpc = X86::VPCOMDri_alt; break; - case X86::VPCOMDmi: NewOpc = X86::VPCOMDmi_alt; break; - case X86::VPCOMQri: NewOpc = X86::VPCOMQri_alt; break; - case X86::VPCOMQmi: NewOpc = X86::VPCOMQmi_alt; break; - case X86::VPCOMUBri: NewOpc = X86::VPCOMUBri_alt; break; - case X86::VPCOMUBmi: NewOpc = X86::VPCOMUBmi_alt; break; - case X86::VPCOMUWri: NewOpc = X86::VPCOMUWri_alt; break; - case X86::VPCOMUWmi: NewOpc = X86::VPCOMUWmi_alt; break; - case X86::VPCOMUDri: NewOpc = X86::VPCOMUDri_alt; break; - case X86::VPCOMUDmi: NewOpc = X86::VPCOMUDmi_alt; break; - case X86::VPCOMUQri: NewOpc = X86::VPCOMUQri_alt; break; - case X86::VPCOMUQmi: NewOpc = X86::VPCOMUQmi_alt; break; - } - // Switch opcode to the one that doesn't get special printing. - mcInst.setOpcode(NewOpc); - } - } else if (type == TYPE_IMM5) { - // Check for immediates that printAVXCC can't handle. - if (immediate >= 32) { - unsigned NewOpc; - switch (mcInst.getOpcode()) { - default: llvm_unreachable("unexpected opcode"); - case X86::VCMPPDrmi: NewOpc = X86::VCMPPDrmi_alt; break; - case X86::VCMPPDrri: NewOpc = X86::VCMPPDrri_alt; break; - case X86::VCMPPSrmi: NewOpc = X86::VCMPPSrmi_alt; break; - case X86::VCMPPSrri: NewOpc = X86::VCMPPSrri_alt; break; - case X86::VCMPSDrm: NewOpc = X86::VCMPSDrm_alt; break; - case X86::VCMPSDrr: NewOpc = X86::VCMPSDrr_alt; break; - case X86::VCMPSSrm: NewOpc = X86::VCMPSSrm_alt; break; - case X86::VCMPSSrr: NewOpc = X86::VCMPSSrr_alt; break; - case X86::VCMPPDYrmi: NewOpc = X86::VCMPPDYrmi_alt; break; - case X86::VCMPPDYrri: NewOpc = X86::VCMPPDYrri_alt; break; - case X86::VCMPPSYrmi: NewOpc = X86::VCMPPSYrmi_alt; break; - case X86::VCMPPSYrri: NewOpc = X86::VCMPPSYrri_alt; break; - case X86::VCMPPDZrmi: NewOpc = X86::VCMPPDZrmi_alt; break; - case X86::VCMPPDZrri: NewOpc = X86::VCMPPDZrri_alt; break; - case X86::VCMPPDZrrib: NewOpc = X86::VCMPPDZrrib_alt; break; - case X86::VCMPPSZrmi: NewOpc = X86::VCMPPSZrmi_alt; break; - case X86::VCMPPSZrri: NewOpc = X86::VCMPPSZrri_alt; break; - case X86::VCMPPSZrrib: NewOpc = X86::VCMPPSZrrib_alt; break; - case X86::VCMPPDZ128rmi: NewOpc = X86::VCMPPDZ128rmi_alt; break; - case X86::VCMPPDZ128rri: NewOpc = X86::VCMPPDZ128rri_alt; break; - case X86::VCMPPSZ128rmi: NewOpc = X86::VCMPPSZ128rmi_alt; break; - case X86::VCMPPSZ128rri: NewOpc = X86::VCMPPSZ128rri_alt; break; - case X86::VCMPPDZ256rmi: NewOpc = X86::VCMPPDZ256rmi_alt; break; - case X86::VCMPPDZ256rri: NewOpc = X86::VCMPPDZ256rri_alt; break; - case X86::VCMPPSZ256rmi: NewOpc = X86::VCMPPSZ256rmi_alt; break; - case X86::VCMPPSZ256rri: NewOpc = X86::VCMPPSZ256rri_alt; break; - case X86::VCMPSDZrm_Int: NewOpc = X86::VCMPSDZrmi_alt; break; - case X86::VCMPSDZrr_Int: NewOpc = X86::VCMPSDZrri_alt; break; - case X86::VCMPSDZrrb_Int: NewOpc = X86::VCMPSDZrrb_alt; break; - case X86::VCMPSSZrm_Int: NewOpc = X86::VCMPSSZrmi_alt; break; - case X86::VCMPSSZrr_Int: NewOpc = X86::VCMPSSZrri_alt; break; - case X86::VCMPSSZrrb_Int: NewOpc = X86::VCMPSSZrrb_alt; break; - } - // Switch opcode to the one that doesn't get special printing. - mcInst.setOpcode(NewOpc); - } - } else if (type == TYPE_AVX512ICC) { - if (immediate >= 8 || ((immediate & 0x3) == 3)) { - unsigned NewOpc; - switch (mcInst.getOpcode()) { - default: llvm_unreachable("unexpected opcode"); - case X86::VPCMPBZ128rmi: NewOpc = X86::VPCMPBZ128rmi_alt; break; - case X86::VPCMPBZ128rmik: NewOpc = X86::VPCMPBZ128rmik_alt; break; - case X86::VPCMPBZ128rri: NewOpc = X86::VPCMPBZ128rri_alt; break; - case X86::VPCMPBZ128rrik: NewOpc = X86::VPCMPBZ128rrik_alt; break; - case X86::VPCMPBZ256rmi: NewOpc = X86::VPCMPBZ256rmi_alt; break; - case X86::VPCMPBZ256rmik: NewOpc = X86::VPCMPBZ256rmik_alt; break; - case X86::VPCMPBZ256rri: NewOpc = X86::VPCMPBZ256rri_alt; break; - case X86::VPCMPBZ256rrik: NewOpc = X86::VPCMPBZ256rrik_alt; break; - case X86::VPCMPBZrmi: NewOpc = X86::VPCMPBZrmi_alt; break; - case X86::VPCMPBZrmik: NewOpc = X86::VPCMPBZrmik_alt; break; - case X86::VPCMPBZrri: NewOpc = X86::VPCMPBZrri_alt; break; - case X86::VPCMPBZrrik: NewOpc = X86::VPCMPBZrrik_alt; break; - case X86::VPCMPDZ128rmi: NewOpc = X86::VPCMPDZ128rmi_alt; break; - case X86::VPCMPDZ128rmib: NewOpc = X86::VPCMPDZ128rmib_alt; break; - case X86::VPCMPDZ128rmibk: NewOpc = X86::VPCMPDZ128rmibk_alt; break; - case X86::VPCMPDZ128rmik: NewOpc = X86::VPCMPDZ128rmik_alt; break; - case X86::VPCMPDZ128rri: NewOpc = X86::VPCMPDZ128rri_alt; break; - case X86::VPCMPDZ128rrik: NewOpc = X86::VPCMPDZ128rrik_alt; break; - case X86::VPCMPDZ256rmi: NewOpc = X86::VPCMPDZ256rmi_alt; break; - case X86::VPCMPDZ256rmib: NewOpc = X86::VPCMPDZ256rmib_alt; break; - case X86::VPCMPDZ256rmibk: NewOpc = X86::VPCMPDZ256rmibk_alt; break; - case X86::VPCMPDZ256rmik: NewOpc = X86::VPCMPDZ256rmik_alt; break; - case X86::VPCMPDZ256rri: NewOpc = X86::VPCMPDZ256rri_alt; break; - case X86::VPCMPDZ256rrik: NewOpc = X86::VPCMPDZ256rrik_alt; break; - case X86::VPCMPDZrmi: NewOpc = X86::VPCMPDZrmi_alt; break; - case X86::VPCMPDZrmib: NewOpc = X86::VPCMPDZrmib_alt; break; - case X86::VPCMPDZrmibk: NewOpc = X86::VPCMPDZrmibk_alt; break; - case X86::VPCMPDZrmik: NewOpc = X86::VPCMPDZrmik_alt; break; - case X86::VPCMPDZrri: NewOpc = X86::VPCMPDZrri_alt; break; - case X86::VPCMPDZrrik: NewOpc = X86::VPCMPDZrrik_alt; break; - case X86::VPCMPQZ128rmi: NewOpc = X86::VPCMPQZ128rmi_alt; break; - case X86::VPCMPQZ128rmib: NewOpc = X86::VPCMPQZ128rmib_alt; break; - case X86::VPCMPQZ128rmibk: NewOpc = X86::VPCMPQZ128rmibk_alt; break; - case X86::VPCMPQZ128rmik: NewOpc = X86::VPCMPQZ128rmik_alt; break; - case X86::VPCMPQZ128rri: NewOpc = X86::VPCMPQZ128rri_alt; break; - case X86::VPCMPQZ128rrik: NewOpc = X86::VPCMPQZ128rrik_alt; break; - case X86::VPCMPQZ256rmi: NewOpc = X86::VPCMPQZ256rmi_alt; break; - case X86::VPCMPQZ256rmib: NewOpc = X86::VPCMPQZ256rmib_alt; break; - case X86::VPCMPQZ256rmibk: NewOpc = X86::VPCMPQZ256rmibk_alt; break; - case X86::VPCMPQZ256rmik: NewOpc = X86::VPCMPQZ256rmik_alt; break; - case X86::VPCMPQZ256rri: NewOpc = X86::VPCMPQZ256rri_alt; break; - case X86::VPCMPQZ256rrik: NewOpc = X86::VPCMPQZ256rrik_alt; break; - case X86::VPCMPQZrmi: NewOpc = X86::VPCMPQZrmi_alt; break; - case X86::VPCMPQZrmib: NewOpc = X86::VPCMPQZrmib_alt; break; - case X86::VPCMPQZrmibk: NewOpc = X86::VPCMPQZrmibk_alt; break; - case X86::VPCMPQZrmik: NewOpc = X86::VPCMPQZrmik_alt; break; - case X86::VPCMPQZrri: NewOpc = X86::VPCMPQZrri_alt; break; - case X86::VPCMPQZrrik: NewOpc = X86::VPCMPQZrrik_alt; break; - case X86::VPCMPUBZ128rmi: NewOpc = X86::VPCMPUBZ128rmi_alt; break; - case X86::VPCMPUBZ128rmik: NewOpc = X86::VPCMPUBZ128rmik_alt; break; - case X86::VPCMPUBZ128rri: NewOpc = X86::VPCMPUBZ128rri_alt; break; - case X86::VPCMPUBZ128rrik: NewOpc = X86::VPCMPUBZ128rrik_alt; break; - case X86::VPCMPUBZ256rmi: NewOpc = X86::VPCMPUBZ256rmi_alt; break; - case X86::VPCMPUBZ256rmik: NewOpc = X86::VPCMPUBZ256rmik_alt; break; - case X86::VPCMPUBZ256rri: NewOpc = X86::VPCMPUBZ256rri_alt; break; - case X86::VPCMPUBZ256rrik: NewOpc = X86::VPCMPUBZ256rrik_alt; break; - case X86::VPCMPUBZrmi: NewOpc = X86::VPCMPUBZrmi_alt; break; - case X86::VPCMPUBZrmik: NewOpc = X86::VPCMPUBZrmik_alt; break; - case X86::VPCMPUBZrri: NewOpc = X86::VPCMPUBZrri_alt; break; - case X86::VPCMPUBZrrik: NewOpc = X86::VPCMPUBZrrik_alt; break; - case X86::VPCMPUDZ128rmi: NewOpc = X86::VPCMPUDZ128rmi_alt; break; - case X86::VPCMPUDZ128rmib: NewOpc = X86::VPCMPUDZ128rmib_alt; break; - case X86::VPCMPUDZ128rmibk: NewOpc = X86::VPCMPUDZ128rmibk_alt; break; - case X86::VPCMPUDZ128rmik: NewOpc = X86::VPCMPUDZ128rmik_alt; break; - case X86::VPCMPUDZ128rri: NewOpc = X86::VPCMPUDZ128rri_alt; break; - case X86::VPCMPUDZ128rrik: NewOpc = X86::VPCMPUDZ128rrik_alt; break; - case X86::VPCMPUDZ256rmi: NewOpc = X86::VPCMPUDZ256rmi_alt; break; - case X86::VPCMPUDZ256rmib: NewOpc = X86::VPCMPUDZ256rmib_alt; break; - case X86::VPCMPUDZ256rmibk: NewOpc = X86::VPCMPUDZ256rmibk_alt; break; - case X86::VPCMPUDZ256rmik: NewOpc = X86::VPCMPUDZ256rmik_alt; break; - case X86::VPCMPUDZ256rri: NewOpc = X86::VPCMPUDZ256rri_alt; break; - case X86::VPCMPUDZ256rrik: NewOpc = X86::VPCMPUDZ256rrik_alt; break; - case X86::VPCMPUDZrmi: NewOpc = X86::VPCMPUDZrmi_alt; break; - case X86::VPCMPUDZrmib: NewOpc = X86::VPCMPUDZrmib_alt; break; - case X86::VPCMPUDZrmibk: NewOpc = X86::VPCMPUDZrmibk_alt; break; - case X86::VPCMPUDZrmik: NewOpc = X86::VPCMPUDZrmik_alt; break; - case X86::VPCMPUDZrri: NewOpc = X86::VPCMPUDZrri_alt; break; - case X86::VPCMPUDZrrik: NewOpc = X86::VPCMPUDZrrik_alt; break; - case X86::VPCMPUQZ128rmi: NewOpc = X86::VPCMPUQZ128rmi_alt; break; - case X86::VPCMPUQZ128rmib: NewOpc = X86::VPCMPUQZ128rmib_alt; break; - case X86::VPCMPUQZ128rmibk: NewOpc = X86::VPCMPUQZ128rmibk_alt; break; - case X86::VPCMPUQZ128rmik: NewOpc = X86::VPCMPUQZ128rmik_alt; break; - case X86::VPCMPUQZ128rri: NewOpc = X86::VPCMPUQZ128rri_alt; break; - case X86::VPCMPUQZ128rrik: NewOpc = X86::VPCMPUQZ128rrik_alt; break; - case X86::VPCMPUQZ256rmi: NewOpc = X86::VPCMPUQZ256rmi_alt; break; - case X86::VPCMPUQZ256rmib: NewOpc = X86::VPCMPUQZ256rmib_alt; break; - case X86::VPCMPUQZ256rmibk: NewOpc = X86::VPCMPUQZ256rmibk_alt; break; - case X86::VPCMPUQZ256rmik: NewOpc = X86::VPCMPUQZ256rmik_alt; break; - case X86::VPCMPUQZ256rri: NewOpc = X86::VPCMPUQZ256rri_alt; break; - case X86::VPCMPUQZ256rrik: NewOpc = X86::VPCMPUQZ256rrik_alt; break; - case X86::VPCMPUQZrmi: NewOpc = X86::VPCMPUQZrmi_alt; break; - case X86::VPCMPUQZrmib: NewOpc = X86::VPCMPUQZrmib_alt; break; - case X86::VPCMPUQZrmibk: NewOpc = X86::VPCMPUQZrmibk_alt; break; - case X86::VPCMPUQZrmik: NewOpc = X86::VPCMPUQZrmik_alt; break; - case X86::VPCMPUQZrri: NewOpc = X86::VPCMPUQZrri_alt; break; - case X86::VPCMPUQZrrik: NewOpc = X86::VPCMPUQZrrik_alt; break; - case X86::VPCMPUWZ128rmi: NewOpc = X86::VPCMPUWZ128rmi_alt; break; - case X86::VPCMPUWZ128rmik: NewOpc = X86::VPCMPUWZ128rmik_alt; break; - case X86::VPCMPUWZ128rri: NewOpc = X86::VPCMPUWZ128rri_alt; break; - case X86::VPCMPUWZ128rrik: NewOpc = X86::VPCMPUWZ128rrik_alt; break; - case X86::VPCMPUWZ256rmi: NewOpc = X86::VPCMPUWZ256rmi_alt; break; - case X86::VPCMPUWZ256rmik: NewOpc = X86::VPCMPUWZ256rmik_alt; break; - case X86::VPCMPUWZ256rri: NewOpc = X86::VPCMPUWZ256rri_alt; break; - case X86::VPCMPUWZ256rrik: NewOpc = X86::VPCMPUWZ256rrik_alt; break; - case X86::VPCMPUWZrmi: NewOpc = X86::VPCMPUWZrmi_alt; break; - case X86::VPCMPUWZrmik: NewOpc = X86::VPCMPUWZrmik_alt; break; - case X86::VPCMPUWZrri: NewOpc = X86::VPCMPUWZrri_alt; break; - case X86::VPCMPUWZrrik: NewOpc = X86::VPCMPUWZrrik_alt; break; - case X86::VPCMPWZ128rmi: NewOpc = X86::VPCMPWZ128rmi_alt; break; - case X86::VPCMPWZ128rmik: NewOpc = X86::VPCMPWZ128rmik_alt; break; - case X86::VPCMPWZ128rri: NewOpc = X86::VPCMPWZ128rri_alt; break; - case X86::VPCMPWZ128rrik: NewOpc = X86::VPCMPWZ128rrik_alt; break; - case X86::VPCMPWZ256rmi: NewOpc = X86::VPCMPWZ256rmi_alt; break; - case X86::VPCMPWZ256rmik: NewOpc = X86::VPCMPWZ256rmik_alt; break; - case X86::VPCMPWZ256rri: NewOpc = X86::VPCMPWZ256rri_alt; break; - case X86::VPCMPWZ256rrik: NewOpc = X86::VPCMPWZ256rrik_alt; break; - case X86::VPCMPWZrmi: NewOpc = X86::VPCMPWZrmi_alt; break; - case X86::VPCMPWZrmik: NewOpc = X86::VPCMPWZrmik_alt; break; - case X86::VPCMPWZrri: NewOpc = X86::VPCMPWZrri_alt; break; - case X86::VPCMPWZrrik: NewOpc = X86::VPCMPWZrrik_alt; break; - } - // Switch opcode to the one that doesn't get special printing. - mcInst.setOpcode(NewOpc); - } } switch (type) { @@ -899,6 +694,7 @@ static bool translateRM(MCInst &mcInst, const OperandSpecifier &operand, case TYPE_XMM: case TYPE_YMM: case TYPE_ZMM: + case TYPE_VK_PAIR: case TYPE_VK: case TYPE_DEBUGREG: case TYPE_CONTROLREG: @@ -987,6 +783,9 @@ static bool translateOperand(MCInst &mcInst, const OperandSpecifier &operand, case ENCODING_Rv: translateRegister(mcInst, insn.opcodeRegister); return false; + case ENCODING_CC: + mcInst.addOperand(MCOperand::createImm(insn.immediates[1])); + return false; case ENCODING_FP: translateFPRegister(mcInst, insn.modRM & 7); return false; |