diff options
Diffstat (limited to 'lib/Target/X86/X86InstrExtension.td')
| -rw-r--r-- | lib/Target/X86/X86InstrExtension.td | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/lib/Target/X86/X86InstrExtension.td b/lib/Target/X86/X86InstrExtension.td index c24d6d5b8df1..06e605fe5db2 100644 --- a/lib/Target/X86/X86InstrExtension.td +++ b/lib/Target/X86/X86InstrExtension.td @@ -1,9 +1,8 @@ //===-- X86InstrExtension.td - Sign and Zero Extensions ----*- tablegen -*-===// // -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // @@ -29,11 +28,11 @@ let hasSideEffects = 0 in { let Defs = [RAX], Uses = [EAX] in // RAX = signext(EAX) def CDQE : RI<0x98, RawFrm, (outs), (ins), - "{cltq|cdqe}", []>, Sched<[WriteALU]>; + "{cltq|cdqe}", []>, Sched<[WriteALU]>, Requires<[In64BitMode]>; let Defs = [RAX,RDX], Uses = [RAX] in // RDX:RAX = signext(RAX) def CQO : RI<0x99, RawFrm, (outs), (ins), - "{cqto|cqo}", []>, Sched<[WriteALU]>; + "{cqto|cqo}", []>, Sched<[WriteALU]>, Requires<[In64BitMode]>; } // Sign/Zero extenders |