diff options
Diffstat (limited to 'llvm/lib/Analysis/TargetTransformInfo.cpp')
| -rw-r--r-- | llvm/lib/Analysis/TargetTransformInfo.cpp | 38 |
1 files changed, 31 insertions, 7 deletions
diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp index 304d24fe8e4a..5067f493f02d 100644 --- a/llvm/lib/Analysis/TargetTransformInfo.cpp +++ b/llvm/lib/Analysis/TargetTransformInfo.cpp @@ -167,11 +167,7 @@ bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE, // Note that this block may not be the loop latch block, even if the loop // has a latch block. ExitBlock = BB; - TripCount = SE.getAddExpr(EC, SE.getOne(EC->getType())); - - if (!EC->getType()->isPointerTy() && EC->getType() != CountType) - TripCount = SE.getZeroExtendExpr(TripCount, CountType); - + ExitCount = EC; break; } @@ -263,10 +259,20 @@ bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS, return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS); } +bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace( + unsigned AS) const { + return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS); +} + unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const { return TTIImpl->getAssumedAddrSpace(V); } +std::pair<const Value *, unsigned> +TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const { + return TTIImpl->getPredicatedAddrSpace(V); +} + Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace( IntrinsicInst *II, Value *OldV, Value *NewV) const { return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV); @@ -317,8 +323,9 @@ Optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic( } void TargetTransformInfo::getUnrollingPreferences( - Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP) const { - return TTIImpl->getUnrollingPreferences(L, SE, UP); + Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP, + OptimizationRemarkEmitter *ORE) const { + return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE); } void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE, @@ -409,6 +416,10 @@ bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const { return TTIImpl->isLegalMaskedExpandLoad(DataType); } +bool TargetTransformInfo::enableOrderedReductions() const { + return TTIImpl->enableOrderedReductions(); +} + bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const { return TTIImpl->hasDivRemOp(DataType, IsSigned); } @@ -598,6 +609,10 @@ Optional<unsigned> TargetTransformInfo::getMaxVScale() const { return TTIImpl->getMaxVScale(); } +Optional<unsigned> TargetTransformInfo::getVScaleForTuning() const { + return TTIImpl->getVScaleForTuning(); +} + bool TargetTransformInfo::shouldMaximizeVectorBandwidth() const { return TTIImpl->shouldMaximizeVectorBandwidth(); } @@ -818,6 +833,15 @@ InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode, return Cost; } +InstructionCost TargetTransformInfo::getReplicationShuffleCost( + Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, + TTI::TargetCostKind CostKind) { + InstructionCost Cost = TTIImpl->getReplicationShuffleCost( + EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind); + assert(Cost >= 0 && "TTI should not produce negative costs!"); + return Cost; +} + InstructionCost TargetTransformInfo::getMemoryOpCost( unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, const Instruction *I) const { |
