1 files changed, 5 insertions, 2 deletions
diff --git a/llvm/lib/MCA/HardwareUnits/RetireControlUnit.cpp b/llvm/lib/MCA/HardwareUnits/RetireControlUnit.cpp
index de519d7fd94a..9297f0c4fd7b 100644
--- a/llvm/lib/MCA/HardwareUnits/RetireControlUnit.cpp
+++ b/llvm/lib/MCA/HardwareUnits/RetireControlUnit.cpp
@@ -21,8 +21,10 @@ namespace mca {
 
 RetireControlUnit::RetireControlUnit(const MCSchedModel &SM)
     : NextAvailableSlotIdx(0), CurrentInstructionSlotIdx(0),
-      NumROBEntries(SM.MicroOpBufferSize),
-      AvailableEntries(SM.MicroOpBufferSize), MaxRetirePerCycle(0) {
+      AvailableEntries(SM.isOutOfOrder() ? SM.MicroOpBufferSize : 0),
+      MaxRetirePerCycle(0) {
+  assert(SM.isOutOfOrder() &&
+         "RetireControlUnit is not available for in-order processors");
   // Check if the scheduling model provides extra information about the machine
   // processor. If so, then use that information to set the reorder buffer size
   // and the maximum number of instructions retired per cycle.
@@ -47,6 +49,7 @@ unsigned RetireControlUnit::dispatch(const InstRef &IR) {
   Queue[NextAvailableSlotIdx] = {IR, Entries, false};
   NextAvailableSlotIdx += std::max(1U, Entries);
   NextAvailableSlotIdx %= Queue.size();
+  assert(TokenID < UnhandledTokenID && "Invalid token ID");
 
   AvailableEntries -= Entries;
   return TokenID;