diff options
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPU.td')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPU.td | 278 |
1 files changed, 184 insertions, 94 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td index 42b477e07b3b..e32f0fcc4771 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPU.td +++ b/llvm/lib/Target/AMDGPU/AMDGPU.td @@ -33,6 +33,12 @@ def FeatureFastFMAF32 : SubtargetFeature<"fast-fmaf", "Assuming f32 fma is at least as fast as mul + add" >; +def FeatureFastDenormalF32 : SubtargetFeature<"fast-denormal-f32", + "FastDenormalF32", + "true", + "Enabling denormals does not cause f32 instructions to run at f64 rates" +>; + def FeatureMIMG_R128 : SubtargetFeature<"mimg-r128", "MIMG_R128", "true", @@ -254,6 +260,12 @@ def FeatureGFX10Insts : SubtargetFeature<"gfx10-insts", "Additional instructions for GFX10+" >; +def FeatureGFX10_3Insts : SubtargetFeature<"gfx10-3-insts", + "GFX10_3Insts", + "true", + "Additional instructions for GFX10.3" +>; + def FeatureGFX7GFX8GFX9Insts : SubtargetFeature<"gfx7-gfx8-gfx9-insts", "GFX7GFX8GFX9Insts", "true", @@ -360,7 +372,19 @@ def FeatureDPP8 : SubtargetFeature<"dpp8", def FeatureR128A16 : SubtargetFeature<"r128-a16", "HasR128A16", "true", - "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9" + "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128" +>; + +def FeatureGFX10A16 : SubtargetFeature<"a16", + "HasGFX10A16", + "true", + "Support gfx10-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands" +>; + +def FeatureG16 : SubtargetFeature<"g16", + "HasG16", + "true", + "Support G16 for 16-bit gradient image operands" >; def FeatureNSAEncoding : SubtargetFeature<"nsa-encoding", @@ -369,6 +393,12 @@ def FeatureNSAEncoding : SubtargetFeature<"nsa-encoding", "Support NSA encoding for image instructions" >; +def FeatureGFX10_BEncoding : SubtargetFeature<"gfx10_b-encoding", + "GFX10_BEncoding", + "true", + "Encoding format GFX10_B" +>; + def FeatureIntClamp : SubtargetFeature<"int-clamp-insts", "HasIntClamp", "true", @@ -439,7 +469,8 @@ def FeatureAtomicFaddInsts : SubtargetFeature<"atomic-fadd-insts", "HasAtomicFaddInsts", "true", "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, " - "global_atomic_pk_add_f16 instructions" + "global_atomic_pk_add_f16 instructions", + [FeatureFlatGlobalInsts] >; def FeatureDoesNotSupportSRAMECC : SubtargetFeature<"no-sram-ecc-support", @@ -466,6 +497,30 @@ def FeatureVscnt : SubtargetFeature<"vscnt", "Has separate store vscnt counter" >; +def FeatureGetWaveIdInst : SubtargetFeature<"get-wave-id-inst", + "HasGetWaveIdInst", + "true", + "Has s_get_waveid_in_workgroup instruction" +>; + +def FeatureSMemTimeInst : SubtargetFeature<"s-memtime-inst", + "HasSMemTimeInst", + "true", + "Has s_memtime instruction" +>; + +def FeatureMadMacF32Insts : SubtargetFeature<"mad-mac-f32-insts", + "HasMadMacF32Insts", + "true", + "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions" +>; + +def FeatureDsSrc2Insts : SubtargetFeature<"ds-src2-insts", + "HasDsSrc2Insts", + "true", + "Has ds_*_src2 instructions" +>; + def FeatureRegisterBanking : SubtargetFeature<"register-banking", "HasRegisterBanking", "true", @@ -488,36 +543,6 @@ def FeatureNoDataDepHazard : SubtargetFeature<"no-data-dep-hazard", // Subtarget Features (options and debugging) //===------------------------------------------------------------===// -// Denormal handling for fp64 and fp16 is controlled by the same -// config register when fp16 supported. -// TODO: Do we need a separate f16 setting when not legal? -def FeatureFP64FP16Denormals : SubtargetFeature<"fp64-fp16-denormals", - "FP64FP16Denormals", - "true", - "Enable double and half precision denormal handling", - [FeatureFP64] ->; - -def FeatureFP64Denormals : SubtargetFeature<"fp64-denormals", - "FP64FP16Denormals", - "true", - "Enable double and half precision denormal handling", - [FeatureFP64, FeatureFP64FP16Denormals] ->; - -def FeatureFP16Denormals : SubtargetFeature<"fp16-denormals", - "FP64FP16Denormals", - "true", - "Enable half precision denormal handling", - [FeatureFP64FP16Denormals] ->; - -def FeatureFPExceptions : SubtargetFeature<"fp-exceptions", - "FPExceptions", - "true", - "Enable floating point exceptions" ->; - class FeatureMaxPrivateElementSize<int size> : SubtargetFeature< "max-private-element-size-"#size, "MaxPrivateElementSize", @@ -628,9 +653,10 @@ class GCNSubtargetFeatureGeneration <string Value, def FeatureSouthernIslands : GCNSubtargetFeatureGeneration<"SOUTHERN_ISLANDS", "southern-islands", [FeatureFP64, FeatureLocalMemorySize32768, FeatureMIMG_R128, - FeatureWavefrontSize64, - FeatureLDSBankCount32, FeatureMovrel, FeatureTrigReducedRange, - FeatureDoesNotSupportSRAMECC, FeatureDoesNotSupportXNACK] + FeatureWavefrontSize64, FeatureSMemTimeInst, FeatureMadMacF32Insts, + FeatureDsSrc2Insts, FeatureLDSBankCount32, FeatureMovrel, + FeatureTrigReducedRange, FeatureDoesNotSupportSRAMECC, + FeatureDoesNotSupportXNACK] >; def FeatureSeaIslands : GCNSubtargetFeatureGeneration<"SEA_ISLANDS", @@ -638,7 +664,8 @@ def FeatureSeaIslands : GCNSubtargetFeatureGeneration<"SEA_ISLANDS", [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128, FeatureWavefrontSize64, FeatureFlatAddressSpace, FeatureCIInsts, FeatureMovrel, FeatureTrigReducedRange, - FeatureGFX7GFX8GFX9Insts, FeatureDoesNotSupportSRAMECC] + FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts, + FeatureDsSrc2Insts, FeatureDoesNotSupportSRAMECC] >; def FeatureVolcanicIslands : GCNSubtargetFeatureGeneration<"VOLCANIC_ISLANDS", @@ -649,8 +676,9 @@ def FeatureVolcanicIslands : GCNSubtargetFeatureGeneration<"VOLCANIC_ISLANDS", FeatureSMemRealTime, FeatureVGPRIndexMode, FeatureMovrel, FeatureScalarStores, FeatureInv2PiInlineImm, FeatureSDWA, FeatureSDWAOutModsVOPC, FeatureSDWAMac, FeatureDPP, - FeatureIntClamp, FeatureTrigReducedRange, FeatureDoesNotSupportSRAMECC, - FeatureGFX8Insts, FeatureGFX7GFX8GFX9Insts + FeatureIntClamp, FeatureTrigReducedRange, FeatureGFX8Insts, + FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts, + FeatureDsSrc2Insts, FeatureDoesNotSupportSRAMECC, FeatureFastDenormalF32 ] >; @@ -665,7 +693,9 @@ def FeatureGFX9 : GCNSubtargetFeatureGeneration<"GFX9", FeatureSDWA, FeatureSDWAOmod, FeatureSDWAScalar, FeatureSDWASdst, FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts, FeatureAddNoCarryInsts, FeatureGFX8Insts, FeatureGFX7GFX8GFX9Insts, - FeatureScalarFlatScratchInsts, FeatureScalarAtomics, FeatureR128A16 + FeatureScalarFlatScratchInsts, FeatureScalarAtomics, FeatureR128A16, + FeatureSMemTimeInst, FeatureMadMacF32Insts, FeatureDsSrc2Insts, + FeatureFastDenormalF32 ] >; @@ -682,7 +712,8 @@ def FeatureGFX10 : GCNSubtargetFeatureGeneration<"GFX10", FeatureAddNoCarryInsts, FeatureFmaMixInsts, FeatureGFX8Insts, FeatureNoSdstCMPX, FeatureVscnt, FeatureRegisterBanking, FeatureVOP3Literal, FeatureDPP8, - FeatureNoDataDepHazard, FeaturePkFmacF16Inst, FeatureDoesNotSupportSRAMECC + FeatureNoDataDepHazard, FeaturePkFmacF16Inst, FeatureDoesNotSupportSRAMECC, + FeatureGFX10A16, FeatureFastDenormalF32, FeatureG16 ] >; @@ -853,6 +884,10 @@ def FeatureISAVersion10_1_0 : FeatureSet< FeatureScalarStores, FeatureScalarAtomics, FeatureScalarFlatScratchInsts, + FeatureGetWaveIdInst, + FeatureSMemTimeInst, + FeatureMadMacF32Insts, + FeatureDsSrc2Insts, FeatureLdsMisalignedBug, FeatureDoesNotSupportXNACK, FeatureCodeObjectV3])>; @@ -871,6 +906,10 @@ def FeatureISAVersion10_1_1 : FeatureSet< FeatureScalarStores, FeatureScalarAtomics, FeatureScalarFlatScratchInsts, + FeatureGetWaveIdInst, + FeatureSMemTimeInst, + FeatureMadMacF32Insts, + FeatureDsSrc2Insts, FeatureDoesNotSupportXNACK, FeatureCodeObjectV3])>; @@ -888,10 +927,29 @@ def FeatureISAVersion10_1_2 : FeatureSet< FeatureScalarStores, FeatureScalarAtomics, FeatureScalarFlatScratchInsts, + FeatureGetWaveIdInst, + FeatureSMemTimeInst, + FeatureMadMacF32Insts, + FeatureDsSrc2Insts, FeatureLdsMisalignedBug, FeatureDoesNotSupportXNACK, FeatureCodeObjectV3])>; +def FeatureISAVersion10_3_0 : FeatureSet< + [FeatureGFX10, + FeatureGFX10_BEncoding, + FeatureGFX10_3Insts, + FeatureLDSBankCount32, + FeatureDLInsts, + FeatureDot1Insts, + FeatureDot2Insts, + FeatureDot5Insts, + FeatureDot6Insts, + FeatureNSAEncoding, + FeatureWavefrontSize32, + FeatureDoesNotSupportXNACK, + FeatureCodeObjectV3]>; + //===----------------------------------------------------------------------===// def AMDGPUInstrInfo : InstrInfo { @@ -973,190 +1031,222 @@ def NullALU : InstrItinClass; def isGFX6 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS">, - AssemblerPredicate<"FeatureSouthernIslands">; + AssemblerPredicate<(all_of FeatureSouthernIslands)>; def isGFX6GFX7 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||" "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">, - AssemblerPredicate<"!FeatureGCN3Encoding,!FeatureGFX10Insts">; + AssemblerPredicate<(all_of (not FeatureGCN3Encoding), (not FeatureGFX10Insts))>; def isGFX6GFX7GFX10 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||" "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||" "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">, - AssemblerPredicate<"!FeatureGCN3Encoding">; + AssemblerPredicate<(all_of (not FeatureGCN3Encoding))>; def isGFX7Only : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">, - AssemblerPredicate<"!FeatureGCN3Encoding,FeatureCIInsts,!FeatureGFX10Insts">; + AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts, (not FeatureGFX10Insts))>; def isGFX7GFX10 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||" "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">, - AssemblerPredicate<"!FeatureGCN3Encoding,FeatureCIInsts">; + AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts)>; def isGFX7GFX8GFX9 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||" "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||" "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">, - AssemblerPredicate<"FeatureGFX7GFX8GFX9Insts">; + AssemblerPredicate<(all_of FeatureGFX7GFX8GFX9Insts)>; def isGFX6GFX7GFX8GFX9 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||" "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||" "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||" "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">, - AssemblerPredicate<"!FeatureGFX10Insts">; + AssemblerPredicate<(all_of (not FeatureGFX10Insts))>; def isGFX7Plus : Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS">, - AssemblerPredicate<"FeatureCIInsts">; + AssemblerPredicate<(all_of FeatureCIInsts)>; def isGFX8Plus : Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS">, - AssemblerPredicate<"FeatureGFX8Insts">; + AssemblerPredicate<(all_of FeatureGFX8Insts)>; def isGFX8Only : Predicate<"Subtarget->getGeneration() ==" "AMDGPUSubtarget::VOLCANIC_ISLANDS">, - AssemblerPredicate <"FeatureVolcanicIslands">; + AssemblerPredicate <(all_of FeatureVolcanicIslands)>; def isGFX9Plus : Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX9">, - AssemblerPredicate<"FeatureGFX9Insts">; + AssemblerPredicate<(all_of FeatureGFX9Insts)>; def isGFX9Only : Predicate < "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">, - AssemblerPredicate<"FeatureGCN3Encoding,FeatureGFX9Insts">; + AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureGFX9Insts)>; def isGFX8GFX9 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||" "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">, - AssemblerPredicate<"FeatureGFX8Insts,FeatureGCN3Encoding">; + AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding)>; def isGFX10Plus : Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX10">, - AssemblerPredicate<"FeatureGFX10Insts">; + AssemblerPredicate<(all_of FeatureGFX10Insts)>; def HasFlatAddressSpace : Predicate<"Subtarget->hasFlatAddressSpace()">, - AssemblerPredicate<"FeatureFlatAddressSpace">; + AssemblerPredicate<(all_of FeatureFlatAddressSpace)>; def HasFlatGlobalInsts : Predicate<"Subtarget->hasFlatGlobalInsts()">, - AssemblerPredicate<"FeatureFlatGlobalInsts">; + AssemblerPredicate<(all_of FeatureFlatGlobalInsts)>; def HasFlatScratchInsts : Predicate<"Subtarget->hasFlatScratchInsts()">, - AssemblerPredicate<"FeatureFlatScratchInsts">; + AssemblerPredicate<(all_of FeatureFlatScratchInsts)>; def HasScalarFlatScratchInsts : Predicate<"Subtarget->hasScalarFlatScratchInsts()">, - AssemblerPredicate<"FeatureScalarFlatScratchInsts">; + AssemblerPredicate<(all_of FeatureScalarFlatScratchInsts)>; def HasD16LoadStore : Predicate<"Subtarget->hasD16LoadStore()">, - AssemblerPredicate<"FeatureGFX9Insts">; + AssemblerPredicate<(all_of FeatureGFX9Insts)>; + +def HasGFX10_BEncoding : Predicate<"Subtarget->hasGFX10_BEncoding()">, + AssemblerPredicate<(all_of FeatureGFX10_BEncoding)>; def HasUnpackedD16VMem : Predicate<"Subtarget->hasUnpackedD16VMem()">, - AssemblerPredicate<"FeatureUnpackedD16VMem">; + AssemblerPredicate<(all_of FeatureUnpackedD16VMem)>; def HasPackedD16VMem : Predicate<"!Subtarget->hasUnpackedD16VMem()">, - AssemblerPredicate<"!FeatureUnpackedD16VMem">; + AssemblerPredicate<(all_of (not FeatureUnpackedD16VMem))>; def D16PreservesUnusedBits : Predicate<"Subtarget->d16PreservesUnusedBits()">, - AssemblerPredicate<"FeatureGFX9Insts,!FeatureSRAMECC">; + AssemblerPredicate<(all_of FeatureGFX9Insts, (not FeatureSRAMECC))>; def LDSRequiresM0Init : Predicate<"Subtarget->ldsRequiresM0Init()">; def NotLDSRequiresM0Init : Predicate<"!Subtarget->ldsRequiresM0Init()">; def HasDSAddTid : Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX9">, - AssemblerPredicate<"FeatureGFX9Insts">; + AssemblerPredicate<(all_of FeatureGFX9Insts)>; + +def HasLDSFPAtomics : Predicate<"Subtarget->hasLDSFPAtomics()">, + AssemblerPredicate<(all_of FeatureGFX8Insts)>; def HasAddNoCarryInsts : Predicate<"Subtarget->hasAddNoCarry()">, - AssemblerPredicate<"FeatureAddNoCarryInsts">; + AssemblerPredicate<(all_of FeatureAddNoCarryInsts)>; def NotHasAddNoCarryInsts : Predicate<"!Subtarget->hasAddNoCarry()">; def Has16BitInsts : Predicate<"Subtarget->has16BitInsts()">, - AssemblerPredicate<"Feature16BitInsts">; + AssemblerPredicate<(all_of Feature16BitInsts)>; def HasVOP3PInsts : Predicate<"Subtarget->hasVOP3PInsts()">, - AssemblerPredicate<"FeatureVOP3P">; + AssemblerPredicate<(all_of FeatureVOP3P)>; + +def HasMinMaxDenormModes : Predicate<"Subtarget->supportsMinMaxDenormModes()">; +def NotHasMinMaxDenormModes : Predicate<"!Subtarget->supportsMinMaxDenormModes()">; def HasSDWA : Predicate<"Subtarget->hasSDWA()">, - AssemblerPredicate<"FeatureSDWA,FeatureVolcanicIslands">; + AssemblerPredicate<(all_of FeatureSDWA, FeatureVolcanicIslands)>; def HasSDWA9 : Predicate<"Subtarget->hasSDWA()">, - AssemblerPredicate<"FeatureGCN3Encoding,FeatureGFX9Insts,FeatureSDWA">; + AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureGFX9Insts,FeatureSDWA)>; def HasSDWA10 : Predicate<"Subtarget->hasSDWA()">, - AssemblerPredicate<"!FeatureGCN3Encoding,FeatureGFX10Insts,FeatureSDWA">; + AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureSDWA)>; def HasDPP : Predicate<"Subtarget->hasDPP()">, - AssemblerPredicate<"FeatureGCN3Encoding,FeatureDPP">; + AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureDPP)>; def HasDPP8 : Predicate<"Subtarget->hasDPP8()">, - AssemblerPredicate<"!FeatureGCN3Encoding,FeatureGFX10Insts,FeatureDPP8">; + AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureDPP8)>; def HasR128A16 : Predicate<"Subtarget->hasR128A16()">, - AssemblerPredicate<"FeatureR128A16">; + AssemblerPredicate<(all_of FeatureR128A16)>; + +def HasGFX10A16 : Predicate<"Subtarget->hasGFX10A16()">, + AssemblerPredicate<(all_of FeatureGFX10A16)>; + +def HasG16 : Predicate<"Subtarget->hasG16()">, + AssemblerPredicate<(all_of FeatureG16)>; def HasDPP16 : Predicate<"Subtarget->hasDPP()">, - AssemblerPredicate<"!FeatureGCN3Encoding,FeatureGFX10Insts,FeatureDPP">; + AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureDPP)>; def HasIntClamp : Predicate<"Subtarget->hasIntClamp()">, - AssemblerPredicate<"FeatureIntClamp">; + AssemblerPredicate<(all_of FeatureIntClamp)>; def HasMadMixInsts : Predicate<"Subtarget->hasMadMixInsts()">, - AssemblerPredicate<"FeatureMadMixInsts">; + AssemblerPredicate<(all_of FeatureMadMixInsts)>; def HasScalarStores : Predicate<"Subtarget->hasScalarStores()">, - AssemblerPredicate<"FeatureScalarStores">; + AssemblerPredicate<(all_of FeatureScalarStores)>; def HasScalarAtomics : Predicate<"Subtarget->hasScalarAtomics()">, - AssemblerPredicate<"FeatureScalarAtomics">; + AssemblerPredicate<(all_of FeatureScalarAtomics)>; def HasNoSdstCMPX : Predicate<"Subtarget->hasNoSdstCMPX()">, - AssemblerPredicate<"FeatureNoSdstCMPX">; + AssemblerPredicate<(all_of FeatureNoSdstCMPX)>; def HasSdstCMPX : Predicate<"!Subtarget->hasNoSdstCMPX()">, - AssemblerPredicate<"!FeatureNoSdstCMPX">; + AssemblerPredicate<(all_of (not FeatureNoSdstCMPX))>; def has16BankLDS : Predicate<"Subtarget->getLDSBankCount() == 16">; def has32BankLDS : Predicate<"Subtarget->getLDSBankCount() == 32">; def HasVGPRIndexMode : Predicate<"Subtarget->hasVGPRIndexMode()">, - AssemblerPredicate<"FeatureVGPRIndexMode">; + AssemblerPredicate<(all_of FeatureVGPRIndexMode)>; def HasMovrel : Predicate<"Subtarget->hasMovrel()">, - AssemblerPredicate<"FeatureMovrel">; + AssemblerPredicate<(all_of FeatureMovrel)>; def HasFmaMixInsts : Predicate<"Subtarget->hasFmaMixInsts()">, - AssemblerPredicate<"FeatureFmaMixInsts">; + AssemblerPredicate<(all_of FeatureFmaMixInsts)>; def HasDLInsts : Predicate<"Subtarget->hasDLInsts()">, - AssemblerPredicate<"FeatureDLInsts">; + AssemblerPredicate<(all_of FeatureDLInsts)>; def HasDot1Insts : Predicate<"Subtarget->hasDot1Insts()">, - AssemblerPredicate<"FeatureDot1Insts">; + AssemblerPredicate<(all_of FeatureDot1Insts)>; def HasDot2Insts : Predicate<"Subtarget->hasDot2Insts()">, - AssemblerPredicate<"FeatureDot2Insts">; + AssemblerPredicate<(all_of FeatureDot2Insts)>; def HasDot3Insts : Predicate<"Subtarget->hasDot3Insts()">, - AssemblerPredicate<"FeatureDot3Insts">; + AssemblerPredicate<(all_of FeatureDot3Insts)>; def HasDot4Insts : Predicate<"Subtarget->hasDot4Insts()">, - AssemblerPredicate<"FeatureDot4Insts">; + AssemblerPredicate<(all_of FeatureDot4Insts)>; def HasDot5Insts : Predicate<"Subtarget->hasDot5Insts()">, - AssemblerPredicate<"FeatureDot5Insts">; + AssemblerPredicate<(all_of FeatureDot5Insts)>; def HasDot6Insts : Predicate<"Subtarget->hasDot6Insts()">, - AssemblerPredicate<"FeatureDot6Insts">; + AssemblerPredicate<(all_of FeatureDot6Insts)>; + +def HasGetWaveIdInst : Predicate<"Subtarget->hasGetWaveIdInst()">, + AssemblerPredicate<(all_of FeatureGetWaveIdInst)>; def HasMAIInsts : Predicate<"Subtarget->hasMAIInsts()">, - AssemblerPredicate<"FeatureMAIInsts">; + AssemblerPredicate<(all_of FeatureMAIInsts)>; + +def HasSMemTimeInst : Predicate<"Subtarget->hasSMemTimeInst()">, + AssemblerPredicate<(all_of FeatureSMemTimeInst)>; + +def HasNoSMemTimeInst : Predicate<"!Subtarget->hasSMemTimeInst()">; def HasPkFmacF16Inst : Predicate<"Subtarget->hasPkFmacF16Inst()">, - AssemblerPredicate<"FeaturePkFmacF16Inst">; + AssemblerPredicate<(all_of FeaturePkFmacF16Inst)>; + +def HasMadMacF32Insts : Predicate<"Subtarget->hasMadMacF32Insts()">, + AssemblerPredicate<(all_of FeatureMadMacF32Insts)>; def HasAtomicFaddInsts : Predicate<"Subtarget->hasAtomicFaddInsts()">, - AssemblerPredicate<"FeatureAtomicFaddInsts">; + AssemblerPredicate<(all_of FeatureAtomicFaddInsts)>; + +def HasNoMadMacF32Insts : Predicate<"!Subtarget->hasMadMacF32Insts()">, + AssemblerPredicate<(all_of (not FeatureMadMacF32Insts))>; + +def HasDsSrc2Insts : Predicate<"!Subtarget->hasDsSrc2Insts()">, + AssemblerPredicate<(all_of FeatureDsSrc2Insts)>; def HasOffset3fBug : Predicate<"!Subtarget->hasOffset3fBug()">, - AssemblerPredicate<"FeatureOffset3fBug">; + AssemblerPredicate<(all_of FeatureOffset3fBug)>; def EnableLateCFGStructurize : Predicate< "EnableLateStructurizeCFG">; @@ -1165,7 +1255,7 @@ def EnableLateCFGStructurize : Predicate< include "SISchedule.td" include "GCNProcessors.td" include "AMDGPUInstrInfo.td" -include "AMDGPURegisterInfo.td" +include "SIRegisterInfo.td" include "AMDGPURegisterBanks.td" include "AMDGPUInstructions.td" include "SIInstrInfo.td" |