diff options
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h | 38 |
1 files changed, 3 insertions, 35 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h b/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h index 766750758efc..404e0fcd1166 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h @@ -9,53 +9,21 @@ #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H #define LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H -#include "AMDGPUInstrInfo.h" #include "llvm/CodeGen/Register.h" -#include <tuple> +#include <utility> namespace llvm { -class MachineInstr; class MachineRegisterInfo; namespace AMDGPU { -/// Returns Base register, constant offset, and offset def point. -std::tuple<Register, unsigned, MachineInstr *> +/// Returns base register and constant offset. +std::pair<Register, unsigned> getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg); bool isLegalVOP3PShuffleMask(ArrayRef<int> Mask); -/// Return number of address arguments, and the number of gradients for an image -/// intrinsic. -inline std::pair<int, int> -getImageNumVAddr(const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr, - const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode) { - const AMDGPU::MIMGDimInfo *DimInfo - = AMDGPU::getMIMGDimInfo(ImageDimIntr->Dim); - - int NumGradients = BaseOpcode->Gradients ? DimInfo->NumGradients : 0; - int NumCoords = BaseOpcode->Coordinates ? DimInfo->NumCoords : 0; - int NumLCM = BaseOpcode->LodOrClampOrMip ? 1 : 0; - int NumVAddr = BaseOpcode->NumExtraArgs + NumGradients + NumCoords + NumLCM; - return {NumVAddr, NumGradients}; -} - -/// Return index of dmask in an gMIR image intrinsic -inline int getDMaskIdx(const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode, - int NumDefs) { - assert(!BaseOpcode->Atomic); - return NumDefs + 1 + (BaseOpcode->Store ? 1 : 0); -} - -/// Return first address operand index in a gMIR image intrinsic. -inline int getImageVAddrIdxBegin(const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode, - int NumDefs) { - if (BaseOpcode->Atomic) - return NumDefs + 1 + (BaseOpcode->AtomicX2 ? 2 : 1); - return getDMaskIdx(BaseOpcode, NumDefs) + 1; -} - } } |
