diff options
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp index 9570680ad9cb..672266f0c11e 100644 --- a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp +++ b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp @@ -598,6 +598,11 @@ void SILowerI1Copies::lowerPhis() { MachineBasicBlock *PostDomBound = PDT->findNearestCommonDominator(DomBlocks); + + // FIXME: This fails to find irreducible cycles. If we have a def (other + // than a constant) in a pair of blocks that end up looping back to each + // other, it will be mishandle. Due to structurization this shouldn't occur + // in practice. unsigned FoundLoopLevel = LF.findLoop(PostDomBound); SSAUpdater.Initialize(DstReg); @@ -732,6 +737,9 @@ bool SILowerI1Copies::isConstantLaneMask(Register Reg, bool &Val) const { const MachineInstr *MI; for (;;) { MI = MRI->getUniqueVRegDef(Reg); + if (MI->getOpcode() == AMDGPU::IMPLICIT_DEF) + return true; + if (MI->getOpcode() != AMDGPU::COPY) break; @@ -808,9 +816,9 @@ void SILowerI1Copies::buildMergeLaneMasks(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, unsigned DstReg, unsigned PrevReg, unsigned CurReg) { - bool PrevVal; + bool PrevVal = false; bool PrevConstant = isConstantLaneMask(PrevReg, PrevVal); - bool CurVal; + bool CurVal = false; bool CurConstant = isConstantLaneMask(CurReg, CurVal); if (PrevConstant && CurConstant) { |