diff options
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFrameLowering.h')
-rw-r--r-- | llvm/lib/Target/ARM/ARMFrameLowering.h | 41 |
1 files changed, 23 insertions, 18 deletions
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.h b/llvm/lib/Target/ARM/ARMFrameLowering.h index 0462b01af707..4c2c07d64f57 100644 --- a/llvm/lib/Target/ARM/ARMFrameLowering.h +++ b/llvm/lib/Target/ARM/ARMFrameLowering.h @@ -9,9 +9,7 @@ #ifndef LLVM_LIB_TARGET_ARM_ARMFRAMELOWERING_H #define LLVM_LIB_TARGET_ARM_ARMFRAMELOWERING_H -#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/TargetFrameLowering.h" -#include <vector> namespace llvm { @@ -33,13 +31,14 @@ public: bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector<CalleeSavedInfo> &CSI, + ArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const override; - bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - std::vector<CalleeSavedInfo> &CSI, - const TargetRegisterInfo *TRI) const override; + bool + restoreCalleeSavedRegisters(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI, + MutableArrayRef<CalleeSavedInfo> CSI, + const TargetRegisterInfo *TRI) const override; bool keepFramePointer(const MachineFunction &MF) const override; @@ -49,9 +48,9 @@ public: bool hasReservedCallFrame(const MachineFunction &MF) const override; bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override; int getFrameIndexReference(const MachineFunction &MF, int FI, - unsigned &FrameReg) const override; + Register &FrameReg) const override; int ResolveFrameIndexReference(const MachineFunction &MF, int FI, - unsigned &FrameReg, int SPAdj) const; + Register &FrameReg, int SPAdj) const; void getCalleeSaves(const MachineFunction &MF, BitVector &SavedRegs) const override; @@ -62,25 +61,31 @@ public: MachineBasicBlock &MBB) const override; /// Returns true if the target will correctly handle shrink wrapping. - bool enableShrinkWrapping(const MachineFunction &MF) const override { - return true; - } + bool enableShrinkWrapping(const MachineFunction &MF) const override; + bool isProfitableForNoCSROpt(const Function &F) const override { // The no-CSR optimisation is bad for code size on ARM, because we can save // many registers with a single PUSH/POP pair. return false; } + bool + assignCalleeSavedSpillSlots(MachineFunction &MF, + const TargetRegisterInfo *TRI, + std::vector<CalleeSavedInfo> &CSI) const override; + + const SpillSlot * + getCalleeSavedSpillSlots(unsigned &NumEntries) const override; + private: void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector<CalleeSavedInfo> &CSI, unsigned StmOpc, - unsigned StrOpc, bool NoGap, - bool(*Func)(unsigned, bool), unsigned NumAlignedDPRCS2Regs, - unsigned MIFlags = 0) const; + ArrayRef<CalleeSavedInfo> CSI, unsigned StmOpc, + unsigned StrOpc, bool NoGap, bool (*Func)(unsigned, bool), + unsigned NumAlignedDPRCS2Regs, unsigned MIFlags = 0) const; void emitPopInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - std::vector<CalleeSavedInfo> &CSI, unsigned LdmOpc, + MutableArrayRef<CalleeSavedInfo> CSI, unsigned LdmOpc, unsigned LdrOpc, bool isVarArg, bool NoGap, - bool(*Func)(unsigned, bool), + bool (*Func)(unsigned, bool), unsigned NumAlignedDPRCS2Regs) const; MachineBasicBlock::iterator |