diff options
Diffstat (limited to 'llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 29 |
1 files changed, 15 insertions, 14 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index e410fe0aeff2..64d2e1bfa9b2 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -6,15 +6,15 @@ // //===----------------------------------------------------------------------===// -#include "ARMFeatures.h" #include "ARMBaseInstrInfo.h" -#include "Utils/ARMBaseInfo.h" +#include "ARMFeatures.h" #include "MCTargetDesc/ARMAddressingModes.h" #include "MCTargetDesc/ARMBaseInfo.h" #include "MCTargetDesc/ARMInstPrinter.h" #include "MCTargetDesc/ARMMCExpr.h" #include "MCTargetDesc/ARMMCTargetDesc.h" #include "TargetInfo/ARMTargetInfo.h" +#include "Utils/ARMBaseInfo.h" #include "llvm/ADT/APFloat.h" #include "llvm/ADT/APInt.h" #include "llvm/ADT/None.h" @@ -22,8 +22,8 @@ #include "llvm/ADT/SmallSet.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringMap.h" -#include "llvm/ADT/StringSet.h" #include "llvm/ADT/StringRef.h" +#include "llvm/ADT/StringSet.h" #include "llvm/ADT/StringSwitch.h" #include "llvm/ADT/Triple.h" #include "llvm/ADT/Twine.h" @@ -44,6 +44,7 @@ #include "llvm/MC/MCSubtargetInfo.h" #include "llvm/MC/MCSymbol.h" #include "llvm/MC/SubtargetFeature.h" +#include "llvm/MC/TargetRegistry.h" #include "llvm/Support/ARMBuildAttributes.h" #include "llvm/Support/ARMEHABI.h" #include "llvm/Support/Casting.h" @@ -53,7 +54,6 @@ #include "llvm/Support/MathExtras.h" #include "llvm/Support/SMLoc.h" #include "llvm/Support/TargetParser.h" -#include "llvm/Support/TargetRegistry.h" #include "llvm/Support/raw_ostream.h" #include <algorithm> #include <cassert> @@ -2478,14 +2478,15 @@ public: } void addVPTPredNOperands(MCInst &Inst, unsigned N) const { - assert(N == 2 && "Invalid number of operands!"); + assert(N == 3 && "Invalid number of operands!"); Inst.addOperand(MCOperand::createImm(unsigned(getVPTPred()))); unsigned RegNum = getVPTPred() == ARMVCC::None ? 0: ARM::P0; Inst.addOperand(MCOperand::createReg(RegNum)); + Inst.addOperand(MCOperand::createReg(0)); } void addVPTPredROperands(MCInst &Inst, unsigned N) const { - assert(N == 3 && "Invalid number of operands!"); + assert(N == 4 && "Invalid number of operands!"); addVPTPredNOperands(Inst, N-1); unsigned RegNum; if (getVPTPred() == ARMVCC::None) { @@ -3343,16 +3344,16 @@ public: // regs) or q0-q4 (for 4) // // The MVE instructions taking a register range of this kind will - // need an operand in the QQPR or QQQQPR class, representing the + // need an operand in the MQQPR or MQQQQPR class, representing the // entire range as a unit. So we must translate into that class, // by finding the index of the base register in the MQPR reg // class, and returning the super-register at the corresponding // index in the target class. const MCRegisterClass *RC_in = &ARMMCRegisterClasses[ARM::MQPRRegClassID]; - const MCRegisterClass *RC_out = (VectorList.Count == 2) ? - &ARMMCRegisterClasses[ARM::QQPRRegClassID] : - &ARMMCRegisterClasses[ARM::QQQQPRRegClassID]; + const MCRegisterClass *RC_out = + (VectorList.Count == 2) ? &ARMMCRegisterClasses[ARM::MQQPRRegClassID] + : &ARMMCRegisterClasses[ARM::MQQQQPRRegClassID]; unsigned I, E = RC_out->getNumRegs(); for (I = 0; I < E; I++) @@ -10960,7 +10961,7 @@ bool ARMAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, // Only after the instruction is fully processed, we can validate it if (wasInITBlock && hasV8Ops() && isThumb() && - !isV8EligibleForIT(&Inst)) { + !isV8EligibleForIT(&Inst) && !getTargetOptions().MCNoDeprecatedWarn) { Warning(IDLoc, "deprecated instruction in IT block"); } } @@ -11777,13 +11778,13 @@ bool ARMAsmParser::parseDirectiveEven(SMLoc L) { return true; if (!Section) { - getStreamer().InitSections(false); + getStreamer().initSections(false, getSTI()); Section = getStreamer().getCurrentSectionOnly(); } assert(Section && "must have section to emit alignment"); if (Section->UseCodeAlign()) - getStreamer().emitCodeAlignment(2); + getStreamer().emitCodeAlignment(2, &getSTI()); else getStreamer().emitValueToAlignment(2); @@ -11985,7 +11986,7 @@ bool ARMAsmParser::parseDirectiveAlign(SMLoc L) { const MCSection *Section = getStreamer().getCurrentSectionOnly(); assert(Section && "must have section to emit alignment"); if (Section->UseCodeAlign()) - getStreamer().emitCodeAlignment(4, 0); + getStreamer().emitCodeAlignment(4, &getSTI(), 0); else getStreamer().emitValueToAlignment(4, 0, 1, 0); return false; |