diff options
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonIntrinsicsV60.td')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonIntrinsicsV60.td | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonIntrinsicsV60.td b/llvm/lib/Target/Hexagon/HexagonIntrinsicsV60.td index a60c80beb5d6..1245ee7974b5 100644 --- a/llvm/lib/Target/Hexagon/HexagonIntrinsicsV60.td +++ b/llvm/lib/Target/Hexagon/HexagonIntrinsicsV60.td @@ -25,59 +25,59 @@ def : Pat < (v32i32 (int_hexagon_V6_hi_128B (v64i32 HvxWR:$src1))), (v32i32 (EXTRACT_SUBREG (v64i32 HvxWR:$src1), vsub_hi)) >; } -def : Pat <(v512i1 (bitconvert (v16i32 HvxVR:$src1))), - (v512i1 (V6_vandvrt(v16i32 HvxVR:$src1), (A2_tfrsi 0x01010101)))>; +def : Pat <(v64i1 (bitconvert (v16i32 HvxVR:$src1))), + (v64i1 (V6_vandvrt(v16i32 HvxVR:$src1), (A2_tfrsi 0x01010101)))>; -def : Pat <(v512i1 (bitconvert (v32i16 HvxVR:$src1))), - (v512i1 (V6_vandvrt(v32i16 HvxVR:$src1), (A2_tfrsi 0x01010101)))>; +def : Pat <(v64i1 (bitconvert (v32i16 HvxVR:$src1))), + (v64i1 (V6_vandvrt(v32i16 HvxVR:$src1), (A2_tfrsi 0x01010101)))>; -def : Pat <(v512i1 (bitconvert (v64i8 HvxVR:$src1))), - (v512i1 (V6_vandvrt(v64i8 HvxVR:$src1), (A2_tfrsi 0x01010101)))>; +def : Pat <(v64i1 (bitconvert (v64i8 HvxVR:$src1))), + (v64i1 (V6_vandvrt(v64i8 HvxVR:$src1), (A2_tfrsi 0x01010101)))>; -def : Pat <(v16i32 (bitconvert (v512i1 HvxQR:$src1))), - (v16i32 (V6_vandqrt(v512i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>; +def : Pat <(v16i32 (bitconvert (v64i1 HvxQR:$src1))), + (v16i32 (V6_vandqrt(v64i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>; -def : Pat <(v32i16 (bitconvert (v512i1 HvxQR:$src1))), - (v32i16 (V6_vandqrt(v512i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>; +def : Pat <(v32i16 (bitconvert (v64i1 HvxQR:$src1))), + (v32i16 (V6_vandqrt(v64i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>; -def : Pat <(v64i8 (bitconvert (v512i1 HvxQR:$src1))), - (v64i8 (V6_vandqrt(v512i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>; +def : Pat <(v64i8 (bitconvert (v64i1 HvxQR:$src1))), + (v64i8 (V6_vandqrt(v64i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>; -def : Pat <(v1024i1 (bitconvert (v32i32 HvxVR:$src1))), - (v1024i1 (V6_vandvrt (v32i32 HvxVR:$src1), (A2_tfrsi 0x01010101)))>; +def : Pat <(v128i1 (bitconvert (v32i32 HvxVR:$src1))), + (v128i1 (V6_vandvrt (v32i32 HvxVR:$src1), (A2_tfrsi 0x01010101)))>; -def : Pat <(v1024i1 (bitconvert (v64i16 HvxVR:$src1))), - (v1024i1 (V6_vandvrt (v64i16 HvxVR:$src1), (A2_tfrsi 0x01010101)))>; +def : Pat <(v128i1 (bitconvert (v64i16 HvxVR:$src1))), + (v128i1 (V6_vandvrt (v64i16 HvxVR:$src1), (A2_tfrsi 0x01010101)))>; -def : Pat <(v1024i1 (bitconvert (v128i8 HvxVR:$src1))), - (v1024i1 (V6_vandvrt (v128i8 HvxVR:$src1), (A2_tfrsi 0x01010101)))>; +def : Pat <(v128i1 (bitconvert (v128i8 HvxVR:$src1))), + (v128i1 (V6_vandvrt (v128i8 HvxVR:$src1), (A2_tfrsi 0x01010101)))>; -def : Pat <(v32i32 (bitconvert (v1024i1 HvxQR:$src1))), - (v32i32 (V6_vandqrt (v1024i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>; +def : Pat <(v32i32 (bitconvert (v128i1 HvxQR:$src1))), + (v32i32 (V6_vandqrt (v128i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>; -def : Pat <(v64i16 (bitconvert (v1024i1 HvxQR:$src1))), - (v64i16 (V6_vandqrt (v1024i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>; +def : Pat <(v64i16 (bitconvert (v128i1 HvxQR:$src1))), + (v64i16 (V6_vandqrt (v128i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>; -def : Pat <(v128i8 (bitconvert (v1024i1 HvxQR:$src1))), - (v128i8 (V6_vandqrt (v1024i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>; +def : Pat <(v128i8 (bitconvert (v128i1 HvxQR:$src1))), + (v128i8 (V6_vandqrt (v128i1 HvxQR:$src1), (A2_tfrsi 0x01010101)))>; let AddedComplexity = 140 in { -def : Pat <(store (v512i1 HvxQR:$src1), (i32 IntRegs:$addr)), +def : Pat <(store (v64i1 HvxQR:$src1), (i32 IntRegs:$addr)), (V6_vS32b_ai IntRegs:$addr, 0, - (v16i32 (V6_vandqrt (v512i1 HvxQR:$src1), + (v16i32 (V6_vandqrt (v64i1 HvxQR:$src1), (A2_tfrsi 0x01010101))))>; -def : Pat <(v512i1 (load (i32 IntRegs:$addr))), - (v512i1 (V6_vandvrt +def : Pat <(v64i1 (load (i32 IntRegs:$addr))), + (v64i1 (V6_vandvrt (v16i32 (V6_vL32b_ai IntRegs:$addr, 0)), (A2_tfrsi 0x01010101)))>; -def : Pat <(store (v1024i1 HvxQR:$src1), (i32 IntRegs:$addr)), +def : Pat <(store (v128i1 HvxQR:$src1), (i32 IntRegs:$addr)), (V6_vS32b_ai IntRegs:$addr, 0, - (v32i32 (V6_vandqrt (v1024i1 HvxQR:$src1), + (v32i32 (V6_vandqrt (v128i1 HvxQR:$src1), (A2_tfrsi 0x01010101))))>; -def : Pat <(v1024i1 (load (i32 IntRegs:$addr))), - (v1024i1 (V6_vandvrt +def : Pat <(v128i1 (load (i32 IntRegs:$addr))), + (v128i1 (V6_vandvrt (v32i32 (V6_vL32b_ai IntRegs:$addr, 0)), (A2_tfrsi 0x01010101)))>; } |