diff options
Diffstat (limited to 'llvm/lib/Target/MSP430/MSP430RegisterInfo.td')
| -rw-r--r-- | llvm/lib/Target/MSP430/MSP430RegisterInfo.td | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/llvm/lib/Target/MSP430/MSP430RegisterInfo.td b/llvm/lib/Target/MSP430/MSP430RegisterInfo.td index 11003dba383f..61cc72d494b5 100644 --- a/llvm/lib/Target/MSP430/MSP430RegisterInfo.td +++ b/llvm/lib/Target/MSP430/MSP430RegisterInfo.td @@ -15,6 +15,7 @@ class MSP430Reg<bits<4> num, string n, list<string> alt = []> : Register<n> { let Namespace = "MSP430"; let HWEncoding{3-0} = num; let AltNames = alt; + let DwarfNumbers = [num]; } class MSP430RegWithSubregs<bits<4> num, string n, list<Register> subregs, @@ -24,6 +25,7 @@ class MSP430RegWithSubregs<bits<4> num, string n, list<Register> subregs, let Namespace = "MSP430"; let HWEncoding{3-0} = num; let AltNames = alt; + let DwarfNumbers = [num]; } //===----------------------------------------------------------------------===// @@ -34,7 +36,7 @@ def PCB : MSP430Reg<0, "r0", ["pc"]>; def SPB : MSP430Reg<1, "r1", ["sp"]>; def SRB : MSP430Reg<2, "r2", ["sr"]>; def CGB : MSP430Reg<3, "r3", ["cg"]>; -def FPB : MSP430Reg<4, "r4", ["fp"]>; +def R4B : MSP430Reg<4, "r4", ["fp"]>; def R5B : MSP430Reg<5, "r5">; def R6B : MSP430Reg<6, "r6">; def R7B : MSP430Reg<7, "r7">; @@ -54,7 +56,7 @@ def PC : MSP430RegWithSubregs<0, "r0", [PCB], ["pc"]>; def SP : MSP430RegWithSubregs<1, "r1", [SPB], ["sp"]>; def SR : MSP430RegWithSubregs<2, "r2", [SRB], ["sr"]>; def CG : MSP430RegWithSubregs<3, "r3", [CGB], ["cg"]>; -def FP : MSP430RegWithSubregs<4, "r4", [FPB], ["fp"]>; +def R4 : MSP430RegWithSubregs<4, "r4", [R4B], ["fp"]>; def R5 : MSP430RegWithSubregs<5, "r5", [R5B]>; def R6 : MSP430RegWithSubregs<6, "r6", [R6B]>; def R7 : MSP430RegWithSubregs<7, "r7", [R7B]>; @@ -72,7 +74,7 @@ def GR8 : RegisterClass<"MSP430", [i8], 8, // Volatile registers (add R12B, R13B, R14B, R15B, R11B, R10B, R9B, R8B, R7B, R6B, R5B, // Frame pointer, sometimes allocable - FPB, + R4B, // Volatile, but not allocable PCB, SPB, SRB, CGB)>; @@ -80,6 +82,6 @@ def GR16 : RegisterClass<"MSP430", [i16], 16, // Volatile registers (add R12, R13, R14, R15, R11, R10, R9, R8, R7, R6, R5, // Frame pointer, sometimes allocable - FP, + R4, // Volatile, but not allocable PC, SP, SR, CG)>; |