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Diffstat (limited to 'llvm/lib/Target/VE/VE.td')
| -rw-r--r-- | llvm/lib/Target/VE/VE.td | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/llvm/lib/Target/VE/VE.td b/llvm/lib/Target/VE/VE.td new file mode 100644 index 000000000000..7404321b1a06 --- /dev/null +++ b/llvm/lib/Target/VE/VE.td @@ -0,0 +1,56 @@ +//===-- VE.td - Describe the VE Target Machine -------------*- tablegen -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// +//===----------------------------------------------------------------------===// + +//===----------------------------------------------------------------------===// +// Target-independent interfaces which we are implementing +//===----------------------------------------------------------------------===// + +include "llvm/Target/Target.td" + +//===----------------------------------------------------------------------===// +// VE Subtarget features. +// + +//===----------------------------------------------------------------------===// +// Register File, Calling Conv, Instruction Descriptions +//===----------------------------------------------------------------------===// + +include "VERegisterInfo.td" +include "VECallingConv.td" +include "VEInstrInfo.td" + +def VEInstrInfo : InstrInfo; + +//===----------------------------------------------------------------------===// +// VE processors supported. +//===----------------------------------------------------------------------===// + +class Proc<string Name, list<SubtargetFeature> Features> + : Processor<Name, NoItineraries, Features>; + +def : Proc<"ve", []>; + +//===----------------------------------------------------------------------===// +// Declare the target which we are implementing +//===----------------------------------------------------------------------===// + +def VEAsmWriter : AsmWriter { + string AsmWriterClassName = "InstPrinter"; + int PassSubtarget = 1; + int Variant = 0; +} + +def VE : Target { + // Pull in Instruction Info: + let InstructionSet = VEInstrInfo; + let AssemblyWriters = [VEAsmWriter]; + let AllowRegisterRenaming = 1; +} |
