diff options
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp')
| -rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 50 |
1 files changed, 24 insertions, 26 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp index 171d59ae4c6b..642aa6b4028a 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp @@ -157,7 +157,7 @@ private: void addLoadStoreOperands(const Address &Addr, const MachineInstrBuilder &MIB, MachineMemOperand *MMO); unsigned maskI1Value(unsigned Reg, const Value *V); - unsigned getRegForI1Value(const Value *V, bool &Not); + unsigned getRegForI1Value(const Value *V, const BasicBlock *BB, bool &Not); unsigned zeroExtendToI32(unsigned Reg, const Value *V, MVT::SimpleValueType From); unsigned signExtendToI32(unsigned Reg, const Value *V, @@ -418,20 +418,17 @@ unsigned WebAssemblyFastISel::maskI1Value(unsigned Reg, const Value *V) { return zeroExtendToI32(Reg, V, MVT::i1); } -unsigned WebAssemblyFastISel::getRegForI1Value(const Value *V, bool &Not) { +unsigned WebAssemblyFastISel::getRegForI1Value(const Value *V, + const BasicBlock *BB, + bool &Not) { if (const auto *ICmp = dyn_cast<ICmpInst>(V)) if (const ConstantInt *C = dyn_cast<ConstantInt>(ICmp->getOperand(1))) - if (ICmp->isEquality() && C->isZero() && C->getType()->isIntegerTy(32)) { + if (ICmp->isEquality() && C->isZero() && C->getType()->isIntegerTy(32) && + ICmp->getParent() == BB) { Not = ICmp->isTrueWhenEqual(); return getRegForValue(ICmp->getOperand(0)); } - Value *NotV; - if (match(V, m_Not(m_Value(NotV))) && V->getType()->isIntegerTy(32)) { - Not = true; - return getRegForValue(NotV); - } - Not = false; unsigned Reg = getRegForValue(V); if (Reg == 0) @@ -648,11 +645,11 @@ bool WebAssemblyFastISel::fastLowerArguments() { unsigned I = 0; for (auto const &Arg : F->args()) { const AttributeList &Attrs = F->getAttributes(); - if (Attrs.hasParamAttribute(I, Attribute::ByVal) || - Attrs.hasParamAttribute(I, Attribute::SwiftSelf) || - Attrs.hasParamAttribute(I, Attribute::SwiftError) || - Attrs.hasParamAttribute(I, Attribute::InAlloca) || - Attrs.hasParamAttribute(I, Attribute::Nest)) + if (Attrs.hasParamAttr(I, Attribute::ByVal) || + Attrs.hasParamAttr(I, Attribute::SwiftSelf) || + Attrs.hasParamAttr(I, Attribute::SwiftError) || + Attrs.hasParamAttr(I, Attribute::InAlloca) || + Attrs.hasParamAttr(I, Attribute::Nest)) return false; Type *ArgTy = Arg.getType(); @@ -825,25 +822,25 @@ bool WebAssemblyFastISel::selectCall(const Instruction *I) { } SmallVector<unsigned, 8> Args; - for (unsigned I = 0, E = Call->getNumArgOperands(); I < E; ++I) { + for (unsigned I = 0, E = Call->arg_size(); I < E; ++I) { Value *V = Call->getArgOperand(I); MVT::SimpleValueType ArgTy = getSimpleType(V->getType()); if (ArgTy == MVT::INVALID_SIMPLE_VALUE_TYPE) return false; const AttributeList &Attrs = Call->getAttributes(); - if (Attrs.hasParamAttribute(I, Attribute::ByVal) || - Attrs.hasParamAttribute(I, Attribute::SwiftSelf) || - Attrs.hasParamAttribute(I, Attribute::SwiftError) || - Attrs.hasParamAttribute(I, Attribute::InAlloca) || - Attrs.hasParamAttribute(I, Attribute::Nest)) + if (Attrs.hasParamAttr(I, Attribute::ByVal) || + Attrs.hasParamAttr(I, Attribute::SwiftSelf) || + Attrs.hasParamAttr(I, Attribute::SwiftError) || + Attrs.hasParamAttr(I, Attribute::InAlloca) || + Attrs.hasParamAttr(I, Attribute::Nest)) return false; unsigned Reg; - if (Attrs.hasParamAttribute(I, Attribute::SExt)) + if (Attrs.hasParamAttr(I, Attribute::SExt)) Reg = getRegForSignedValue(V); - else if (Attrs.hasParamAttribute(I, Attribute::ZExt)) + else if (Attrs.hasParamAttr(I, Attribute::ZExt)) Reg = getRegForUnsignedValue(V); else Reg = getRegForValue(V); @@ -912,7 +909,8 @@ bool WebAssemblyFastISel::selectSelect(const Instruction *I) { const auto *Select = cast<SelectInst>(I); bool Not; - unsigned CondReg = getRegForI1Value(Select->getCondition(), Not); + unsigned CondReg = + getRegForI1Value(Select->getCondition(), I->getParent(), Not); if (CondReg == 0) return false; @@ -1312,7 +1310,7 @@ bool WebAssemblyFastISel::selectBr(const Instruction *I) { MachineBasicBlock *FBB = FuncInfo.MBBMap[Br->getSuccessor(1)]; bool Not; - unsigned CondReg = getRegForI1Value(Br->getCondition(), Not); + unsigned CondReg = getRegForI1Value(Br->getCondition(), Br->getParent(), Not); if (CondReg == 0) return false; @@ -1370,9 +1368,9 @@ bool WebAssemblyFastISel::selectRet(const Instruction *I) { } unsigned Reg; - if (FuncInfo.Fn->getAttributes().hasAttribute(0, Attribute::SExt)) + if (FuncInfo.Fn->getAttributes().hasRetAttr(Attribute::SExt)) Reg = getRegForSignedValue(RV); - else if (FuncInfo.Fn->getAttributes().hasAttribute(0, Attribute::ZExt)) + else if (FuncInfo.Fn->getAttributes().hasRetAttr(Attribute::ZExt)) Reg = getRegForUnsignedValue(RV); else Reg = getRegForValue(RV); |
