diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86CallLowering.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86CallLowering.cpp | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/llvm/lib/Target/X86/X86CallLowering.cpp b/llvm/lib/Target/X86/X86CallLowering.cpp index 57bf799cf89c..319dc9470604 100644 --- a/llvm/lib/Target/X86/X86CallLowering.cpp +++ b/llvm/lib/Target/X86/X86CallLowering.cpp @@ -108,17 +108,15 @@ struct OutgoingValueHandler : public CallLowering::ValueHandler { MachinePointerInfo &MPO) override { LLT p0 = LLT::pointer(0, DL.getPointerSizeInBits(0)); LLT SType = LLT::scalar(DL.getPointerSizeInBits(0)); - Register SPReg = MRI.createGenericVirtualRegister(p0); - MIRBuilder.buildCopy(SPReg, STI.getRegisterInfo()->getStackRegister()); + auto SPReg = + MIRBuilder.buildCopy(p0, STI.getRegisterInfo()->getStackRegister()); - Register OffsetReg = MRI.createGenericVirtualRegister(SType); - MIRBuilder.buildConstant(OffsetReg, Offset); + auto OffsetReg = MIRBuilder.buildConstant(SType, Offset); - Register AddrReg = MRI.createGenericVirtualRegister(p0); - MIRBuilder.buildPtrAdd(AddrReg, SPReg, OffsetReg); + auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); MPO = MachinePointerInfo::getStack(MIRBuilder.getMF(), Offset); - return AddrReg; + return AddrReg.getReg(0); } void assignValueToReg(Register ValVReg, Register PhysReg, @@ -139,7 +137,7 @@ struct OutgoingValueHandler : public CallLowering::ValueHandler { if (PhysRegSize > ValSize && LocSize == ValSize) { assert((PhysRegSize == 128 || PhysRegSize == 80) && "We expect that to be 128 bit"); auto MIB = MIRBuilder.buildAnyExt(LLT::scalar(PhysRegSize), ValVReg); - ExtReg = MIB->getOperand(0).getReg(); + ExtReg = MIB.getReg(0); } else ExtReg = extendRegister(ValVReg, VA); @@ -148,10 +146,12 @@ struct OutgoingValueHandler : public CallLowering::ValueHandler { void assignValueToAddress(Register ValVReg, Register Addr, uint64_t Size, MachinePointerInfo &MPO, CCValAssign &VA) override { + MachineFunction &MF = MIRBuilder.getMF(); Register ExtReg = extendRegister(ValVReg, VA); - auto MMO = MIRBuilder.getMF().getMachineMemOperand( - MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(), - /* Alignment */ 1); + + auto MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOStore, + VA.getLocVT().getStoreSize(), + inferAlignFromPtrInfo(MF, MPO)); MIRBuilder.buildStore(ExtReg, Addr, *MMO); } @@ -240,17 +240,17 @@ struct IncomingValueHandler : public CallLowering::ValueHandler { int FI = MFI.CreateFixedObject(Size, Offset, true); MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI); - Register AddrReg = MRI.createGenericVirtualRegister( - LLT::pointer(0, DL.getPointerSizeInBits(0))); - MIRBuilder.buildFrameIndex(AddrReg, FI); - return AddrReg; + return MIRBuilder + .buildFrameIndex(LLT::pointer(0, DL.getPointerSizeInBits(0)), FI) + .getReg(0); } void assignValueToAddress(Register ValVReg, Register Addr, uint64_t Size, MachinePointerInfo &MPO, CCValAssign &VA) override { - auto MMO = MIRBuilder.getMF().getMachineMemOperand( + MachineFunction &MF = MIRBuilder.getMF(); + auto MMO = MF.getMachineMemOperand( MPO, MachineMemOperand::MOLoad | MachineMemOperand::MOInvariant, Size, - 1); + inferAlignFromPtrInfo(MF, MPO)); MIRBuilder.buildLoad(ValVReg, Addr, *MMO); } |