diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86MachineFunctionInfo.h')
-rw-r--r-- | llvm/lib/Target/X86/X86MachineFunctionInfo.h | 52 |
1 files changed, 45 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86MachineFunctionInfo.h b/llvm/lib/Target/X86/X86MachineFunctionInfo.h index 5cb80a082b56..eedad952c3b9 100644 --- a/llvm/lib/Target/X86/X86MachineFunctionInfo.h +++ b/llvm/lib/Target/X86/X86MachineFunctionInfo.h @@ -13,9 +13,10 @@ #ifndef LLVM_LIB_TARGET_X86_X86MACHINEFUNCTIONINFO_H #define LLVM_LIB_TARGET_X86_X86MACHINEFUNCTIONINFO_H +#include "llvm/ADT/ArrayRef.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/CallingConvLower.h" #include "llvm/CodeGen/MachineFunction.h" -#include "llvm/Support/MachineValueType.h" namespace llvm { @@ -62,12 +63,12 @@ class X86MachineFunctionInfo : public MachineFunctionInfo { /// SRetReturnReg - Some subtargets require that sret lowering includes /// returning the value of the returned struct in a register. This field /// holds the virtual register into which the sret argument is passed. - unsigned SRetReturnReg = 0; + Register SRetReturnReg; /// GlobalBaseReg - keeps track of the virtual register initialized for /// use as the global base register. This is used for PIC in some PIC /// relocation models. - unsigned GlobalBaseReg = 0; + Register GlobalBaseReg; /// VarArgsFrameIndex - FrameIndex for start of varargs area. int VarArgsFrameIndex = 0; @@ -104,6 +105,13 @@ class X86MachineFunctionInfo : public MachineFunctionInfo { /// True if this function has WIN_ALLOCA instructions. bool HasWinAlloca = false; + /// True if this function has any preallocated calls. + bool HasPreallocatedCall = false; + + ValueMap<const Value *, size_t> PreallocatedIds; + SmallVector<size_t, 0> PreallocatedStackSizes; + SmallVector<SmallVector<size_t, 4>, 0> PreallocatedArgOffsets; + private: /// ForwardedMustTailRegParms - A list of virtual and physical registers /// that must be forwarded to every musttail call. @@ -143,11 +151,11 @@ public: int getTCReturnAddrDelta() const { return TailCallReturnAddrDelta; } void setTCReturnAddrDelta(int delta) {TailCallReturnAddrDelta = delta;} - unsigned getSRetReturnReg() const { return SRetReturnReg; } - void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; } + Register getSRetReturnReg() const { return SRetReturnReg; } + void setSRetReturnReg(Register Reg) { SRetReturnReg = Reg; } - unsigned getGlobalBaseReg() const { return GlobalBaseReg; } - void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; } + Register getGlobalBaseReg() const { return GlobalBaseReg; } + void setGlobalBaseReg(Register Reg) { GlobalBaseReg = Reg; } int getVarArgsFrameIndex() const { return VarArgsFrameIndex; } void setVarArgsFrameIndex(int Idx) { VarArgsFrameIndex = Idx; } @@ -185,6 +193,36 @@ public: bool hasWinAlloca() const { return HasWinAlloca; } void setHasWinAlloca(bool v) { HasWinAlloca = v; } + + bool hasPreallocatedCall() const { return HasPreallocatedCall; } + void setHasPreallocatedCall(bool v) { HasPreallocatedCall = v; } + + size_t getPreallocatedIdForCallSite(const Value *CS) { + auto Insert = PreallocatedIds.insert({CS, PreallocatedIds.size()}); + if (Insert.second) { + PreallocatedStackSizes.push_back(0); + PreallocatedArgOffsets.emplace_back(); + } + return Insert.first->second; + } + + void setPreallocatedStackSize(size_t Id, size_t StackSize) { + PreallocatedStackSizes[Id] = StackSize; + } + + size_t getPreallocatedStackSize(const size_t Id) { + assert(PreallocatedStackSizes[Id] != 0 && "stack size not set"); + return PreallocatedStackSizes[Id]; + } + + void setPreallocatedArgOffsets(size_t Id, ArrayRef<size_t> AO) { + PreallocatedArgOffsets[Id].assign(AO.begin(), AO.end()); + } + + const ArrayRef<size_t> getPreallocatedArgOffsets(const size_t Id) { + assert(!PreallocatedArgOffsets[Id].empty() && "arg offsets not set"); + return PreallocatedArgOffsets[Id]; + } }; } // End llvm namespace |