diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86SchedSkylakeServer.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedSkylakeServer.td | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td index ba80d47c4eb6..1d8417aef41e 100644 --- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td @@ -123,12 +123,17 @@ defm : X86WriteRes<WriteIMul16ImmLd, [SKXPort1,SKXPort0156,SKXPort23], 8, [1,1 defm : X86WriteRes<WriteIMul16Reg, [SKXPort1], 3, [1], 1>; defm : X86WriteRes<WriteIMul16RegLd, [SKXPort1,SKXPort0156,SKXPort23], 8, [1,1,1], 3>; defm : SKXWriteResPair<WriteIMul32, [SKXPort1,SKXPort06,SKXPort0156], 4, [1,1,1], 3>; +defm : SKXWriteResPair<WriteMULX32, [SKXPort1,SKXPort06,SKXPort0156], 3, [1,1,1], 3>; defm : SKXWriteResPair<WriteIMul32Imm, [SKXPort1], 3>; defm : SKXWriteResPair<WriteIMul32Reg, [SKXPort1], 3>; defm : SKXWriteResPair<WriteIMul64, [SKXPort1,SKXPort5], 4, [1,1], 2>; +defm : SKXWriteResPair<WriteMULX64, [SKXPort1,SKXPort5], 3, [1,1], 2>; defm : SKXWriteResPair<WriteIMul64Imm, [SKXPort1], 3>; defm : SKXWriteResPair<WriteIMul64Reg, [SKXPort1], 3>; -def : WriteRes<WriteIMulH, []> { let Latency = 3; } +def SKXWriteIMulH : WriteRes<WriteIMulH, []> { let Latency = 4; } +def : WriteRes<WriteIMulHLd, []> { + let Latency = !add(SKXWriteIMulH.Latency, SkylakeServerModel.LoadLatency); +} defm : X86WriteRes<WriteBSWAP32, [SKXPort15], 1, [1], 1>; defm : X86WriteRes<WriteBSWAP64, [SKXPort06, SKXPort15], 2, [1,1], 2>; @@ -1431,7 +1436,7 @@ def SKXWriteResGroup104 : SchedWriteRes<[SKXPort6,SKXPort23,SKXPort0156]> { let NumMicroOps = 3; let ResourceCycles = [1,1,1]; } -def: InstRW<[SKXWriteResGroup104], (instrs LRETQ, RETQ)>; +def: InstRW<[SKXWriteResGroup104], (instrs LRET64, RET64)>; def SKXWriteResGroup106 : SchedWriteRes<[SKXPort4,SKXPort5,SKXPort237]> { let Latency = 7; |