summaryrefslogtreecommitdiff
path: root/llvm/utils/TableGen/X86DisassemblerTables.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/utils/TableGen/X86DisassemblerTables.cpp')
-rw-r--r--llvm/utils/TableGen/X86DisassemblerTables.cpp278
1 files changed, 141 insertions, 137 deletions
diff --git a/llvm/utils/TableGen/X86DisassemblerTables.cpp b/llvm/utils/TableGen/X86DisassemblerTables.cpp
index 708c92aecfc8..959e0fda50b8 100644
--- a/llvm/utils/TableGen/X86DisassemblerTables.cpp
+++ b/llvm/utils/TableGen/X86DisassemblerTables.cpp
@@ -31,39 +31,47 @@ using namespace X86Disassembler;
/// @param insnContext - The instruction class to transform to a string.
/// @return - A statically-allocated string constant that contains the
/// name of the instruction class.
-static inline const char* stringForContext(InstructionContext insnContext) {
+static inline const char *stringForContext(InstructionContext insnContext) {
switch (insnContext) {
default:
llvm_unreachable("Unhandled instruction class");
-#define ENUM_ENTRY(n, r, d) case n: return #n; break;
-#define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) ENUM_ENTRY(n##_K_B, r, d)\
- ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)\
- ENUM_ENTRY(n##_KZ_B, r, d)
- INSTRUCTION_CONTEXTS
+#define ENUM_ENTRY(n, r, d) \
+ case n: \
+ return #n; \
+ break;
+#define ENUM_ENTRY_K_B(n, r, d) \
+ ENUM_ENTRY(n, r, d) \
+ ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) \
+ ENUM_ENTRY(n##_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d)
+ INSTRUCTION_CONTEXTS
#undef ENUM_ENTRY
#undef ENUM_ENTRY_K_B
}
}
/// stringForOperandType - Like stringForContext, but for OperandTypes.
-static inline const char* stringForOperandType(OperandType type) {
+static inline const char *stringForOperandType(OperandType type) {
switch (type) {
default:
llvm_unreachable("Unhandled type");
-#define ENUM_ENTRY(i, d) case i: return #i;
- TYPES
+#define ENUM_ENTRY(i, d) \
+ case i: \
+ return #i;
+ TYPES
#undef ENUM_ENTRY
}
}
/// stringForOperandEncoding - like stringForContext, but for
/// OperandEncodings.
-static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
+static inline const char *stringForOperandEncoding(OperandEncoding encoding) {
switch (encoding) {
default:
llvm_unreachable("Unhandled encoding");
-#define ENUM_ENTRY(i, d) case i: return #i;
- ENCODINGS
+#define ENUM_ENTRY(i, d) \
+ case i: \
+ return #i;
+ ENCODINGS
#undef ENUM_ENTRY
}
}
@@ -83,17 +91,17 @@ static inline bool inheritsFrom(InstructionContext child,
switch (parent) {
case IC:
- return(inheritsFrom(child, IC_64BIT, AdSize64) ||
- (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) ||
- inheritsFrom(child, IC_ADSIZE) ||
- (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) ||
- (noPrefix && inheritsFrom(child, IC_XS, noPrefix)));
+ return (inheritsFrom(child, IC_64BIT, AdSize64) ||
+ (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) ||
+ inheritsFrom(child, IC_ADSIZE) ||
+ (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) ||
+ (noPrefix && inheritsFrom(child, IC_XS, noPrefix)));
case IC_64BIT:
- return(inheritsFrom(child, IC_64BIT_REXW) ||
- (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) ||
- (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) ||
- (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix)) ||
- (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix)));
+ return (inheritsFrom(child, IC_64BIT_REXW) ||
+ (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) ||
+ (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) ||
+ (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix)) ||
+ (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix)));
case IC_OPSIZE:
return inheritsFrom(child, IC_64BIT_OPSIZE) ||
inheritsFrom(child, IC_OPSIZE_ADSIZE);
@@ -118,20 +126,20 @@ static inline bool inheritsFrom(InstructionContext child,
case IC_XS_ADSIZE:
return inheritsFrom(child, IC_64BIT_XS_ADSIZE);
case IC_64BIT_REXW:
- return((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) ||
- (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) ||
- (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) ||
- (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)));
+ return ((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) ||
+ (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) ||
+ (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) ||
+ (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)));
case IC_64BIT_OPSIZE:
return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) ||
(!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) ||
(!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE));
case IC_64BIT_XD:
- return(inheritsFrom(child, IC_64BIT_REXW_XD) ||
- (!AdSize64 && inheritsFrom(child, IC_64BIT_XD_ADSIZE)));
+ return (inheritsFrom(child, IC_64BIT_REXW_XD) ||
+ (!AdSize64 && inheritsFrom(child, IC_64BIT_XD_ADSIZE)));
case IC_64BIT_XS:
- return(inheritsFrom(child, IC_64BIT_REXW_XS) ||
- (!AdSize64 && inheritsFrom(child, IC_64BIT_XS_ADSIZE)));
+ return (inheritsFrom(child, IC_64BIT_REXW_XS) ||
+ (!AdSize64 && inheritsFrom(child, IC_64BIT_XS_ADSIZE)));
case IC_64BIT_XD_OPSIZE:
case IC_64BIT_XS_OPSIZE:
return false;
@@ -142,6 +150,7 @@ static inline bool inheritsFrom(InstructionContext child,
case IC_64BIT_REXW_XS:
case IC_64BIT_REXW_OPSIZE:
case IC_64BIT_REXW_ADSIZE:
+ case IC_64BIT_REX2:
return false;
case IC_VEX:
return (VEX_LIG && WIG && inheritsFrom(child, IC_VEX_L_W)) ||
@@ -409,10 +418,8 @@ static inline bool inheritsFrom(InstructionContext child,
(VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K_B)) ||
(VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K_B));
case IC_EVEX_OPSIZE_K_B:
- return (VEX_LIG && WIG &&
- inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
- (VEX_LIG && WIG &&
- inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) ||
+ return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
+ (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) ||
(WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K_B)) ||
(VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K_B)) ||
(VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K_B));
@@ -435,10 +442,8 @@ static inline bool inheritsFrom(InstructionContext child,
(VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ_B)) ||
(VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ_B));
case IC_EVEX_OPSIZE_KZ_B:
- return (VEX_LIG && WIG &&
- inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
- (VEX_LIG && WIG &&
- inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) ||
+ return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
+ (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) ||
(WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ_B)) ||
(VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ_B)) ||
(VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B));
@@ -557,8 +562,8 @@ static inline bool inheritsFrom(InstructionContext child,
case IC_EVEX_L2_W_OPSIZE_KZ_B:
return false;
default:
- errs() << "Unknown instruction class: " <<
- stringForContext((InstructionContext)parent) << "\n";
+ errs() << "Unknown instruction class: "
+ << stringForContext((InstructionContext)parent) << "\n";
llvm_unreachable("Unknown instruction class");
}
}
@@ -576,12 +581,12 @@ static inline bool outranks(InstructionContext upper,
assert(lower < IC_max);
#define ENUM_ENTRY(n, r, d) r,
-#define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) \
- ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d) \
- ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)
- static int ranks[IC_max] = {
- INSTRUCTION_CONTEXTS
- };
+#define ENUM_ENTRY_K_B(n, r, d) \
+ ENUM_ENTRY(n, r, d) \
+ ENUM_ENTRY(n##_K_B, r, d) \
+ ENUM_ENTRY(n##_KZ_B, r, d) ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) \
+ ENUM_ENTRY(n##_B, r, d)
+ static int ranks[IC_max] = {INSTRUCTION_CONTEXTS};
#undef ENUM_ENTRY
#undef ENUM_ENTRY_K_B
@@ -604,19 +609,19 @@ static ModRMDecisionType getDecisionType(ModRMDecision &decision) {
satisfiesOneEntry = false;
if (((index & 0xc0) == 0xc0) &&
- (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
+ (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
satisfiesSplitRM = false;
if (((index & 0xc0) != 0xc0) &&
- (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
+ (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
satisfiesSplitRM = false;
- if (((index & 0xc0) == 0xc0) &&
- (decision.instructionIDs[index] != decision.instructionIDs[index&0xf8]))
+ if (((index & 0xc0) == 0xc0) && (decision.instructionIDs[index] !=
+ decision.instructionIDs[index & 0xf8]))
satisfiesSplitReg = false;
- if (((index & 0xc0) != 0xc0) &&
- (decision.instructionIDs[index] != decision.instructionIDs[index&0x38]))
+ if (((index & 0xc0) != 0xc0) && (decision.instructionIDs[index] !=
+ decision.instructionIDs[index & 0x38]))
satisfiesSplitMisc = false;
}
@@ -641,11 +646,13 @@ static ModRMDecisionType getDecisionType(ModRMDecision &decision) {
/// @param dt - The decision type.
/// @return - A pointer to the statically-allocated string (e.g.,
/// "MODRM_ONEENTRY" for MODRM_ONEENTRY).
-static const char* stringForDecisionType(ModRMDecisionType dt) {
-#define ENUM_ENTRY(n) case n: return #n;
+static const char *stringForDecisionType(ModRMDecisionType dt) {
+#define ENUM_ENTRY(n) \
+ case n: \
+ return #n;
switch (dt) {
- default:
- llvm_unreachable("Unknown decision type");
+ default:
+ llvm_unreachable("Unknown decision type");
MODRMTYPES
};
#undef ENUM_ENTRY
@@ -658,8 +665,7 @@ DisassemblerTables::DisassemblerTables() {
HasConflicts = false;
}
-DisassemblerTables::~DisassemblerTables() {
-}
+DisassemblerTables::~DisassemblerTables() {}
void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
unsigned &i1, unsigned &i2,
@@ -677,31 +683,31 @@ void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
std::vector<unsigned> ModRMDecision;
switch (dt) {
- default:
- llvm_unreachable("Unknown decision type");
- case MODRM_ONEENTRY:
- ModRMDecision.push_back(decision.instructionIDs[0]);
- break;
- case MODRM_SPLITRM:
- ModRMDecision.push_back(decision.instructionIDs[0x00]);
- ModRMDecision.push_back(decision.instructionIDs[0xc0]);
- break;
- case MODRM_SPLITREG:
- for (unsigned index = 0; index < 64; index += 8)
- ModRMDecision.push_back(decision.instructionIDs[index]);
- for (unsigned index = 0xc0; index < 256; index += 8)
- ModRMDecision.push_back(decision.instructionIDs[index]);
- break;
- case MODRM_SPLITMISC:
- for (unsigned index = 0; index < 64; index += 8)
- ModRMDecision.push_back(decision.instructionIDs[index]);
- for (unsigned index = 0xc0; index < 256; ++index)
- ModRMDecision.push_back(decision.instructionIDs[index]);
- break;
- case MODRM_FULL:
- for (unsigned short InstructionID : decision.instructionIDs)
- ModRMDecision.push_back(InstructionID);
- break;
+ default:
+ llvm_unreachable("Unknown decision type");
+ case MODRM_ONEENTRY:
+ ModRMDecision.push_back(decision.instructionIDs[0]);
+ break;
+ case MODRM_SPLITRM:
+ ModRMDecision.push_back(decision.instructionIDs[0x00]);
+ ModRMDecision.push_back(decision.instructionIDs[0xc0]);
+ break;
+ case MODRM_SPLITREG:
+ for (unsigned index = 0; index < 64; index += 8)
+ ModRMDecision.push_back(decision.instructionIDs[index]);
+ for (unsigned index = 0xc0; index < 256; index += 8)
+ ModRMDecision.push_back(decision.instructionIDs[index]);
+ break;
+ case MODRM_SPLITMISC:
+ for (unsigned index = 0; index < 64; index += 8)
+ ModRMDecision.push_back(decision.instructionIDs[index]);
+ for (unsigned index = 0xc0; index < 256; ++index)
+ ModRMDecision.push_back(decision.instructionIDs[index]);
+ break;
+ case MODRM_FULL:
+ for (unsigned short InstructionID : decision.instructionIDs)
+ ModRMDecision.push_back(InstructionID);
+ break;
}
unsigned &EntryNumber = ModRMTable[ModRMDecision];
@@ -721,23 +727,23 @@ void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
o2 << "{" << stringForDecisionType(dt) << ", " << EntryNumber << "}";
switch (dt) {
- default:
- llvm_unreachable("Unknown decision type");
- case MODRM_ONEENTRY:
- sEntryNumber += 1;
- break;
- case MODRM_SPLITRM:
- sEntryNumber += 2;
- break;
- case MODRM_SPLITREG:
- sEntryNumber += 16;
- break;
- case MODRM_SPLITMISC:
- sEntryNumber += 8 + 64;
- break;
- case MODRM_FULL:
- sEntryNumber += 256;
- break;
+ default:
+ llvm_unreachable("Unknown decision type");
+ case MODRM_ONEENTRY:
+ sEntryNumber += 1;
+ break;
+ case MODRM_SPLITRM:
+ sEntryNumber += 2;
+ break;
+ case MODRM_SPLITREG:
+ sEntryNumber += 16;
+ break;
+ case MODRM_SPLITMISC:
+ sEntryNumber += 8 + 64;
+ break;
+ case MODRM_FULL:
+ sEntryNumber += 256;
+ break;
}
// We assume that the index can fit into uint16_t.
@@ -790,8 +796,9 @@ void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2,
unsigned &i1, unsigned &i2,
unsigned &ModRMTableNum,
ContextDecision &decision,
- const char* name) const {
- o2.indent(i2) << "static const struct ContextDecision " << name << " = {{/* opcodeDecisions */\n";
+ const char *name) const {
+ o2.indent(i2) << "static const struct ContextDecision " << name
+ << " = {{/* opcodeDecisions */\n";
i2++;
for (unsigned index = 0; index < IC_max; ++index) {
@@ -814,8 +821,8 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
o << "static const struct OperandSpecifier x86OperandSets[]["
<< X86_MAX_OPERANDS << "] = {\n";
- typedef SmallVector<std::pair<OperandEncoding, OperandType>,
- X86_MAX_OPERANDS> OperandListTy;
+ typedef SmallVector<std::pair<OperandEncoding, OperandType>, X86_MAX_OPERANDS>
+ OperandListTy;
std::map<OperandListTy, unsigned> OperandSets;
unsigned OperandSetNum = 0;
@@ -828,14 +835,15 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
OperandList.push_back(std::make_pair(Encoding, Type));
}
unsigned &N = OperandSets[OperandList];
- if (N != 0) continue;
+ if (N != 0)
+ continue;
N = ++OperandSetNum;
o << " { /* " << (OperandSetNum - 1) << " */\n";
for (unsigned i = 0, e = OperandList.size(); i != e; ++i) {
const char *Encoding = stringForOperandEncoding(OperandList[i].first);
- const char *Type = stringForOperandType(OperandList[i].second);
+ const char *Type = stringForOperandType(OperandList[i].second);
o << " { " << Encoding << ", " << Type << " },\n";
}
o << " },\n";
@@ -870,8 +878,8 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
}
void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
- o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR
- "[" << ATTR_max << "] = {\n";
+ o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR "[" << ATTR_max
+ << "] = {\n";
i++;
for (unsigned index = 0; index < ATTR_max; ++index) {
@@ -907,7 +915,8 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
if (index & ATTR_EVEXB)
o << "_B";
}
- }
+ } else if ((index & ATTR_64BIT) && (index & ATTR_REX2))
+ o << "IC_64BIT_REX2";
else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
o << "IC_64BIT_REXW_XS";
else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
@@ -974,14 +983,19 @@ void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2,
unsigned &ModRMTableNum) const {
emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[0], ONEBYTE_STR);
emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR);
- emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2], THREEBYTE38_STR);
- emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3], THREEBYTE3A_STR);
+ emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2],
+ THREEBYTE38_STR);
+ emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3],
+ THREEBYTE3A_STR);
emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR);
emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR);
emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR);
- emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7], THREEDNOW_MAP_STR);
- emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[8], MAP5_STR);
- emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[9], MAP6_STR);
+ emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7],
+ THREEDNOW_MAP_STR);
+ emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[8], MAP4_STR);
+ emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[9], MAP5_STR);
+ emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[10], MAP6_STR);
+ emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[11], MAP7_STR);
}
void DisassemblerTables::emit(raw_ostream &o) const {
@@ -1021,24 +1035,22 @@ void DisassemblerTables::emit(raw_ostream &o) const {
o << "\n";
}
-void DisassemblerTables::setTableFields(ModRMDecision &decision,
- const ModRMFilter &filter,
- InstrUID uid,
- uint8_t opcode) {
+void DisassemblerTables::setTableFields(ModRMDecision &decision,
+ const ModRMFilter &filter, InstrUID uid,
+ uint8_t opcode) {
for (unsigned index = 0; index < 256; ++index) {
if (filter.accepts(index)) {
if (decision.instructionIDs[index] == uid)
continue;
if (decision.instructionIDs[index] != 0) {
- InstructionSpecifier &newInfo =
- InstructionSpecifiers[uid];
+ InstructionSpecifier &newInfo = InstructionSpecifiers[uid];
InstructionSpecifier &previousInfo =
- InstructionSpecifiers[decision.instructionIDs[index]];
+ InstructionSpecifiers[decision.instructionIDs[index]];
- if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
- newInfo.name == "XCHG32ar" ||
- newInfo.name == "XCHG64ar"))
+ if (previousInfo.name == "NOOP" &&
+ (newInfo.name == "XCHG16ar" || newInfo.name == "XCHG32ar" ||
+ newInfo.name == "XCHG64ar"))
continue; // special case for XCHG*ar and NOOP
if (outranks(previousInfo.insnContext, newInfo.insnContext))
@@ -1060,16 +1072,10 @@ void DisassemblerTables::setTableFields(ModRMDecision &decision,
}
}
-void DisassemblerTables::setTableFields(OpcodeType type,
- InstructionContext insnContext,
- uint8_t opcode,
- const ModRMFilter &filter,
- InstrUID uid,
- bool is32bit,
- bool noPrefix,
- bool ignoresVEX_L,
- bool ignoresW,
- unsigned addressSize) {
+void DisassemblerTables::setTableFields(
+ OpcodeType type, InstructionContext insnContext, uint8_t opcode,
+ const ModRMFilter &filter, InstrUID uid, bool is32bit, bool noPrefix,
+ bool ignoresVEX_L, bool ignoresW, unsigned addressSize) {
ContextDecision &decision = *Tables[type];
for (unsigned index = 0; index < IC_max; ++index) {
@@ -1082,8 +1088,6 @@ void DisassemblerTables::setTableFields(OpcodeType type,
InstructionSpecifiers[uid].insnContext, noPrefix,
ignoresVEX_L, ignoresW, adSize64))
setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
- filter,
- uid,
- opcode);
+ filter, uid, opcode);
}
}
generated by cgit v1.3 (git 2.53.0) at 2026-05-12 12:03:12 +0000