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Diffstat (limited to 'source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp')
-rw-r--r--source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp137
1 files changed, 39 insertions, 98 deletions
diff --git a/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp b/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
index b65747e12890..7fccb2311026 100644
--- a/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
+++ b/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
@@ -14,12 +14,12 @@
#include "lldb/Core/Address.h"
#include "lldb/Core/Opcode.h"
#include "lldb/Core/PluginManager.h"
-#include "lldb/Core/RegisterValue.h"
#include "lldb/Symbol/UnwindPlan.h"
#include "lldb/Target/Target.h"
#include "lldb/Utility/ArchSpec.h"
#include "lldb/Utility/ConstString.h"
#include "lldb/Utility/DataExtractor.h"
+#include "lldb/Utility/RegisterValue.h"
#include "lldb/Utility/Stream.h"
#include "llvm-c/Disassembler.h"
#include "llvm/MC/MCAsmInfo.h"
@@ -35,7 +35,7 @@
#include "llvm/ADT/STLExtras.h"
#include "Plugins/Process/Utility/InstructionUtils.h"
-#include "Plugins/Process/Utility/RegisterContext_mips.h" //mips32 has same registers nos as mips64
+#include "Plugins/Process/Utility/RegisterContext_mips.h"
using namespace lldb;
using namespace lldb_private;
@@ -220,10 +220,8 @@ EmulateInstructionMIPS::CreateInstance(const ArchSpec &arch,
}
bool EmulateInstructionMIPS::SetTargetTriple(const ArchSpec &arch) {
- if (arch.GetTriple().getArch() == llvm::Triple::mips ||
- arch.GetTriple().getArch() == llvm::Triple::mipsel)
- return true;
- return false;
+ return arch.GetTriple().getArch() == llvm::Triple::mips ||
+ arch.GetTriple().getArch() == llvm::Triple::mipsel;
}
const char *EmulateInstructionMIPS::GetRegisterName(unsigned reg_num,
@@ -1350,10 +1348,7 @@ bool EmulateInstructionMIPS::Emulate_LW(llvm::MCInst &insn) {
context.type = eContextPopRegisterOffStack;
context.SetAddress(address);
- if (!WriteRegister(context, &reg_info_src, data_src))
- return false;
-
- return true;
+ return WriteRegister(context, &reg_info_src, data_src);
}
return false;
@@ -1450,11 +1445,8 @@ bool EmulateInstructionMIPS::Emulate_LUI(llvm::MCInst &insn) {
context.SetImmediateSigned(imm);
context.type = eContextImmediate;
- if (WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_zero_mips + rt,
- imm))
- return true;
-
- return false;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF,
+ dwarf_zero_mips + rt, imm);
}
bool EmulateInstructionMIPS::Emulate_ADDIUSP(llvm::MCInst &insn) {
@@ -1697,10 +1689,7 @@ bool EmulateInstructionMIPS::Emulate_LWSP(llvm::MCInst &insn) {
context.type = eContextPopRegisterOffStack;
context.SetAddress(base_address);
- if (!WriteRegister(context, &reg_info_src, data_src))
- return false;
-
- return true;
+ return WriteRegister(context, &reg_info_src, data_src);
}
return false;
@@ -1807,11 +1796,8 @@ bool EmulateInstructionMIPS::Emulate_JRADDIUSP(llvm::MCInst &insn) {
context.type = eContextAdjustStackPointer;
// update SP
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_sp_mips,
- result))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_sp_mips,
+ result);
}
static int IsAdd64bitOverflow(int32_t a, int32_t b) {
@@ -1864,11 +1850,8 @@ bool EmulateInstructionMIPS::Emulate_BXX_3ops(llvm::MCInst &insn) {
context.type = eContextRelativeBranchImmediate;
context.SetImmediate(offset);
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
/*
@@ -1947,11 +1930,8 @@ bool EmulateInstructionMIPS::Emulate_BXX_3ops_C(llvm::MCInst &insn) {
context.type = eContextRelativeBranchImmediate;
context.SetImmediate(current_inst_size + offset);
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
/*
@@ -2122,11 +2102,8 @@ bool EmulateInstructionMIPS::Emulate_BXX_2ops(llvm::MCInst &insn) {
context.type = eContextRelativeBranchImmediate;
context.SetImmediate(offset);
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
/*
@@ -2189,11 +2166,8 @@ bool EmulateInstructionMIPS::Emulate_BXX_2ops_C(llvm::MCInst &insn) {
context.type = eContextRelativeBranchImmediate;
context.SetImmediate(current_inst_size + offset);
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
bool EmulateInstructionMIPS::Emulate_B16_MM(llvm::MCInst &insn) {
@@ -2214,11 +2188,8 @@ bool EmulateInstructionMIPS::Emulate_B16_MM(llvm::MCInst &insn) {
context.type = eContextRelativeBranchImmediate;
context.SetImmediate(current_inst_size + offset);
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
/*
@@ -2529,11 +2500,8 @@ bool EmulateInstructionMIPS::Emulate_BC(llvm::MCInst &insn) {
Context context;
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
bool EmulateInstructionMIPS::Emulate_J(llvm::MCInst &insn) {
@@ -2556,10 +2524,7 @@ bool EmulateInstructionMIPS::Emulate_J(llvm::MCInst &insn) {
Context context;
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips, pc))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips, pc);
}
bool EmulateInstructionMIPS::Emulate_JAL(llvm::MCInst &insn) {
@@ -2688,11 +2653,8 @@ bool EmulateInstructionMIPS::Emulate_JIC(llvm::MCInst &insn) {
Context context;
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
bool EmulateInstructionMIPS::Emulate_JR(llvm::MCInst &insn) {
@@ -2713,11 +2675,8 @@ bool EmulateInstructionMIPS::Emulate_JR(llvm::MCInst &insn) {
Context context;
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- rs_val))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ rs_val);
}
/*
@@ -2758,11 +2717,8 @@ bool EmulateInstructionMIPS::Emulate_FP_branch(llvm::MCInst &insn) {
}
Context context;
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
bool EmulateInstructionMIPS::Emulate_BC1EQZ(llvm::MCInst &insn) {
@@ -2797,11 +2753,8 @@ bool EmulateInstructionMIPS::Emulate_BC1EQZ(llvm::MCInst &insn) {
Context context;
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
bool EmulateInstructionMIPS::Emulate_BC1NEZ(llvm::MCInst &insn) {
@@ -2836,11 +2789,8 @@ bool EmulateInstructionMIPS::Emulate_BC1NEZ(llvm::MCInst &insn) {
Context context;
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
/*
@@ -2898,11 +2848,8 @@ bool EmulateInstructionMIPS::Emulate_3D_branch(llvm::MCInst &insn) {
}
Context context;
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
bool EmulateInstructionMIPS::Emulate_BNZB(llvm::MCInst &insn) {
@@ -2993,11 +2940,8 @@ bool EmulateInstructionMIPS::Emulate_MSA_Branch_DF(llvm::MCInst &insn,
Context context;
context.type = eContextRelativeBranchImmediate;
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
bool EmulateInstructionMIPS::Emulate_BNZV(llvm::MCInst &insn) {
@@ -3039,11 +2983,8 @@ bool EmulateInstructionMIPS::Emulate_MSA_Branch_V(llvm::MCInst &insn,
Context context;
context.type = eContextRelativeBranchImmediate;
- if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
- target))
- return false;
-
- return true;
+ return WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_pc_mips,
+ target);
}
bool EmulateInstructionMIPS::Emulate_LDST_Imm(llvm::MCInst &insn) {
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-02 06:23:46 +0000