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Diffstat (limited to 'src/arm/qcom-mdm9615.dtsi')
-rw-r--r--src/arm/qcom-mdm9615.dtsi10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/arm/qcom-mdm9615.dtsi b/src/arm/qcom-mdm9615.dtsi
index b0fe1d95d88f..8e9ea61a1e48 100644
--- a/src/arm/qcom-mdm9615.dtsi
+++ b/src/arm/qcom-mdm9615.dtsi
@@ -79,13 +79,13 @@
};
timer@200a000 {
- compatible = "qcom,kpss-timer", "qcom,msm-timer";
+ compatible = "qcom,kpss-wdt-mdm9615", "qcom,kpss-timer",
+ "qcom,msm-timer";
interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>,
<GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>,
<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>;
reg = <0x0200a000 0x100>;
- clock-frequency = <27000000>,
- <32768>;
+ clock-frequency = <27000000>;
cpu-offset = <0x80000>;
};
@@ -294,7 +294,7 @@
};
};
- sdcc1bam: dma-controller@12182000{
+ sdcc1bam: dma-controller@12182000 {
compatible = "qcom,bam-v1.3.0";
reg = <0x12182000 0x8000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
@@ -304,7 +304,7 @@
qcom,ee = <0>;
};
- sdcc2bam: dma-controller@12142000{
+ sdcc2bam: dma-controller@12142000 {
compatible = "qcom,bam-v1.3.0";
reg = <0x12142000 0x8000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;