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Diffstat (limited to 'src/arm64/rockchip/rk3566-anbernic-rg503.dts')
-rw-r--r--src/arm64/rockchip/rk3566-anbernic-rg503.dts61
1 files changed, 59 insertions, 2 deletions
diff --git a/src/arm64/rockchip/rk3566-anbernic-rg503.dts b/src/arm64/rockchip/rk3566-anbernic-rg503.dts
index 5dafcc86296b..c763c7f3b1b3 100644
--- a/src/arm64/rockchip/rk3566-anbernic-rg503.dts
+++ b/src/arm64/rockchip/rk3566-anbernic-rg503.dts
@@ -47,6 +47,21 @@
mosi-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
num-chipselects = <0>;
+
+ panel@0 {
+ compatible = "samsung,ams495qa01";
+ reg = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_reset>;
+ reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
+ vdd-supply = <&vcc_3v3>;
+
+ port {
+ mipi_in_panel: endpoint {
+ remote-endpoint = <&mipi_out_panel>;
+ };
+ };
+ };
};
/* Channels reversed for both headphones and speakers. */
@@ -90,8 +105,36 @@
};
&cru {
- assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
- assigned-clock-rates = <1200000000>, <200000000>, <500000000>;
+ assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
+ <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
+ assigned-clock-rates = <32768>, <1200000000>,
+ <200000000>, <500000000>;
+};
+
+&dsi_dphy0 {
+ status = "okay";
+};
+
+&dsi0 {
+ status = "okay";
+
+ ports {
+ dsi0_in: port@0 {
+ reg = <0>;
+
+ dsi0_in_vp1: endpoint {
+ remote-endpoint = <&vp1_out_dsi0>;
+ };
+ };
+
+ dsi0_out: port@1 {
+ reg = <1>;
+
+ mipi_out_panel: endpoint {
+ remote-endpoint = <&mipi_in_panel>;
+ };
+ };
+ };
};
&gpio_keys_control {
@@ -146,6 +189,13 @@
};
};
+ gpio-lcd {
+ lcd_reset: lcd-reset {
+ rockchip,pins =
+ <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
gpio-spi {
spi_pins: spi-pins {
rockchip,pins =
@@ -164,3 +214,10 @@
rockchip,sleep-filter-current-microamp = <100000>;
};
};
+
+&vp1 {
+ vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 {
+ reg = <ROCKCHIP_VOP2_EP_MIPI0>;
+ remote-endpoint = <&dsi0_in_vp1>;
+ };
+};