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Diffstat (limited to 'src/arm64/xilinx/zynqmp-zc1751-xm018-dc4.dts')
-rw-r--r--src/arm64/xilinx/zynqmp-zc1751-xm018-dc4.dts8
1 files changed, 6 insertions, 2 deletions
diff --git a/src/arm64/xilinx/zynqmp-zc1751-xm018-dc4.dts b/src/arm64/xilinx/zynqmp-zc1751-xm018-dc4.dts
index 05a2b79738af..6636e76545a5 100644
--- a/src/arm64/xilinx/zynqmp-zc1751-xm018-dc4.dts
+++ b/src/arm64/xilinx/zynqmp-zc1751-xm018-dc4.dts
@@ -4,7 +4,7 @@
*
* (C) Copyright 2015 - 2021, Xilinx, Inc.
*
- * Michal Simek <michal.simek@xilinx.com>
+ * Michal Simek <michal.simek@amd.com>
*/
/dts-v1/;
@@ -152,6 +152,10 @@
status = "okay";
};
+&gpu {
+ status = "okay";
+};
+
&i2c0 {
clock-frequency = <400000>;
status = "okay";
@@ -169,7 +173,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
- spi-tx-bus-width = <1>;
+ spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; /* also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
};