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-rw-r--r--sys/dev/iicbus/ad7418.c234
-rw-r--r--sys/dev/iicbus/ds133x.c363
-rw-r--r--sys/dev/iicbus/ds1672.c182
-rw-r--r--sys/dev/iicbus/icee.c277
-rw-r--r--sys/dev/iicbus/if_ic.c436
-rw-r--r--sys/dev/iicbus/iic.c389
-rw-r--r--sys/dev/iicbus/iic.h65
-rw-r--r--sys/dev/iicbus/iicbb.c419
-rw-r--r--sys/dev/iicbus/iicbb_if.m82
-rw-r--r--sys/dev/iicbus/iicbus.c272
-rw-r--r--sys/dev/iicbus/iicbus.h70
-rw-r--r--sys/dev/iicbus/iicbus_if.m117
-rw-r--r--sys/dev/iicbus/iiconf.c386
-rw-r--r--sys/dev/iicbus/iiconf.h140
-rw-r--r--sys/dev/iicbus/iicsmb.c522
15 files changed, 3954 insertions, 0 deletions
diff --git a/sys/dev/iicbus/ad7418.c b/sys/dev/iicbus/ad7418.c
new file mode 100644
index 000000000000..38753077bd67
--- /dev/null
+++ b/sys/dev/iicbus/ad7418.c
@@ -0,0 +1,234 @@
+/*-
+ * Copyright (c) 2006 Sam Leffler. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+/*
+ * Analog Devices AD7418 chip sitting on the I2C bus.
+ */
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/resource.h>
+#include <sys/rman.h>
+#include <sys/sysctl.h>
+#include <sys/sx.h>
+
+#include <machine/bus.h>
+#include <machine/cpu.h>
+#include <machine/cpufunc.h>
+#include <machine/frame.h>
+#include <machine/resource.h>
+#include <machine/intr.h>
+
+#include <dev/iicbus/iiconf.h>
+
+#include "iicbus_if.h"
+
+#define IIC_M_WR 0 /* write operation */
+
+#define AD7418_ADDR 0x50 /* slave address */
+
+#define AD7418_TEMP 0 /* Temperature Value (r/o) */
+#define AD7418_CONF 1 /* Config Register (r/w) */
+#define AD7418_CONF_SHUTDOWN 0x01
+#define AD7418_CONF_CHAN 0xe0 /* channel select mask */
+#define AD7418_CHAN_TEMP 0x00 /* temperature channel */
+#define AD7418_CHAN_VOLT 0x80 /* voltage channel */
+#define AD7418_THYST 2 /* Thyst Setpoint (r/o) */
+#define AD7418_TOTI 3 /* Toti Setpoint */
+#define AD7418_VOLT 4 /* ADC aka Voltage (r/o) */
+#define AD7418_CONF2 5 /* Config2 Register (r/w) */
+
+struct ad7418_softc {
+ device_t sc_dev;
+ struct sx sc_lock;
+ int sc_curchan; /* current channel */
+ int sc_curtemp;
+ int sc_curvolt;
+ int sc_lastupdate; /* in ticks */
+};
+
+static void ad7418_update(struct ad7418_softc *);
+static int ad7418_read_1(device_t dev, int reg);
+static int ad7418_write_1(device_t dev, int reg, int v);
+
+static int
+ad7418_probe(device_t dev)
+{
+ /* XXX really probe? */
+ device_set_desc(dev, "Analog Devices AD7418 ADC");
+ return (BUS_PROBE_NOWILDCARD);
+}
+
+static int
+ad7418_sysctl_temp(SYSCTL_HANDLER_ARGS)
+{
+ struct ad7418_softc *sc = arg1;
+ int temp;
+
+ sx_xlock(&sc->sc_lock);
+ ad7418_update(sc);
+ temp = (sc->sc_curtemp / 64) * 25;
+ sx_xunlock(&sc->sc_lock);
+ return sysctl_handle_int(oidp, &temp, 0, req);
+}
+
+static int
+ad7418_sysctl_voltage(SYSCTL_HANDLER_ARGS)
+{
+ struct ad7418_softc *sc = arg1;
+ int volt;
+
+ sx_xlock(&sc->sc_lock);
+ ad7418_update(sc);
+ volt = (sc->sc_curvolt >> 6) * 564 / 10;
+ sx_xunlock(&sc->sc_lock);
+ return sysctl_handle_int(oidp, &volt, 0, req);
+}
+
+static int
+ad7418_attach(device_t dev)
+{
+ struct ad7418_softc *sc = device_get_softc(dev);
+ struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev);
+ struct sysctl_oid *tree = device_get_sysctl_tree(dev);
+ int conf;
+
+ sc->sc_dev = dev;
+ sx_init(&sc->sc_lock, "ad7418");
+
+ SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
+ "temp", CTLTYPE_INT | CTLFLAG_RD, sc, 0,
+ ad7418_sysctl_temp, "I", "operating temperature");
+ SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
+ "volt", CTLTYPE_INT | CTLFLAG_RD, sc, 0,
+ ad7418_sysctl_voltage, "I", "input voltage");
+
+ /* enable chip if configured in shutdown mode */
+ conf = ad7418_read_1(dev, AD7418_CONF);
+ if (conf >= 0 && (conf & AD7418_CONF_SHUTDOWN))
+ ad7418_write_1(dev, AD7418_CONF, conf &~ AD7418_CONF_SHUTDOWN);
+
+ return (0);
+}
+
+static int
+ad7418_read_1(device_t dev, int reg)
+{
+ uint8_t addr = reg;
+ uint8_t data[1];
+ struct iic_msg msgs[2] = {
+ { AD7418_ADDR, IIC_M_WR, 1, &addr },
+ { AD7418_ADDR, IIC_M_RD, 1, data },
+ };
+ return iicbus_transfer(dev, msgs, 2) != 0 ? -1 : data[0];
+}
+
+static int
+ad7418_write_1(device_t dev, int reg, int v)
+{
+ /* NB: register pointer precedes actual data */
+ uint8_t data[2];
+ struct iic_msg msgs[1] = {
+ { AD7418_ADDR, IIC_M_WR, 2, data },
+ };
+ data[0] = reg;
+ data[1] = v & 0xff;
+ return iicbus_transfer(dev, msgs, 1);
+}
+
+static void
+ad7418_set_channel(struct ad7418_softc *sc, int chan)
+{
+ if (sc->sc_curchan == chan)
+ return;
+ ad7418_write_1(sc->sc_dev, AD7418_CONF,
+ (ad7418_read_1(sc->sc_dev, AD7418_CONF) &~ AD7418_CONF_CHAN)|chan);
+ sc->sc_curchan = chan;
+#if 0
+ /*
+ * NB: Linux driver delays here but chip data sheet
+ * says nothing and things appear to work fine w/o
+ * a delay on channel change.
+ */
+ /* let channel change settle, 1 tick should be 'nuf (need ~1ms) */
+ tsleep(sc, 0, "ad7418", hz/1000);
+#endif
+}
+
+static int
+ad7418_read_2(device_t dev, int reg)
+{
+ uint8_t addr = reg;
+ uint8_t data[2];
+ struct iic_msg msgs[2] = {
+ { AD7418_ADDR, IIC_M_WR, 1, &addr },
+ { AD7418_ADDR, IIC_M_RD, 2, data },
+ };
+ /* NB: D15..D8 precede D7..D0 per data sheet (Fig 12) */
+ return iicbus_transfer(dev, msgs, 2) != 0 ?
+ -1 : ((data[0] << 8) | data[1]);
+}
+
+static void
+ad7418_update(struct ad7418_softc *sc)
+{
+ int v;
+
+ sx_assert(&sc->sc_lock, SA_XLOCKED);
+ /* NB: no point in updating any faster than the chip */
+ if (ticks - sc->sc_lastupdate > hz) {
+ ad7418_set_channel(sc, AD7418_CHAN_TEMP);
+ v = ad7418_read_2(sc->sc_dev, AD7418_TEMP);
+ if (v >= 0)
+ sc->sc_curtemp = v;
+ ad7418_set_channel(sc, AD7418_CHAN_VOLT);
+ v = ad7418_read_2(sc->sc_dev, AD7418_VOLT);
+ if (v >= 0)
+ sc->sc_curvolt = v;
+ sc->sc_lastupdate = ticks;
+ }
+}
+
+static device_method_t ad7418_methods[] = {
+ DEVMETHOD(device_probe, ad7418_probe),
+ DEVMETHOD(device_attach, ad7418_attach),
+
+ {0, 0},
+};
+
+static driver_t ad7418_driver = {
+ "ad7418",
+ ad7418_methods,
+ sizeof(struct ad7418_softc),
+};
+static devclass_t ad7418_devclass;
+
+DRIVER_MODULE(ad7418, iicbus, ad7418_driver, ad7418_devclass, 0, 0);
+MODULE_VERSION(ad7418, 1);
+MODULE_DEPEND(ad7418, iicbus, 1, 1, 1);
diff --git a/sys/dev/iicbus/ds133x.c b/sys/dev/iicbus/ds133x.c
new file mode 100644
index 000000000000..572384fb3d3d
--- /dev/null
+++ b/sys/dev/iicbus/ds133x.c
@@ -0,0 +1,363 @@
+/*-
+ * Copyright (c) 2008 Stanislav Sedov <stas@FreeBSD.org>,
+ * Rafal Jaworowski <raj@FreeBSD.org>,
+ * Piotr Ziecik <kosmo@semihalf.com>.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+/*
+ * Dallas Semiconductor DS133X RTC sitting on the I2C bus.
+ */
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/clock.h>
+#include <sys/time.h>
+#include <sys/bus.h>
+#include <sys/resource.h>
+#include <sys/rman.h>
+
+#include <dev/iicbus/iicbus.h>
+#include <dev/iicbus/iiconf.h>
+
+#include "iicbus_if.h"
+#include "clock_if.h"
+
+#define DS133X_DEVNAME "ds133x_rtc"
+
+#define DS133X_ADDR 0xd0 /* slave address */
+#define DS133X_DATE_REG 0x0
+#define DS133X_CTRL_REG 0x0e
+#define DS133X_OSCD_FLAG 0x80
+#define DS133X_OSF_FLAG 0x80
+
+#define DS133X_24H_FLAG 0x40 /* 24 hours mode. */
+#define DS133X_PM_FLAG 0x20 /* AM/PM bit. */
+#define DS133X_CENT_FLAG 0x80 /* Century selector. */
+#define DS133X_CENT_SHIFT 7
+
+#define DS1338_REG_CLOCK_HALT 0x00
+#define DS1338_REG_CONTROL 0x07
+#define DS1338_CLOCK_HALT (1 << 7)
+#define DS1338_OSC_STOP (1 << 5)
+
+#define DS1339_REG_CONTROL 0x0E
+#define DS1339_REG_STATUS 0x0F
+#define DS1339_OSC_STOP (1 << 7)
+#define DS1339_ENABLE_OSC (1 << 7)
+#define DS1339_BBSQI (1 << 5)
+
+#define HALFSEC 500000000 /* 1/2 of second. */
+
+#define MAX_IIC_DATA_SIZE 7
+
+enum {
+ DS1337,
+ DS1338,
+ DS1339,
+};
+
+struct ds133x_softc {
+ int sc_type;
+ device_t sc_dev;
+};
+
+static int
+ds133x_read(device_t dev, uint8_t address, uint8_t *data, uint8_t size)
+{
+ struct iic_msg msg[] = {
+ { DS133X_ADDR, IIC_M_WR, 1, &address },
+ { DS133X_ADDR, IIC_M_RD, size, data },
+ };
+
+ return (iicbus_transfer(dev, msg, 2));
+}
+
+static int
+ds133x_write(device_t dev, uint8_t address, uint8_t *data, uint8_t size)
+{
+ uint8_t buffer[MAX_IIC_DATA_SIZE + 1];
+ struct iic_msg msg[] = {
+ { DS133X_ADDR, IIC_M_WR, size + 1, buffer },
+ };
+
+ if (size > MAX_IIC_DATA_SIZE)
+ return (ENOMEM);
+
+ buffer[0] = address;
+ memcpy(buffer + 1, data, size);
+
+ return (iicbus_transfer(dev, msg, 1));
+}
+
+static int
+ds133x_detect(device_t dev, int *sc_type)
+{
+ int error;
+ uint8_t reg, orig;
+
+ /*
+ * Check for DS1338. At address 0x0F this chip has RAM, however
+ * DS1337 and DS1339 have status register. Bits 6-2 in status
+ * register will be always read as 0.
+ */
+
+ if ((error = ds133x_read(dev, DS1339_REG_STATUS, &reg, 1)))
+ return (error);
+
+ orig = reg;
+ reg |= 0x7C;
+
+ if ((error = ds133x_write(dev, DS1339_REG_STATUS, &reg, 1)))
+ return (error);
+
+ if ((error = ds133x_read(dev, DS1339_REG_STATUS, &reg, 1)))
+ return (error);
+
+ if ((reg & 0x7C) != 0) {
+ /* This is DS1338 */
+
+ if ((error = ds133x_write(dev, DS1339_REG_STATUS, &orig, 1)))
+ return (error);
+
+ *sc_type = DS1338;
+
+ return (0);
+ }
+
+ /*
+ * Now Check for DS1337. Bit 5 in control register of this chip will be
+ * allways read as 0. In DS1339 changing of this bit is safe until
+ * chip is powered up.
+ */
+
+ if ((error = ds133x_read(dev, DS1339_REG_CONTROL, &reg, 1)))
+ return (error);
+
+ orig = reg;
+ reg |= DS1339_BBSQI;
+
+ if ((error = ds133x_write(dev, DS1339_REG_CONTROL, &reg, 1)))
+ return (error);
+
+ if ((error = ds133x_read(dev, DS1339_REG_CONTROL, &reg, 1)))
+ return (error);
+
+ if ((reg & DS1339_BBSQI) != 0) {
+ /* This is DS1339 */
+
+ if ((error = ds133x_write(dev, DS1339_REG_CONTROL, &orig, 1)))
+ return (error);
+
+ *sc_type = DS1339;
+ return (0);
+ }
+
+ /* This is DS1337 */
+ *sc_type = DS1337;
+
+ return (0);
+}
+
+static int
+ds133x_init(device_t dev, uint8_t cs_reg, uint8_t cs_bit, uint8_t osf_reg,
+ uint8_t osf_bit)
+{
+ int error;
+ uint8_t reg;
+
+ if ((error = ds133x_read(dev, cs_reg, &reg, 1)))
+ return (error);
+
+ if (reg & cs_bit) { /* If clock is stopped - start it */
+ reg &= ~cs_bit;
+ if ((error = ds133x_write(dev, cs_reg, &reg, 1)))
+ return (error);
+ }
+
+ if ((error = ds133x_read(dev, osf_reg, &reg, 1)))
+ return (error);
+
+ if (reg & osf_bit) { /* Clear oscillator stop flag */
+ device_printf(dev, "RTC oscillator was stopped. Check system"
+ " time and RTC battery.\n");
+ reg &= ~osf_bit;
+ if ((error = ds133x_write(dev, osf_reg, &reg, 1)))
+ return (error);
+ }
+
+ return (0);
+}
+
+
+static void
+ds133x_identify(driver_t *driver, device_t parent)
+{
+
+ if (device_find_child(parent, DS133X_DEVNAME, -1) == NULL)
+ BUS_ADD_CHILD(parent, 0, DS133X_DEVNAME, -1);
+}
+
+static int
+ds133x_probe(device_t dev)
+{
+ struct ds133x_softc *sc;
+ int error;
+
+ sc = device_get_softc(dev);
+
+ if ((error = ds133x_detect(dev, &sc->sc_type)))
+ return (error);
+
+ switch (sc->sc_type) {
+ case DS1337:
+ device_set_desc(dev, "Dallas Semiconductor DS1337 RTC");
+ break;
+ case DS1338:
+ device_set_desc(dev, "Dallas Semiconductor DS1338 RTC");
+ break;
+ case DS1339:
+ device_set_desc(dev, "Dallas Semiconductor DS1339 RTC");
+ break;
+ default:
+ break;
+ }
+
+ return (0);
+}
+
+static int
+ds133x_attach(device_t dev)
+{
+ struct ds133x_softc *sc = device_get_softc(dev);
+
+ sc->sc_dev = dev;
+
+ if (sc->sc_type == DS1338)
+ ds133x_init(dev, DS1338_REG_CLOCK_HALT, DS1338_CLOCK_HALT,
+ DS1338_REG_CONTROL, DS1338_OSC_STOP);
+ else
+ ds133x_init(dev, DS1339_REG_CONTROL, DS1339_ENABLE_OSC,
+ DS1339_REG_STATUS, DS1339_OSC_STOP);
+
+ clock_register(dev, 1000000);
+
+ return (0);
+}
+
+static uint8_t
+ds133x_get_hours(uint8_t val)
+{
+ uint8_t ret;
+
+ if (!(val & DS133X_24H_FLAG))
+ ret = FROMBCD(val & 0x3f);
+ else if (!(val & DS133X_PM_FLAG))
+ ret = FROMBCD(val & 0x1f);
+ else
+ ret = FROMBCD(val & 0x1f) + 12;
+
+ return (ret);
+}
+
+static int
+ds133x_gettime(device_t dev, struct timespec *ts)
+{
+ struct ds133x_softc *sc = device_get_softc(dev);
+ struct clocktime ct;
+ uint8_t date[7];
+ int error;
+
+ error = ds133x_read(dev, DS133X_DATE_REG, date, 7);
+ if (error == 0) {
+ ct.nsec = 0;
+ ct.sec = FROMBCD(date[0] & 0x7f);
+ ct.min = FROMBCD(date[1] & 0x7f);
+ ct.hour = ds133x_get_hours(date[2]);
+ ct.dow = FROMBCD(date[3] & 0x07) - 1;
+ ct.day = FROMBCD(date[4] & 0x3f);
+ ct.mon = FROMBCD(date[5] & 0x1f);
+
+ if (sc->sc_type == DS1338)
+ ct.year = 2000 + FROMBCD(date[6]);
+ else
+ ct.year = 1900 + FROMBCD(date[6]) +
+ ((date[5] & DS133X_CENT_FLAG) >> DS133X_CENT_SHIFT) * 100;
+
+ error = clock_ct_to_ts(&ct, ts);
+ }
+
+ return (error);
+}
+
+static int
+ds133x_settime(device_t dev, struct timespec *ts)
+{
+ struct ds133x_softc *sc = device_get_softc(dev);
+ struct clocktime ct;
+ uint8_t date[7];
+
+ clock_ts_to_ct(ts, &ct);
+
+ date[0] = TOBCD(ct.nsec >= HALFSEC ? ct.sec + 1 : ct.sec) & 0x7f;
+ date[1] = TOBCD(ct.min) & 0x7f;
+ date[2] = TOBCD(ct.hour) & 0x3f; /* We use 24-hours mode. */
+ date[3] = TOBCD(ct.dow + 1) & 0x07;
+ date[4] = TOBCD(ct.day) & 0x3f;
+ date[5] = TOBCD(ct.mon) & 0x1f;
+ if (sc->sc_type == DS1338)
+ date[6] = TOBCD(ct.year - 2000);
+ else if (ct.year >= 2000) {
+ date[5] |= DS133X_CENT_FLAG;
+ date[6] = TOBCD(ct.year - 2000);
+ } else
+ date[6] = TOBCD(ct.year - 1900);
+
+ return (ds133x_write(dev, DS133X_DATE_REG, date, 7));
+}
+
+static device_method_t ds133x_methods[] = {
+ DEVMETHOD(device_identify, ds133x_identify),
+ DEVMETHOD(device_probe, ds133x_probe),
+ DEVMETHOD(device_attach, ds133x_attach),
+
+ DEVMETHOD(clock_gettime, ds133x_gettime),
+ DEVMETHOD(clock_settime, ds133x_settime),
+
+ {0, 0},
+};
+
+static driver_t ds133x_driver = {
+ DS133X_DEVNAME,
+ ds133x_methods,
+ sizeof(struct ds133x_softc),
+};
+
+static devclass_t ds133x_devclass;
+
+DRIVER_MODULE(ds133x, iicbus, ds133x_driver, ds133x_devclass, 0, 0);
+MODULE_VERSION(ds133x, 1);
+MODULE_DEPEND(ds133x, iicbus, 1, 1, 1);
diff --git a/sys/dev/iicbus/ds1672.c b/sys/dev/iicbus/ds1672.c
new file mode 100644
index 000000000000..a9209bd89c57
--- /dev/null
+++ b/sys/dev/iicbus/ds1672.c
@@ -0,0 +1,182 @@
+/*-
+ * Copyright (c) 2006 Sam Leffler. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+/*
+ * Dallas Semiconductor DS1672 RTC sitting on the I2C bus.
+ */
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/clock.h>
+#include <sys/time.h>
+#include <sys/bus.h>
+#include <sys/resource.h>
+#include <sys/rman.h>
+
+#include <dev/iicbus/iiconf.h>
+
+#include "iicbus_if.h"
+#include "clock_if.h"
+
+#define IIC_M_WR 0 /* write operation */
+
+#define DS1672_ADDR 0xd0 /* slave address */
+
+#define DS1672_COUNTER 0 /* counter (bytes 0-3) */
+#define DS1672_CTRL 4 /* control (1 byte) */
+#define DS1672_TRICKLE 5 /* trickle charger (1 byte) */
+
+#define DS1672_CTRL_EOSC (1 << 7) /* Stop/start flag. */
+
+#define NANOSEC 1000000000
+
+#define MAX_IIC_DATA_SIZE 4
+
+struct ds1672_softc {
+ device_t sc_dev;
+};
+
+static int
+ds1672_probe(device_t dev)
+{
+ /* XXX really probe? */
+ device_set_desc(dev, "Dallas Semiconductor DS1672 RTC");
+ return (BUS_PROBE_NOWILDCARD);
+}
+
+static int
+ds1672_read(device_t dev, uint8_t addr, uint8_t *data, uint8_t size)
+{
+ struct iic_msg msgs[2] = {
+ { DS1672_ADDR, IIC_M_WR, 1, &addr },
+ { DS1672_ADDR, IIC_M_RD, size, data }
+ };
+
+ return (iicbus_transfer(dev, msgs, 2));
+}
+
+static int
+ds1672_write(device_t dev, uint8_t addr, uint8_t *data, uint8_t size)
+{
+ uint8_t buffer[MAX_IIC_DATA_SIZE + 1];
+ struct iic_msg msgs[1] = {
+ { DS1672_ADDR, IIC_M_WR, size + 1, buffer },
+ };
+
+ if (size > MAX_IIC_DATA_SIZE)
+ return (ENOMEM);
+ /* NB: register pointer precedes actual data */
+ buffer[0] = addr;
+ memcpy(buffer + 1, data, size);
+ return (iicbus_transfer(dev, msgs, 1));
+}
+
+static int
+ds1672_init(device_t dev)
+{
+ uint8_t ctrl;
+ int error;
+
+ error = ds1672_read(dev, DS1672_CTRL, &ctrl, 1);
+ if (error)
+ return (error);
+
+ /*
+ * Check if oscialltor is not runned.
+ */
+ if (ctrl & DS1672_CTRL_EOSC) {
+ device_printf(dev, "RTC oscillator was stopped. Check system"
+ " time and RTC battery.\n");
+ ctrl &= ~DS1672_CTRL_EOSC; /* Start oscillator. */
+ error = ds1672_write(dev, DS1672_CTRL, &ctrl, 1);
+ }
+ return (error);
+}
+
+static int
+ds1672_attach(device_t dev)
+{
+ struct ds1672_softc *sc = device_get_softc(dev);
+ int error;
+
+ sc->sc_dev = dev;
+ error = ds1672_init(dev);
+ if (error)
+ return (error);
+ clock_register(dev, 1000);
+ return (0);
+}
+
+static int
+ds1672_gettime(device_t dev, struct timespec *ts)
+{
+ uint8_t secs[4];
+ int error;
+
+ error = ds1672_read(dev, DS1672_COUNTER, secs, 4);
+ if (error == 0) {
+ /* counter has seconds since epoch */
+ ts->tv_sec = (secs[3] << 24) | (secs[2] << 16)
+ | (secs[1] << 8) | (secs[0] << 0);
+ ts->tv_nsec = NANOSEC / 2;
+ }
+ return (error);
+}
+
+static int
+ds1672_settime(device_t dev, struct timespec *ts)
+{
+ uint8_t data[4];
+
+ data[0] = (ts->tv_sec >> 0) & 0xff;
+ data[1] = (ts->tv_sec >> 8) & 0xff;
+ data[2] = (ts->tv_sec >> 16) & 0xff;
+ data[3] = (ts->tv_sec >> 24) & 0xff;
+
+ return (ds1672_write(dev, DS1672_COUNTER, data, 4));
+}
+
+static device_method_t ds1672_methods[] = {
+ DEVMETHOD(device_probe, ds1672_probe),
+ DEVMETHOD(device_attach, ds1672_attach),
+
+ DEVMETHOD(clock_gettime, ds1672_gettime),
+ DEVMETHOD(clock_settime, ds1672_settime),
+
+ {0, 0},
+};
+
+static driver_t ds1672_driver = {
+ "ds1672_rtc",
+ ds1672_methods,
+ sizeof(struct ds1672_softc),
+};
+static devclass_t ds1672_devclass;
+
+DRIVER_MODULE(ds1672, iicbus, ds1672_driver, ds1672_devclass, 0, 0);
+MODULE_VERSION(ds1672, 1);
+MODULE_DEPEND(ds1672, iicbus, 1, 1, 1);
diff --git a/sys/dev/iicbus/icee.c b/sys/dev/iicbus/icee.c
new file mode 100644
index 000000000000..93c03ad3bbb0
--- /dev/null
+++ b/sys/dev/iicbus/icee.c
@@ -0,0 +1,277 @@
+/*-
+ * Copyright (c) 2006 Warner Losh. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+/*
+ * Generic IIC eeprom support, modeled after the AT24C family of products.
+ */
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/conf.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/resource.h>
+#include <sys/sx.h>
+#include <sys/uio.h>
+#include <machine/bus.h>
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+
+#include "iicbus_if.h"
+
+#define IIC_M_WR 0 /* write operation */
+#define MAX_RD_SZ 256 /* Largest read size we support */
+#define MAX_WR_SZ 256 /* Largest write size we support */
+
+struct icee_softc {
+ device_t sc_dev; /* Myself */
+ struct sx sc_lock; /* basically a perimeter lock */
+ struct cdev *cdev; /* user interface */
+ int addr;
+ int size; /* How big am I? */
+ int type; /* What type 8 or 16 bit? */
+ int rd_sz; /* What's the read page size */
+ int wr_sz; /* What's the write page size */
+};
+
+#define ICEE_LOCK(_sc) sx_xlock(&(_sc)->sc_lock)
+#define ICEE_UNLOCK(_sc) sx_xunlock(&(_sc)->sc_lock)
+#define ICEE_LOCK_INIT(_sc) sx_init(&_sc->sc_lock, "icee")
+#define ICEE_LOCK_DESTROY(_sc) sx_destroy(&_sc->sc_lock);
+#define ICEE_ASSERT_LOCKED(_sc) sx_assert(&_sc->sc_lock, SA_XLOCKED);
+#define ICEE_ASSERT_UNLOCKED(_sc) sx_assert(&_sc->sc_lock, SA_UNLOCKED);
+#define CDEV2SOFTC(dev) ((dev)->si_drv1)
+
+/* cdev routines */
+static d_open_t icee_open;
+static d_close_t icee_close;
+static d_read_t icee_read;
+static d_write_t icee_write;
+
+static struct cdevsw icee_cdevsw =
+{
+ .d_version = D_VERSION,
+ .d_flags = D_TRACKCLOSE,
+ .d_open = icee_open,
+ .d_close = icee_close,
+ .d_read = icee_read,
+ .d_write = icee_write
+};
+
+static int
+icee_probe(device_t dev)
+{
+ /* XXX really probe? -- not until we know the size... */
+ device_set_desc(dev, "I2C EEPROM");
+ return (BUS_PROBE_NOWILDCARD);
+}
+
+static int
+icee_attach(device_t dev)
+{
+ struct icee_softc *sc = device_get_softc(dev);
+ const char *dname;
+ int dunit, err;
+
+ sc->sc_dev = dev;
+ sc->addr = iicbus_get_addr(dev);
+ err = 0;
+ dname = device_get_name(dev);
+ dunit = device_get_unit(dev);
+ resource_int_value(dname, dunit, "size", &sc->size);
+ resource_int_value(dname, dunit, "type", &sc->type);
+ resource_int_value(dname, dunit, "rd_sz", &sc->rd_sz);
+ if (sc->rd_sz > MAX_RD_SZ)
+ sc->rd_sz = MAX_RD_SZ;
+ resource_int_value(dname, dunit, "wr_sz", &sc->wr_sz);
+ if (bootverbose)
+ device_printf(dev, "size: %d bytes bus_width: %d-bits\n",
+ sc->size, sc->type);
+ sc->cdev = make_dev(&icee_cdevsw, device_get_unit(dev), UID_ROOT,
+ GID_WHEEL, 0600, "icee%d", device_get_unit(dev));
+ if (sc->cdev == NULL) {
+ err = ENOMEM;
+ goto out;
+ }
+ sc->cdev->si_drv1 = sc;
+ ICEE_LOCK_INIT(sc);
+out:;
+ return (err);
+}
+
+static int
+icee_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
+{
+
+ return (0);
+}
+
+static int
+icee_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
+{
+
+ return (0);
+}
+
+static int
+icee_read(struct cdev *dev, struct uio *uio, int ioflag)
+{
+ struct icee_softc *sc;
+ uint8_t addr[2];
+ uint8_t data[MAX_RD_SZ];
+ int error, i, len, slave;
+ struct iic_msg msgs[2] = {
+ { 0, IIC_M_WR, 1, addr },
+ { 0, IIC_M_RD, 0, data },
+ };
+
+ sc = CDEV2SOFTC(dev);
+ if (uio->uio_offset == sc->size)
+ return (0);
+ if (uio->uio_offset > sc->size)
+ return (EIO);
+ if (sc->type != 8 && sc->type != 16)
+ return (EINVAL);
+ ICEE_LOCK(sc);
+ slave = error = 0;
+ while (uio->uio_resid > 0) {
+ if (uio->uio_offset >= sc->size)
+ break;
+ len = MIN(sc->rd_sz - (uio->uio_offset & (sc->rd_sz - 1)),
+ uio->uio_resid);
+ switch (sc->type) {
+ case 8:
+ slave = (uio->uio_offset >> 7) | sc->addr;
+ msgs[0].len = 1;
+ msgs[1].len = len;
+ addr[0] = uio->uio_offset & 0xff;
+ break;
+ case 16:
+ slave = sc->addr | (uio->uio_offset >> 15);
+ msgs[0].len = 2;
+ msgs[1].len = len;
+ addr[0] = (uio->uio_offset >> 8) & 0xff;
+ addr[1] = uio->uio_offset & 0xff;
+ break;
+ }
+ for (i = 0; i < 2; i++)
+ msgs[i].slave = slave;
+ error = iicbus_transfer(sc->sc_dev, msgs, 2);
+ if (error)
+ break;
+ error = uiomove(data, len, uio);
+ if (error)
+ break;
+ }
+ ICEE_UNLOCK(sc);
+ return (error);
+}
+
+/*
+ * Write to the part. We use three transfers here since we're actually
+ * doing a write followed by a read to make sure that the write finished.
+ * It is easier to encode the dummy read here than to break things up
+ * into smaller chunks...
+ */
+static int
+icee_write(struct cdev *dev, struct uio *uio, int ioflag)
+{
+ struct icee_softc *sc;
+ int error, len, slave, waitlimit;
+ uint8_t data[MAX_WR_SZ + 2];
+ struct iic_msg wr[1] = {
+ { 0, IIC_M_WR, 0, data },
+ };
+ struct iic_msg rd[1] = {
+ { 0, IIC_M_RD, 1, data },
+ };
+
+ sc = CDEV2SOFTC(dev);
+ if (uio->uio_offset >= sc->size)
+ return (EIO);
+ if (sc->type != 8 && sc->type != 16)
+ return (EINVAL);
+ ICEE_LOCK(sc);
+ slave = error = 0;
+ while (uio->uio_resid > 0) {
+ if (uio->uio_offset >= sc->size)
+ break;
+ len = MIN(sc->wr_sz - (uio->uio_offset & (sc->wr_sz - 1)),
+ uio->uio_resid);
+ switch (sc->type) {
+ case 8:
+ slave = (uio->uio_offset >> 7) | sc->addr;
+ wr[0].len = 1 + len;
+ data[0] = uio->uio_offset & 0xff;
+ break;
+ case 16:
+ slave = sc->addr | (uio->uio_offset >> 15);
+ wr[0].len = 2 + len;
+ data[0] = (uio->uio_offset >> 8) & 0xff;
+ data[1] = uio->uio_offset & 0xff;
+ break;
+ }
+ wr[0].slave = slave;
+ error = uiomove(data + sc->type / 8, len, uio);
+ if (error)
+ break;
+ error = iicbus_transfer(sc->sc_dev, wr, 1);
+ if (error)
+ break;
+ // Now wait for the write to be done by trying to read
+ // the part.
+ waitlimit = 10000;
+ rd[0].slave = slave;
+ do
+ {
+ error = iicbus_transfer(sc->sc_dev, rd, 1);
+ } while (waitlimit-- > 0 && error != 0);
+ if (error) {
+ printf("waiting for write failed %d\n", error);
+ break;
+ }
+ }
+ ICEE_UNLOCK(sc);
+ return error;
+}
+
+static device_method_t icee_methods[] = {
+ DEVMETHOD(device_probe, icee_probe),
+ DEVMETHOD(device_attach, icee_attach),
+
+ {0, 0},
+};
+
+static driver_t icee_driver = {
+ "icee",
+ icee_methods,
+ sizeof(struct icee_softc),
+};
+static devclass_t icee_devclass;
+
+DRIVER_MODULE(icee, iicbus, icee_driver, icee_devclass, 0, 0);
+MODULE_VERSION(icee, 1);
+MODULE_DEPEND(icee, iicbus, 1, 1, 1);
diff --git a/sys/dev/iicbus/if_ic.c b/sys/dev/iicbus/if_ic.c
new file mode 100644
index 000000000000..bb5186cc401d
--- /dev/null
+++ b/sys/dev/iicbus/if_ic.c
@@ -0,0 +1,436 @@
+/*-
+ * Copyright (c) 1998, 2001 Nicolas Souchu
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * I2C bus IP driver
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/mbuf.h>
+#include <sys/socket.h>
+#include <sys/filio.h>
+#include <sys/sockio.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/module.h>
+#include <sys/mutex.h>
+#include <sys/bus.h>
+#include <sys/time.h>
+#include <sys/malloc.h>
+
+#include <net/if.h>
+#include <net/if_types.h>
+#include <net/netisr.h>
+
+#include <sys/mbuf.h>
+#include <sys/socket.h>
+#include <net/netisr.h>
+#include <net/route.h>
+#include <netinet/in.h>
+#include <netinet/in_systm.h>
+#include <netinet/in_var.h>
+#include <netinet/ip.h>
+#include <netinet/if_ether.h>
+
+#include <net/bpf.h>
+
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+
+#include "iicbus_if.h"
+
+#define PCF_MASTER_ADDRESS 0xaa
+
+#define ICHDRLEN sizeof(u_int32_t)
+#define ICMTU 1500 /* default mtu */
+
+struct ic_softc {
+ struct ifnet *ic_ifp;
+ device_t ic_dev;
+
+ u_char ic_addr; /* peer I2C address */
+
+ int ic_flags;
+
+ char *ic_obuf;
+ char *ic_ifbuf;
+ char *ic_cp;
+
+ int ic_xfercnt;
+
+ int ic_iferrs;
+
+ struct mtx ic_lock;
+};
+
+#define IC_SENDING 0x0001
+#define IC_OBUF_BUSY 0x0002
+#define IC_IFBUF_BUSY 0x0004
+#define IC_BUFFERS_BUSY (IC_OBUF_BUSY | IC_IFBUF_BUSY)
+#define IC_BUFFER_WAITER 0x0004
+
+static devclass_t ic_devclass;
+
+static int icprobe(device_t);
+static int icattach(device_t);
+
+static int icioctl(struct ifnet *, u_long, caddr_t);
+static int icoutput(struct ifnet *, struct mbuf *, struct sockaddr *,
+ struct route *);
+
+static int icintr(device_t, int, char *);
+
+static device_method_t ic_methods[] = {
+ /* device interface */
+ DEVMETHOD(device_probe, icprobe),
+ DEVMETHOD(device_attach, icattach),
+
+ /* iicbus interface */
+ DEVMETHOD(iicbus_intr, icintr),
+
+ { 0, 0 }
+};
+
+static driver_t ic_driver = {
+ "ic",
+ ic_methods,
+ sizeof(struct ic_softc),
+};
+
+static void
+ic_alloc_buffers(struct ic_softc *sc, int mtu)
+{
+ char *obuf, *ifbuf;
+
+ obuf = malloc(mtu + ICHDRLEN, M_DEVBUF, M_WAITOK);
+ ifbuf = malloc(mtu + ICHDRLEN, M_DEVBUF, M_WAITOK);
+
+ mtx_lock(&sc->ic_lock);
+ while (sc->ic_flags & IC_BUFFERS_BUSY) {
+ sc->ic_flags |= IC_BUFFER_WAITER;
+ mtx_sleep(sc, &sc->ic_lock, 0, "icalloc", 0);
+ sc->ic_flags &= ~IC_BUFFER_WAITER;
+ }
+
+ free(sc->ic_obuf, M_DEVBUF);
+ free(sc->ic_ifbuf, M_DEVBUF);
+ sc->ic_obuf = obuf;
+ sc->ic_ifbuf = ifbuf;
+ sc->ic_ifp->if_mtu = mtu;
+ mtx_unlock(&sc->ic_lock);
+}
+
+/*
+ * icprobe()
+ */
+static int
+icprobe(device_t dev)
+{
+ return (BUS_PROBE_NOWILDCARD);
+}
+
+/*
+ * icattach()
+ */
+static int
+icattach(device_t dev)
+{
+ struct ic_softc *sc = (struct ic_softc *)device_get_softc(dev);
+ struct ifnet *ifp;
+
+ ifp = sc->ic_ifp = if_alloc(IFT_PARA);
+ if (ifp == NULL)
+ return (ENOSPC);
+
+ mtx_init(&sc->ic_lock, device_get_nameunit(dev), MTX_NETWORK_LOCK,
+ MTX_DEF);
+ sc->ic_addr = PCF_MASTER_ADDRESS; /* XXX only PCF masters */
+ sc->ic_dev = dev;
+
+ ifp->if_softc = sc;
+ if_initname(ifp, device_get_name(dev), device_get_unit(dev));
+ ifp->if_flags = IFF_SIMPLEX | IFF_POINTOPOINT | IFF_MULTICAST;
+ ifp->if_ioctl = icioctl;
+ ifp->if_output = icoutput;
+ ifp->if_hdrlen = 0;
+ ifp->if_addrlen = 0;
+ ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
+
+ ic_alloc_buffers(sc, ICMTU);
+
+ if_attach(ifp);
+
+ bpfattach(ifp, DLT_NULL, ICHDRLEN);
+
+ return (0);
+}
+
+/*
+ * iciotcl()
+ */
+static int
+icioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
+{
+ struct ic_softc *sc = ifp->if_softc;
+ device_t icdev = sc->ic_dev;
+ device_t parent = device_get_parent(icdev);
+ struct ifaddr *ifa = (struct ifaddr *)data;
+ struct ifreq *ifr = (struct ifreq *)data;
+ int error;
+
+ switch (cmd) {
+
+ case SIOCSIFDSTADDR:
+ case SIOCAIFADDR:
+ case SIOCSIFADDR:
+ if (ifa->ifa_addr->sa_family != AF_INET)
+ return (EAFNOSUPPORT);
+ mtx_lock(&sc->ic_lock);
+ ifp->if_flags |= IFF_UP;
+ goto locked;
+ case SIOCSIFFLAGS:
+ mtx_lock(&sc->ic_lock);
+ locked:
+ if ((!(ifp->if_flags & IFF_UP)) &&
+ (ifp->if_drv_flags & IFF_DRV_RUNNING)) {
+
+ /* XXX disable PCF */
+ ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
+ mtx_unlock(&sc->ic_lock);
+
+ /* IFF_UP is not set, try to release the bus anyway */
+ iicbus_release_bus(parent, icdev);
+ break;
+ }
+ if (((ifp->if_flags & IFF_UP)) &&
+ (!(ifp->if_drv_flags & IFF_DRV_RUNNING))) {
+ mtx_unlock(&sc->ic_lock);
+ if ((error = iicbus_request_bus(parent, icdev,
+ IIC_WAIT | IIC_INTR)))
+ return (error);
+ mtx_lock(&sc->ic_lock);
+ iicbus_reset(parent, IIC_FASTEST, 0, NULL);
+ ifp->if_drv_flags |= IFF_DRV_RUNNING;
+ }
+ mtx_unlock(&sc->ic_lock);
+ break;
+
+ case SIOCSIFMTU:
+ ic_alloc_buffers(sc, ifr->ifr_mtu);
+ break;
+
+ case SIOCGIFMTU:
+ mtx_lock(&sc->ic_lock);
+ ifr->ifr_mtu = sc->ic_ifp->if_mtu;
+ mtx_unlock(&sc->ic_lock);
+ break;
+
+ case SIOCADDMULTI:
+ case SIOCDELMULTI:
+ if (ifr == 0)
+ return (EAFNOSUPPORT); /* XXX */
+ switch (ifr->ifr_addr.sa_family) {
+ case AF_INET:
+ break;
+ default:
+ return (EAFNOSUPPORT);
+ }
+ break;
+ default:
+ return (EINVAL);
+ }
+ return (0);
+}
+
+/*
+ * icintr()
+ */
+static int
+icintr(device_t dev, int event, char *ptr)
+{
+ struct ic_softc *sc = (struct ic_softc *)device_get_softc(dev);
+ struct mbuf *top;
+ int len;
+
+ mtx_lock(&sc->ic_lock);
+
+ switch (event) {
+
+ case INTR_GENERAL:
+ case INTR_START:
+ sc->ic_cp = sc->ic_ifbuf;
+ sc->ic_xfercnt = 0;
+ sc->ic_flags |= IC_IFBUF_BUSY;
+ break;
+
+ case INTR_STOP:
+
+ /* if any error occured during transfert,
+ * drop the packet */
+ sc->ic_flags &= ~IC_IFBUF_BUSY;
+ if ((sc->ic_flags & (IC_BUFFERS_BUSY | IC_BUFFER_WAITER)) ==
+ IC_BUFFER_WAITER)
+ wakeup(&sc);
+ if (sc->ic_iferrs)
+ goto err;
+ if ((len = sc->ic_xfercnt) == 0)
+ break; /* ignore */
+ if (len <= ICHDRLEN)
+ goto err;
+ len -= ICHDRLEN;
+ sc->ic_ifp->if_ipackets++;
+ sc->ic_ifp->if_ibytes += len;
+ BPF_TAP(sc->ic_ifp, sc->ic_ifbuf, len + ICHDRLEN);
+ top = m_devget(sc->ic_ifbuf + ICHDRLEN, len, 0, sc->ic_ifp, 0);
+ if (top) {
+ mtx_unlock(&sc->ic_lock);
+ netisr_dispatch(NETISR_IP, top);
+ mtx_lock(&sc->ic_lock);
+ }
+ break;
+ err:
+ if_printf(sc->ic_ifp, "errors (%d)!\n", sc->ic_iferrs);
+ sc->ic_iferrs = 0; /* reset error count */
+ sc->ic_ifp->if_ierrors++;
+ break;
+
+ case INTR_RECEIVE:
+ if (sc->ic_xfercnt >= sc->ic_ifp->if_mtu + ICHDRLEN) {
+ sc->ic_iferrs++;
+ } else {
+ *sc->ic_cp++ = *ptr;
+ sc->ic_xfercnt++;
+ }
+ break;
+
+ case INTR_NOACK: /* xfer terminated by master */
+ break;
+
+ case INTR_TRANSMIT:
+ *ptr = 0xff; /* XXX */
+ break;
+
+ case INTR_ERROR:
+ sc->ic_iferrs++;
+ break;
+
+ default:
+ panic("%s: unknown event (%d)!", __func__, event);
+ }
+
+ mtx_unlock(&sc->ic_lock);
+ return (0);
+}
+
+/*
+ * icoutput()
+ */
+static int
+icoutput(struct ifnet *ifp, struct mbuf *m, struct sockaddr *dst,
+ struct route *ro)
+{
+ struct ic_softc *sc = ifp->if_softc;
+ device_t icdev = sc->ic_dev;
+ device_t parent = device_get_parent(icdev);
+ int len, sent;
+ struct mbuf *mm;
+ u_char *cp;
+ u_int32_t hdr;
+
+ /* BPF writes need to be handled specially. */
+ if (dst->sa_family == AF_UNSPEC)
+ bcopy(dst->sa_data, &hdr, sizeof(hdr));
+ else
+ hdr = dst->sa_family;
+
+ mtx_lock(&sc->ic_lock);
+ ifp->if_drv_flags |= IFF_DRV_RUNNING;
+
+ /* already sending? */
+ if (sc->ic_flags & IC_SENDING) {
+ ifp->if_oerrors++;
+ goto error;
+ }
+
+ /* insert header */
+ bcopy ((char *)&hdr, sc->ic_obuf, ICHDRLEN);
+
+ cp = sc->ic_obuf + ICHDRLEN;
+ len = 0;
+ mm = m;
+ do {
+ if (len + mm->m_len > sc->ic_ifp->if_mtu) {
+ /* packet too large */
+ ifp->if_oerrors++;
+ goto error;
+ }
+
+ bcopy(mtod(mm,char *), cp, mm->m_len);
+ cp += mm->m_len;
+ len += mm->m_len;
+
+ } while ((mm = mm->m_next));
+
+ BPF_MTAP2(ifp, &hdr, sizeof(hdr), m);
+
+ sc->ic_flags |= (IC_SENDING | IC_OBUF_BUSY);
+
+ m_freem(m);
+ mtx_unlock(&sc->ic_lock);
+
+ /* send the packet */
+ if (iicbus_block_write(parent, sc->ic_addr, sc->ic_obuf,
+ len + ICHDRLEN, &sent))
+
+ ifp->if_oerrors++;
+ else {
+ ifp->if_opackets++;
+ ifp->if_obytes += len;
+ }
+
+ mtx_lock(&sc->ic_lock);
+ sc->ic_flags &= ~(IC_SENDING | IC_OBUF_BUSY);
+ if ((sc->ic_flags & (IC_BUFFERS_BUSY | IC_BUFFER_WAITER)) ==
+ IC_BUFFER_WAITER)
+ wakeup(&sc);
+ mtx_unlock(&sc->ic_lock);
+
+ return (0);
+
+error:
+ m_freem(m);
+ mtx_unlock(&sc->ic_lock);
+
+ return(0);
+}
+
+DRIVER_MODULE(ic, iicbus, ic_driver, ic_devclass, 0, 0);
+MODULE_DEPEND(ic, iicbus, IICBUS_MINVER, IICBUS_PREFVER, IICBUS_MAXVER);
+MODULE_VERSION(ic, 1);
diff --git a/sys/dev/iicbus/iic.c b/sys/dev/iicbus/iic.c
new file mode 100644
index 000000000000..673d635d02b0
--- /dev/null
+++ b/sys/dev/iicbus/iic.c
@@ -0,0 +1,389 @@
+/*-
+ * Copyright (c) 1998, 2001 Nicolas Souchu
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ *
+ */
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/conf.h>
+#include <sys/fcntl.h>
+#include <sys/lock.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+#include <sys/module.h>
+#include <sys/sx.h>
+#include <sys/systm.h>
+#include <sys/uio.h>
+
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+#include <dev/iicbus/iic.h>
+
+#include "iicbus_if.h"
+
+#define BUFSIZE 1024
+
+struct iic_softc {
+
+ device_t sc_dev;
+ u_char sc_addr; /* 7 bit address on iicbus */
+ int sc_count; /* >0 if device opened */
+
+ char sc_buffer[BUFSIZE]; /* output buffer */
+ char sc_inbuf[BUFSIZE]; /* input buffer */
+
+ struct cdev *sc_devnode;
+ struct sx sc_lock;
+};
+
+#define IIC_LOCK(sc) sx_xlock(&(sc)->sc_lock)
+#define IIC_UNLOCK(sc) sx_xunlock(&(sc)->sc_lock)
+
+static int iic_probe(device_t);
+static int iic_attach(device_t);
+static int iic_detach(device_t);
+static void iic_identify(driver_t *driver, device_t parent);
+
+static devclass_t iic_devclass;
+
+static device_method_t iic_methods[] = {
+ /* device interface */
+ DEVMETHOD(device_identify, iic_identify),
+ DEVMETHOD(device_probe, iic_probe),
+ DEVMETHOD(device_attach, iic_attach),
+ DEVMETHOD(device_detach, iic_detach),
+
+ /* iicbus interface */
+ DEVMETHOD(iicbus_intr, iicbus_generic_intr),
+
+ { 0, 0 }
+};
+
+static driver_t iic_driver = {
+ "iic",
+ iic_methods,
+ sizeof(struct iic_softc),
+};
+
+static d_open_t iicopen;
+static d_close_t iicclose;
+static d_write_t iicwrite;
+static d_read_t iicread;
+static d_ioctl_t iicioctl;
+
+static struct cdevsw iic_cdevsw = {
+ .d_version = D_VERSION,
+ .d_flags = D_TRACKCLOSE,
+ .d_open = iicopen,
+ .d_close = iicclose,
+ .d_read = iicread,
+ .d_write = iicwrite,
+ .d_ioctl = iicioctl,
+ .d_name = "iic",
+};
+
+static void
+iic_identify(driver_t *driver, device_t parent)
+{
+
+ if (device_find_child(parent, "iic", -1) == NULL)
+ BUS_ADD_CHILD(parent, 0, "iic", -1);
+}
+
+static int
+iic_probe(device_t dev)
+{
+ if (iicbus_get_addr(dev) > 0)
+ return (ENXIO);
+
+ device_set_desc(dev, "I2C generic I/O");
+
+ return (0);
+}
+
+static int
+iic_attach(device_t dev)
+{
+ struct iic_softc *sc = (struct iic_softc *)device_get_softc(dev);
+
+ sc->sc_dev = dev;
+ sx_init(&sc->sc_lock, "iic");
+ sc->sc_devnode = make_dev(&iic_cdevsw, device_get_unit(dev),
+ UID_ROOT, GID_WHEEL,
+ 0600, "iic%d", device_get_unit(dev));
+ if (sc->sc_devnode == NULL) {
+ device_printf(dev, "failed to create character device\n");
+ sx_destroy(&sc->sc_lock);
+ return (ENXIO);
+ }
+ sc->sc_devnode->si_drv1 = sc;
+
+ return (0);
+}
+
+static int
+iic_detach(device_t dev)
+{
+ struct iic_softc *sc = (struct iic_softc *)device_get_softc(dev);
+
+ if (sc->sc_devnode)
+ destroy_dev(sc->sc_devnode);
+ sx_destroy(&sc->sc_lock);
+
+ return (0);
+}
+
+static int
+iicopen(struct cdev *dev, int flags, int fmt, struct thread *td)
+{
+ struct iic_softc *sc = dev->si_drv1;
+
+ IIC_LOCK(sc);
+ if (sc->sc_count > 0) {
+ IIC_UNLOCK(sc);
+ return (EBUSY);
+ }
+
+ sc->sc_count++;
+ IIC_UNLOCK(sc);
+
+ return (0);
+}
+
+static int
+iicclose(struct cdev *dev, int flags, int fmt, struct thread *td)
+{
+ struct iic_softc *sc = dev->si_drv1;
+
+ IIC_LOCK(sc);
+ if (!sc->sc_count) {
+ /* XXX: I don't think this can happen. */
+ IIC_UNLOCK(sc);
+ return (EINVAL);
+ }
+
+ sc->sc_count--;
+
+ if (sc->sc_count < 0)
+ panic("%s: iic_count < 0!", __func__);
+ IIC_UNLOCK(sc);
+
+ return (0);
+}
+
+static int
+iicwrite(struct cdev *dev, struct uio * uio, int ioflag)
+{
+ struct iic_softc *sc = dev->si_drv1;
+ device_t iicdev = sc->sc_dev;
+ int sent, error, count;
+
+ IIC_LOCK(sc);
+ if (!sc->sc_addr) {
+ IIC_UNLOCK(sc);
+ return (EINVAL);
+ }
+
+ if (sc->sc_count == 0) {
+ /* XXX: I don't think this can happen. */
+ IIC_UNLOCK(sc);
+ return (EINVAL);
+ }
+
+ error = iicbus_request_bus(device_get_parent(iicdev), iicdev,
+ IIC_DONTWAIT);
+ if (error) {
+ IIC_UNLOCK(sc);
+ return (error);
+ }
+
+ count = min(uio->uio_resid, BUFSIZE);
+ uiomove(sc->sc_buffer, count, uio);
+
+ error = iicbus_block_write(device_get_parent(iicdev), sc->sc_addr,
+ sc->sc_buffer, count, &sent);
+
+ iicbus_release_bus(device_get_parent(iicdev), iicdev);
+ IIC_UNLOCK(sc);
+
+ return (error);
+}
+
+static int
+iicread(struct cdev *dev, struct uio * uio, int ioflag)
+{
+ struct iic_softc *sc = dev->si_drv1;
+ device_t iicdev = sc->sc_dev;
+ int len, error = 0;
+ int bufsize;
+
+ IIC_LOCK(sc);
+ if (!sc->sc_addr) {
+ IIC_UNLOCK(sc);
+ return (EINVAL);
+ }
+
+ if (sc->sc_count == 0) {
+ /* XXX: I don't think this can happen. */
+ IIC_UNLOCK(sc);
+ return (EINVAL);
+ }
+
+ error = iicbus_request_bus(device_get_parent(iicdev), iicdev,
+ IIC_DONTWAIT);
+ if (error) {
+ IIC_UNLOCK(sc);
+ return (error);
+ }
+
+ /* max amount of data to read */
+ len = min(uio->uio_resid, BUFSIZE);
+
+ error = iicbus_block_read(device_get_parent(iicdev), sc->sc_addr,
+ sc->sc_inbuf, len, &bufsize);
+ if (error) {
+ IIC_UNLOCK(sc);
+ return (error);
+ }
+
+ if (bufsize > uio->uio_resid)
+ panic("%s: too much data read!", __func__);
+
+ iicbus_release_bus(device_get_parent(iicdev), iicdev);
+
+ error = uiomove(sc->sc_inbuf, bufsize, uio);
+ IIC_UNLOCK(sc);
+ return (error);
+}
+
+static int
+iicioctl(struct cdev *dev, u_long cmd, caddr_t data, int flags, struct thread *td)
+{
+ struct iic_softc *sc = dev->si_drv1;
+ device_t iicdev = sc->sc_dev;
+ device_t parent = device_get_parent(iicdev);
+ struct iiccmd *s = (struct iiccmd *)data;
+ struct iic_rdwr_data *d = (struct iic_rdwr_data *)data;
+ struct iic_msg *m;
+ int error, count, i;
+ char *buf = NULL;
+ void **usrbufs = NULL;
+
+ if ((error = iicbus_request_bus(parent, iicdev,
+ (flags & O_NONBLOCK) ? IIC_DONTWAIT : (IIC_WAIT | IIC_INTR))))
+ return (error);
+
+ switch (cmd) {
+ case I2CSTART:
+ IIC_LOCK(sc);
+ error = iicbus_start(parent, s->slave, 0);
+
+ /*
+ * Implicitly set the chip addr to the slave addr passed as
+ * parameter. Consequently, start/stop shall be called before
+ * the read or the write of a block.
+ */
+ if (!error)
+ sc->sc_addr = s->slave;
+ IIC_UNLOCK(sc);
+
+ break;
+
+ case I2CSTOP:
+ error = iicbus_stop(parent);
+ break;
+
+ case I2CRSTCARD:
+ error = iicbus_reset(parent, IIC_UNKNOWN, 0, NULL);
+ break;
+
+ case I2CWRITE:
+ if (s->count <= 0) {
+ error = EINVAL;
+ break;
+ }
+ buf = malloc((unsigned long)s->count, M_TEMP, M_WAITOK);
+ error = copyin(s->buf, buf, s->count);
+ if (error)
+ break;
+ error = iicbus_write(parent, buf, s->count, &count, 10);
+ break;
+
+ case I2CREAD:
+ if (s->count <= 0) {
+ error = EINVAL;
+ break;
+ }
+ buf = malloc((unsigned long)s->count, M_TEMP, M_WAITOK);
+ error = iicbus_read(parent, buf, s->count, &count, s->last, 10);
+ if (error)
+ break;
+ error = copyout(buf, s->buf, s->count);
+ break;
+
+ case I2CRDWR:
+ buf = malloc(sizeof(*d->msgs) * d->nmsgs, M_TEMP, M_WAITOK);
+ usrbufs = malloc(sizeof(void *) * d->nmsgs, M_TEMP, M_ZERO | M_WAITOK);
+ error = copyin(d->msgs, buf, sizeof(*d->msgs) * d->nmsgs);
+ if (error)
+ break;
+ /* Alloc kernel buffers for userland data, copyin write data */
+ for (i = 0; i < d->nmsgs; i++) {
+ m = &((struct iic_msg *)buf)[i];
+ usrbufs[i] = m->buf;
+ m->buf = malloc(m->len, M_TEMP, M_WAITOK);
+ if (!(m->flags & IIC_M_RD))
+ copyin(usrbufs[i], m->buf, m->len);
+ }
+ error = iicbus_transfer(iicdev, (struct iic_msg *)buf, d->nmsgs);
+ /* Copyout all read segments, free up kernel buffers */
+ for (i = 0; i < d->nmsgs; i++) {
+ m = &((struct iic_msg *)buf)[i];
+ if (m->flags & IIC_M_RD)
+ copyout(m->buf, usrbufs[i], m->len);
+ free(m->buf, M_TEMP);
+ }
+ free(usrbufs, M_TEMP);
+ break;
+
+ case I2CRPTSTART:
+ error = iicbus_repeated_start(parent, s->slave, 0);
+ break;
+
+ default:
+ error = ENOTTY;
+ }
+
+ iicbus_release_bus(parent, iicdev);
+
+ if (buf != NULL)
+ free(buf, M_TEMP);
+ return (error);
+}
+
+DRIVER_MODULE(iic, iicbus, iic_driver, iic_devclass, 0, 0);
+MODULE_DEPEND(iic, iicbus, IICBUS_MINVER, IICBUS_PREFVER, IICBUS_MAXVER);
+MODULE_VERSION(iic, 1);
diff --git a/sys/dev/iicbus/iic.h b/sys/dev/iicbus/iic.h
new file mode 100644
index 000000000000..bc29fa01518e
--- /dev/null
+++ b/sys/dev/iicbus/iic.h
@@ -0,0 +1,65 @@
+/*-
+ * Copyright (c) 1998 Nicolas Souchu
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ *
+ */
+#ifndef __IIC_H
+#define __IIC_H
+
+#include <sys/ioccom.h>
+
+/* Designed to be compatible with linux's struct i2c_msg */
+struct iic_msg
+{
+ uint16_t slave;
+ uint16_t flags;
+#define IIC_M_WR 0 /* Fake flag for write */
+#define IIC_M_RD 0x0001 /* read vs write */
+ uint16_t len; /* msg legnth */
+ uint8_t * buf;
+};
+
+struct iiccmd {
+ u_char slave;
+ int count;
+ int last;
+ char *buf;
+};
+
+struct iic_rdwr_data {
+ struct iic_msg *msgs;
+ uint32_t nmsgs;
+};
+
+#define I2CSTART _IOW('i', 1, struct iiccmd) /* start condition */
+#define I2CSTOP _IO('i', 2) /* stop condition */
+#define I2CRSTCARD _IOW('i', 3, struct iiccmd) /* reset the card */
+#define I2CWRITE _IOW('i', 4, struct iiccmd) /* send data */
+#define I2CREAD _IOW('i', 5, struct iiccmd) /* receive data */
+#define I2CRDWR _IOW('i', 6, struct iic_rdwr_data) /* General read/write interface */
+#define I2CRPTSTART _IOW('i', 7, struct iiccmd) /* repeated start */
+
+#endif
diff --git a/sys/dev/iicbus/iicbb.c b/sys/dev/iicbus/iicbb.c
new file mode 100644
index 000000000000..2bc632143b5f
--- /dev/null
+++ b/sys/dev/iicbus/iicbb.c
@@ -0,0 +1,419 @@
+/*-
+ * Copyright (c) 1998, 2001 Nicolas Souchu
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * Generic I2C bit-banging code
+ *
+ * Example:
+ *
+ * iicbus
+ * / \
+ * iicbb pcf
+ * | \
+ * bti2c lpbb
+ *
+ * From Linux I2C generic interface
+ * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
+ *
+ */
+
+#include <sys/param.h>
+#include <sys/kernel.h>
+#include <sys/systm.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/uio.h>
+
+
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+
+#include <dev/smbus/smbconf.h>
+
+#include "iicbus_if.h"
+#include "iicbb_if.h"
+
+struct iicbb_softc {
+ device_t iicbus;
+};
+
+static int iicbb_attach(device_t);
+static void iicbb_child_detached(device_t, device_t);
+static int iicbb_detach(device_t);
+static int iicbb_print_child(device_t, device_t);
+static int iicbb_probe(device_t);
+
+static int iicbb_callback(device_t, int, caddr_t);
+static int iicbb_start(device_t, u_char, int);
+static int iicbb_stop(device_t);
+static int iicbb_write(device_t, const char *, int, int *, int);
+static int iicbb_read(device_t, char *, int, int *, int, int);
+static int iicbb_reset(device_t, u_char, u_char, u_char *);
+
+static device_method_t iicbb_methods[] = {
+ /* device interface */
+ DEVMETHOD(device_probe, iicbb_probe),
+ DEVMETHOD(device_attach, iicbb_attach),
+ DEVMETHOD(device_detach, iicbb_detach),
+
+ /* bus interface */
+ DEVMETHOD(bus_child_detached, iicbb_child_detached),
+ DEVMETHOD(bus_print_child, iicbb_print_child),
+
+ /* iicbus interface */
+ DEVMETHOD(iicbus_callback, iicbb_callback),
+ DEVMETHOD(iicbus_start, iicbb_start),
+ DEVMETHOD(iicbus_repeated_start, iicbb_start),
+ DEVMETHOD(iicbus_stop, iicbb_stop),
+ DEVMETHOD(iicbus_write, iicbb_write),
+ DEVMETHOD(iicbus_read, iicbb_read),
+ DEVMETHOD(iicbus_reset, iicbb_reset),
+ DEVMETHOD(iicbus_transfer, iicbus_transfer_gen),
+
+ { 0, 0 }
+};
+
+driver_t iicbb_driver = {
+ "iicbb",
+ iicbb_methods,
+ sizeof(struct iicbb_softc),
+};
+
+devclass_t iicbb_devclass;
+
+static int
+iicbb_probe(device_t dev)
+{
+ device_set_desc(dev, "I2C bit-banging driver");
+
+ return (0);
+}
+
+static int
+iicbb_attach(device_t dev)
+{
+ struct iicbb_softc *sc = (struct iicbb_softc *)device_get_softc(dev);
+
+ sc->iicbus = device_add_child(dev, "iicbus", -1);
+ if (!sc->iicbus)
+ return (ENXIO);
+ bus_generic_attach(dev);
+
+ return (0);
+}
+
+static int
+iicbb_detach(device_t dev)
+{
+ struct iicbb_softc *sc = (struct iicbb_softc *)device_get_softc(dev);
+ device_t child;
+
+ /*
+ * We need to save child because the detach indirectly causes
+ * sc->iicbus to be zeroed. Since we added the device
+ * unconditionally in iicbb_attach, we need to make sure we
+ * delete it here. See iicbb_child_detached. We need that
+ * callback in case newbus detached our children w/o detaching
+ * us (say iicbus is a module and unloaded w/o iicbb being
+ * unloaded).
+ */
+ child = sc->iicbus;
+ bus_generic_detach(dev);
+ if (child)
+ device_delete_child(dev, child);
+
+ return (0);
+}
+
+static void
+iicbb_child_detached( device_t dev, device_t child )
+{
+ struct iicbb_softc *sc = (struct iicbb_softc *)device_get_softc(dev);
+
+ if (child == sc->iicbus)
+ sc->iicbus = NULL;
+}
+
+static int
+iicbb_print_child(device_t bus, device_t dev)
+{
+ int error;
+ int retval = 0;
+ u_char oldaddr;
+
+ retval += bus_print_child_header(bus, dev);
+ /* retrieve the interface I2C address */
+ error = IICBB_RESET(device_get_parent(bus), IIC_FASTEST, 0, &oldaddr);
+ if (error == IIC_ENOADDR) {
+ retval += printf(" on %s master-only\n",
+ device_get_nameunit(bus));
+ } else {
+ /* restore the address */
+ IICBB_RESET(device_get_parent(bus), IIC_FASTEST, oldaddr, NULL);
+
+ retval += printf(" on %s addr 0x%x\n",
+ device_get_nameunit(bus), oldaddr & 0xff);
+ }
+
+ return (retval);
+}
+
+#define IIC_DELAY 10
+
+#define I2C_SETSDA(dev,val) do { \
+ IICBB_SETSDA(device_get_parent(dev), val); \
+ DELAY(IIC_DELAY); \
+ } while (0)
+
+#define I2C_SETSCL(dev,val) do { \
+ iicbb_setscl(dev, val, 100); \
+ } while (0)
+
+#define I2C_SET(dev,ctrl,data) do { \
+ I2C_SETSCL(dev, ctrl); \
+ I2C_SETSDA(dev, data); \
+ } while (0)
+
+#define I2C_GETSDA(dev) (IICBB_GETSDA(device_get_parent(dev)))
+
+#define I2C_GETSCL(dev) (IICBB_GETSCL(device_get_parent(dev)))
+
+static int i2c_debug = 0;
+#define I2C_DEBUG(x) do { \
+ if (i2c_debug) (x); \
+ } while (0)
+
+#define I2C_LOG(format,args...) do { \
+ printf(format, args); \
+ } while (0)
+
+static void
+iicbb_setscl(device_t dev, int val, int timeout)
+{
+ int k = 0;
+
+ IICBB_SETSCL(device_get_parent(dev), val);
+ DELAY(IIC_DELAY);
+
+ while (val && !I2C_GETSCL(dev) && k++ < timeout) {
+ IICBB_SETSCL(device_get_parent(dev), val);
+ DELAY(IIC_DELAY);
+ }
+
+ return;
+}
+
+static void
+iicbb_one(device_t dev, int timeout)
+{
+ I2C_SET(dev,0,1);
+ I2C_SET(dev,1,1);
+ I2C_SET(dev,0,1);
+ return;
+}
+
+static void
+iicbb_zero(device_t dev, int timeout)
+{
+ I2C_SET(dev,0,0);
+ I2C_SET(dev,1,0);
+ I2C_SET(dev,0,0);
+ return;
+}
+
+/*
+ * Waiting for ACKNOWLEDGE.
+ *
+ * When a chip is being addressed or has received data it will issue an
+ * ACKNOWLEDGE pulse. Therefore the MASTER must release the DATA line
+ * (set it to high level) and then release the CLOCK line.
+ * Now it must wait for the SLAVE to pull the DATA line low.
+ * Actually on the bus this looks like a START condition so nothing happens
+ * because of the fact that the IC's that have not been addressed are doing
+ * nothing.
+ *
+ * When the SLAVE has pulled this line low the MASTER will take the CLOCK
+ * line low and then the SLAVE will release the SDA (data) line.
+ */
+static int
+iicbb_ack(device_t dev, int timeout)
+{
+ int noack;
+ int k = 0;
+
+ I2C_SET(dev,0,1);
+ I2C_SET(dev,1,1);
+ do {
+ noack = I2C_GETSDA(dev);
+ if (!noack)
+ break;
+ DELAY(10);
+ k += 10;
+ } while (k < timeout);
+
+ I2C_SET(dev,0,1);
+ I2C_DEBUG(printf("%c ",noack?'-':'+'));
+
+ return (noack);
+}
+
+static void
+iicbb_sendbyte(device_t dev, u_char data, int timeout)
+{
+ int i;
+
+ for (i=7; i>=0; i--) {
+ if (data&(1<<i)) {
+ iicbb_one(dev, timeout);
+ } else {
+ iicbb_zero(dev, timeout);
+ }
+ }
+ I2C_DEBUG(printf("w%02x",(int)data));
+ return;
+}
+
+static u_char
+iicbb_readbyte(device_t dev, int last, int timeout)
+{
+ int i;
+ unsigned char data=0;
+
+ I2C_SET(dev,0,1);
+ for (i=7; i>=0; i--)
+ {
+ I2C_SET(dev,1,1);
+ if (I2C_GETSDA(dev))
+ data |= (1<<i);
+ I2C_SET(dev,0,1);
+ }
+ if (last) {
+ iicbb_one(dev, timeout);
+ } else {
+ iicbb_zero(dev, timeout);
+ }
+ I2C_DEBUG(printf("r%02x%c ",(int)data,last?'-':'+'));
+ return data;
+}
+
+static int
+iicbb_callback(device_t dev, int index, caddr_t data)
+{
+ return (IICBB_CALLBACK(device_get_parent(dev), index, data));
+}
+
+static int
+iicbb_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
+{
+ return (IICBB_RESET(device_get_parent(dev), speed, addr, oldaddr));
+}
+
+static int
+iicbb_start(device_t dev, u_char slave, int timeout)
+{
+ int error;
+
+ I2C_DEBUG(printf("<"));
+
+ I2C_SET(dev,1,1);
+ I2C_SET(dev,1,0);
+ I2C_SET(dev,0,0);
+
+ /* send address */
+ iicbb_sendbyte(dev, slave, timeout);
+
+ /* check for ack */
+ if (iicbb_ack(dev, timeout)) {
+ error = IIC_ENOACK;
+ goto error;
+ }
+
+ return(0);
+
+error:
+ iicbb_stop(dev);
+ return (error);
+}
+
+static int
+iicbb_stop(device_t dev)
+{
+ I2C_SET(dev,0,0);
+ I2C_SET(dev,1,0);
+ I2C_SET(dev,1,1);
+ I2C_DEBUG(printf(">"));
+ return (0);
+}
+
+static int
+iicbb_write(device_t dev, const char *buf, int len, int *sent, int timeout)
+{
+ int bytes, error = 0;
+
+ bytes = 0;
+ while (len) {
+ /* send byte */
+ iicbb_sendbyte(dev,(u_char)*buf++, timeout);
+
+ /* check for ack */
+ if (iicbb_ack(dev, timeout)) {
+ error = IIC_ENOACK;
+ goto error;
+ }
+ bytes ++;
+ len --;
+ }
+
+error:
+ *sent = bytes;
+ return (error);
+}
+
+static int
+iicbb_read(device_t dev, char * buf, int len, int *read, int last, int delay)
+{
+ int bytes;
+
+ bytes = 0;
+ while (len) {
+ /* XXX should insert delay here */
+ *buf++ = (char)iicbb_readbyte(dev, (len == 1) ? last : 0, delay);
+
+ bytes ++;
+ len --;
+ }
+
+ *read = bytes;
+ return (0);
+}
+
+DRIVER_MODULE(iicbus, iicbb, iicbus_driver, iicbus_devclass, 0, 0);
+
+MODULE_DEPEND(iicbb, iicbus, IICBUS_MINVER, IICBUS_PREFVER, IICBUS_MAXVER);
+MODULE_VERSION(iicbb, IICBB_MODVER);
diff --git a/sys/dev/iicbus/iicbb_if.m b/sys/dev/iicbus/iicbb_if.m
new file mode 100644
index 000000000000..7d10fe748b22
--- /dev/null
+++ b/sys/dev/iicbus/iicbb_if.m
@@ -0,0 +1,82 @@
+#-
+# Copyright (c) 1998 Nicolas Souchu
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# $FreeBSD$
+#
+
+#include <sys/bus.h>
+
+INTERFACE iicbb;
+
+#
+# iicbus callback
+#
+METHOD int callback {
+ device_t dev;
+ int index;
+ caddr_t data;
+};
+
+#
+# Set I2C bus data line
+#
+METHOD void setsda {
+ device_t dev;
+ int val;
+};
+
+#
+# Set I2C bus clock line
+#
+METHOD void setscl {
+ device_t dev;
+ int val;
+};
+
+#
+# Get I2C bus data line
+#
+#
+METHOD int getsda {
+ device_t dev;
+};
+
+#
+# Get I2C bus clock line
+#
+#
+METHOD int getscl {
+ device_t dev;
+};
+
+#
+# Reset interface
+#
+METHOD int reset {
+ device_t dev;
+ u_char speed;
+ u_char addr;
+ u_char *oldaddr;
+};
diff --git a/sys/dev/iicbus/iicbus.c b/sys/dev/iicbus/iicbus.c
new file mode 100644
index 000000000000..64c4e8f88e8b
--- /dev/null
+++ b/sys/dev/iicbus/iicbus.c
@@ -0,0 +1,272 @@
+/*-
+ * Copyright (c) 1998, 2001 Nicolas Souchu
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * Autoconfiguration and support routines for the Philips serial I2C bus
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/malloc.h>
+#include <sys/module.h>
+#include <sys/mutex.h>
+#include <sys/bus.h>
+
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+
+#include "iicbus_if.h"
+
+/* See comments below for why auto-scanning is a bad idea. */
+#define SCAN_IICBUS 0
+
+static int
+iicbus_probe(device_t dev)
+{
+
+ device_set_desc(dev, "Philips I2C bus");
+
+ /* Allow other subclasses to override this driver. */
+ return (BUS_PROBE_GENERIC);
+}
+
+#if SCAN_IICBUS
+static int
+iic_probe_device(device_t dev, u_char addr)
+{
+ int count;
+ char byte;
+
+ if ((addr & 1) == 0) {
+ /* is device writable? */
+ if (!iicbus_start(dev, (u_char)addr, 0)) {
+ iicbus_stop(dev);
+ return (1);
+ }
+ } else {
+ /* is device readable? */
+ if (!iicbus_block_read(dev, (u_char)addr, &byte, 1, &count))
+ return (1);
+ }
+
+ return (0);
+}
+#endif
+
+/*
+ * We add all the devices which we know about.
+ * The generic attach routine will attach them if they are alive.
+ */
+static int
+iicbus_attach(device_t dev)
+{
+#if SCAN_IICBUS
+ unsigned char addr;
+#endif
+ struct iicbus_softc *sc = IICBUS_SOFTC(dev);
+
+ sc->dev = dev;
+ mtx_init(&sc->lock, "iicbus", NULL, MTX_DEF);
+ iicbus_reset(dev, IIC_FASTEST, 0, NULL);
+
+ /* device probing is meaningless since the bus is supposed to be
+ * hot-plug. Moreover, some I2C chips do not appreciate random
+ * accesses like stop after start to fast, reads for less than
+ * x bytes...
+ */
+#if SCAN_IICBUS
+ printf("Probing for devices on iicbus%d:", device_get_unit(dev));
+
+ /* probe any devices */
+ for (addr = 16; addr < 240; addr++) {
+ if (iic_probe_device(dev, (u_char)addr)) {
+ printf(" <%x>", addr);
+ }
+ }
+ printf("\n");
+#endif
+ bus_generic_probe(dev);
+ bus_enumerate_hinted_children(dev);
+ bus_generic_attach(dev);
+ return (0);
+}
+
+static int
+iicbus_detach(device_t dev)
+{
+ struct iicbus_softc *sc = IICBUS_SOFTC(dev);
+
+ iicbus_reset(dev, IIC_FASTEST, 0, NULL);
+ bus_generic_detach(dev);
+ mtx_destroy(&sc->lock);
+ return (0);
+}
+
+static int
+iicbus_print_child(device_t dev, device_t child)
+{
+ struct iicbus_ivar *devi = IICBUS_IVAR(child);
+ int retval = 0;
+
+ retval += bus_print_child_header(dev, child);
+ if (devi->addr != 0)
+ retval += printf(" at addr %#x", devi->addr);
+ retval += bus_print_child_footer(dev, child);
+
+ return (retval);
+}
+
+static void
+iicbus_probe_nomatch(device_t bus, device_t child)
+{
+ struct iicbus_ivar *devi = IICBUS_IVAR(child);
+
+ device_printf(bus, "<unknown card>");
+ printf(" at addr %#x\n", devi->addr);
+ return;
+}
+
+static int
+iicbus_child_location_str(device_t bus, device_t child, char *buf,
+ size_t buflen)
+{
+ struct iicbus_ivar *devi = IICBUS_IVAR(child);
+
+ snprintf(buf, buflen, "addr=%#x", devi->addr);
+ return (0);
+}
+
+static int
+iicbus_child_pnpinfo_str(device_t bus, device_t child, char *buf,
+ size_t buflen)
+{
+ *buf = '\0';
+ return (0);
+}
+
+static int
+iicbus_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
+{
+ struct iicbus_ivar *devi = IICBUS_IVAR(child);
+
+ switch (which) {
+ default:
+ return (EINVAL);
+ case IICBUS_IVAR_ADDR:
+ *(uint32_t *)result = devi->addr;
+ break;
+ }
+ return (0);
+}
+
+static device_t
+iicbus_add_child(device_t dev, int order, const char *name, int unit)
+{
+ device_t child;
+ struct iicbus_ivar *devi;
+
+ child = device_add_child_ordered(dev, order, name, unit);
+ if (child == NULL)
+ return (child);
+ devi = malloc(sizeof(struct iicbus_ivar), M_DEVBUF, M_NOWAIT | M_ZERO);
+ if (devi == NULL) {
+ device_delete_child(dev, child);
+ return (0);
+ }
+ device_set_ivars(child, devi);
+ return (child);
+}
+
+static void
+iicbus_hinted_child(device_t bus, const char *dname, int dunit)
+{
+ device_t child;
+ struct iicbus_ivar *devi;
+
+ child = BUS_ADD_CHILD(bus, 0, dname, dunit);
+ devi = IICBUS_IVAR(child);
+ resource_int_value(dname, dunit, "addr", &devi->addr);
+}
+
+int
+iicbus_generic_intr(device_t dev, int event, char *buf)
+{
+
+ return (0);
+}
+
+int
+iicbus_null_callback(device_t dev, int index, caddr_t data)
+{
+
+ return (0);
+}
+
+int
+iicbus_null_repeated_start(device_t dev, u_char addr)
+{
+
+ return (IIC_ENOTSUPP);
+}
+
+static device_method_t iicbus_methods[] = {
+ /* device interface */
+ DEVMETHOD(device_probe, iicbus_probe),
+ DEVMETHOD(device_attach, iicbus_attach),
+ DEVMETHOD(device_detach, iicbus_detach),
+
+ /* bus interface */
+ DEVMETHOD(bus_add_child, iicbus_add_child),
+ DEVMETHOD(bus_driver_added, bus_generic_driver_added),
+ DEVMETHOD(bus_print_child, iicbus_print_child),
+ DEVMETHOD(bus_probe_nomatch, iicbus_probe_nomatch),
+ DEVMETHOD(bus_read_ivar, iicbus_read_ivar),
+ DEVMETHOD(bus_child_pnpinfo_str, iicbus_child_pnpinfo_str),
+ DEVMETHOD(bus_child_location_str, iicbus_child_location_str),
+ DEVMETHOD(bus_hinted_child, iicbus_hinted_child),
+
+ /* iicbus interface */
+ DEVMETHOD(iicbus_transfer, iicbus_transfer),
+
+ { 0, 0 }
+};
+
+driver_t iicbus_driver = {
+ "iicbus",
+ iicbus_methods,
+ sizeof(struct iicbus_softc),
+};
+
+devclass_t iicbus_devclass;
+
+MODULE_VERSION(iicbus, IICBUS_MODVER);
+DRIVER_MODULE(iicbus, iichb, iicbus_driver, iicbus_devclass, 0, 0);
+
diff --git a/sys/dev/iicbus/iicbus.h b/sys/dev/iicbus/iicbus.h
new file mode 100644
index 000000000000..0698d5c17b4a
--- /dev/null
+++ b/sys/dev/iicbus/iicbus.h
@@ -0,0 +1,70 @@
+/*-
+ * Copyright (c) 1998 Nicolas Souchu
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ *
+ */
+#ifndef __IICBUS_H
+#define __IICBUS_H
+
+#include <sys/_lock.h>
+#include <sys/_mutex.h>
+
+#define IICBUS_IVAR(d) (struct iicbus_ivar *) device_get_ivars(d)
+#define IICBUS_SOFTC(d) (struct iicbus_softc *) device_get_softc(d)
+
+struct iicbus_softc
+{
+ device_t dev; /* Myself */
+ device_t owner; /* iicbus owner device structure */
+ u_char started; /* address of the 'started' slave
+ * 0 if no start condition succeeded */
+ struct mtx lock;
+};
+
+struct iicbus_ivar
+{
+ uint32_t addr;
+};
+
+enum {
+ IICBUS_IVAR_ADDR /* Address or base address */
+};
+
+#define IICBUS_ACCESSOR(A, B, T) \
+ __BUS_ACCESSOR(iicbus, A, IICBUS, B, T)
+
+IICBUS_ACCESSOR(addr, ADDR, uint32_t)
+
+#define IICBUS_LOCK(sc) mtx_lock(&(sc)->lock)
+#define IICBUS_UNLOCK(sc) mtx_unlock(&(sc)->lock)
+#define IICBUS_ASSERT_LOCKED(sc) mtx_assert(&(sc)->lock, MA_OWNED)
+
+extern int iicbus_generic_intr(device_t dev, int event, char *buf);
+
+extern driver_t iicbus_driver;
+extern devclass_t iicbus_devclass;
+
+#endif
diff --git a/sys/dev/iicbus/iicbus_if.m b/sys/dev/iicbus/iicbus_if.m
new file mode 100644
index 000000000000..c57fac584216
--- /dev/null
+++ b/sys/dev/iicbus/iicbus_if.m
@@ -0,0 +1,117 @@
+#-
+# Copyright (c) 1998 Nicolas Souchu
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+# SUCH DAMAGE.
+#
+# $FreeBSD$
+#
+
+#include <sys/bus.h>
+#include <dev/iicbus/iic.h>
+
+INTERFACE iicbus;
+
+#
+# Interpret interrupt
+#
+METHOD int intr {
+ device_t dev;
+ int event;
+ char *buf;
+};
+
+#
+# iicbus callback
+#
+METHOD int callback {
+ device_t dev;
+ int index;
+ caddr_t data;
+};
+
+#
+# Send REPEATED_START condition
+#
+METHOD int repeated_start {
+ device_t dev;
+ u_char slave;
+ int timeout;
+};
+
+#
+# Send START condition
+#
+METHOD int start {
+ device_t dev;
+ u_char slave;
+ int timeout;
+};
+
+#
+# Send STOP condition
+#
+METHOD int stop {
+ device_t dev;
+};
+
+#
+# Read from I2C bus
+#
+METHOD int read {
+ device_t dev;
+ char *buf;
+ int len;
+ int *bytes;
+ int last;
+ int delay;
+};
+
+#
+# Write to the I2C bus
+#
+METHOD int write {
+ device_t dev;
+ const char *buf;
+ int len;
+ int *bytes;
+ int timeout;
+};
+
+#
+# Reset I2C bus
+#
+METHOD int reset {
+ device_t dev;
+ u_char speed;
+ u_char addr;
+ u_char *oldaddr;
+};
+
+#
+# Generalized Read/Write interface
+#
+METHOD int transfer {
+ device_t dev;
+ struct iic_msg *msgs;
+ uint32_t nmsgs;
+};
diff --git a/sys/dev/iicbus/iiconf.c b/sys/dev/iicbus/iiconf.c
new file mode 100644
index 000000000000..1610b351e745
--- /dev/null
+++ b/sys/dev/iicbus/iiconf.c
@@ -0,0 +1,386 @@
+/*-
+ * Copyright (c) 1998 Nicolas Souchu
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/lock.h>
+#include <sys/malloc.h>
+#include <sys/module.h>
+#include <sys/mutex.h>
+#include <sys/bus.h>
+
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+#include "iicbus_if.h"
+
+/*
+ * iicbus_intr()
+ */
+void
+iicbus_intr(device_t bus, int event, char *buf)
+{
+ struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
+
+ /* call owner's intr routine */
+ if (sc->owner)
+ IICBUS_INTR(sc->owner, event, buf);
+
+ return;
+}
+
+static int
+iicbus_poll(struct iicbus_softc *sc, int how)
+{
+ int error;
+
+ IICBUS_ASSERT_LOCKED(sc);
+ switch (how) {
+ case IIC_WAIT | IIC_INTR:
+ error = mtx_sleep(sc, &sc->lock, IICPRI|PCATCH, "iicreq", 0);
+ break;
+
+ case IIC_WAIT | IIC_NOINTR:
+ error = mtx_sleep(sc, &sc->lock, IICPRI, "iicreq", 0);
+ break;
+
+ default:
+ return (EWOULDBLOCK);
+ break;
+ }
+
+ return (error);
+}
+
+/*
+ * iicbus_request_bus()
+ *
+ * Allocate the device to perform transfers.
+ *
+ * how : IIC_WAIT or IIC_DONTWAIT
+ */
+int
+iicbus_request_bus(device_t bus, device_t dev, int how)
+{
+ struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
+ int error = 0;
+
+ /* first, ask the underlying layers if the request is ok */
+ IICBUS_LOCK(sc);
+ do {
+ error = IICBUS_CALLBACK(device_get_parent(bus),
+ IIC_REQUEST_BUS, (caddr_t)&how);
+ if (error)
+ error = iicbus_poll(sc, how);
+ } while (error == EWOULDBLOCK);
+
+ while (!error) {
+ if (sc->owner && sc->owner != dev) {
+
+ error = iicbus_poll(sc, how);
+ } else {
+ sc->owner = dev;
+
+ IICBUS_UNLOCK(sc);
+ return (0);
+ }
+
+ /* free any allocated resource */
+ if (error)
+ IICBUS_CALLBACK(device_get_parent(bus), IIC_RELEASE_BUS,
+ (caddr_t)&how);
+ }
+ IICBUS_UNLOCK(sc);
+
+ return (error);
+}
+
+/*
+ * iicbus_release_bus()
+ *
+ * Release the device allocated with iicbus_request_dev()
+ */
+int
+iicbus_release_bus(device_t bus, device_t dev)
+{
+ struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
+ int error;
+
+ /* first, ask the underlying layers if the release is ok */
+ error = IICBUS_CALLBACK(device_get_parent(bus), IIC_RELEASE_BUS, NULL);
+
+ if (error)
+ return (error);
+
+ IICBUS_LOCK(sc);
+
+ if (sc->owner != dev) {
+ IICBUS_UNLOCK(sc);
+ return (EACCES);
+ }
+
+ sc->owner = NULL;
+
+ /* wakeup waiting processes */
+ wakeup(sc);
+ IICBUS_UNLOCK(sc);
+
+ return (0);
+}
+
+/*
+ * iicbus_started()
+ *
+ * Test if the iicbus is started by the controller
+ */
+int
+iicbus_started(device_t bus)
+{
+ struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
+
+ return (sc->started);
+}
+
+/*
+ * iicbus_start()
+ *
+ * Send start condition to the slave addressed by 'slave'
+ */
+int
+iicbus_start(device_t bus, u_char slave, int timeout)
+{
+ struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
+ int error = 0;
+
+ if (sc->started)
+ return (EINVAL); /* bus already started */
+
+ if (!(error = IICBUS_START(device_get_parent(bus), slave, timeout)))
+ sc->started = slave;
+ else
+ sc->started = 0;
+
+ return (error);
+}
+
+/*
+ * iicbus_repeated_start()
+ *
+ * Send start condition to the slave addressed by 'slave'
+ */
+int
+iicbus_repeated_start(device_t bus, u_char slave, int timeout)
+{
+ struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
+ int error = 0;
+
+ if (!sc->started)
+ return (EINVAL); /* bus should have been already started */
+
+ if (!(error = IICBUS_REPEATED_START(device_get_parent(bus), slave, timeout)))
+ sc->started = slave;
+ else
+ sc->started = 0;
+
+ return (error);
+}
+
+/*
+ * iicbus_stop()
+ *
+ * Send stop condition to the bus
+ */
+int
+iicbus_stop(device_t bus)
+{
+ struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
+ int error = 0;
+
+ if (!sc->started)
+ return (EINVAL); /* bus not started */
+
+ error = IICBUS_STOP(device_get_parent(bus));
+
+ /* refuse any further access */
+ sc->started = 0;
+
+ return (error);
+}
+
+/*
+ * iicbus_write()
+ *
+ * Write a block of data to the slave previously started by
+ * iicbus_start() call
+ */
+int
+iicbus_write(device_t bus, const char *buf, int len, int *sent, int timeout)
+{
+ struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
+
+ /* a slave must have been started with the appropriate address */
+ if (!sc->started || (sc->started & LSB))
+ return (EINVAL);
+
+ return (IICBUS_WRITE(device_get_parent(bus), buf, len, sent, timeout));
+}
+
+/*
+ * iicbus_read()
+ *
+ * Read a block of data from the slave previously started by
+ * iicbus_read() call
+ */
+int
+iicbus_read(device_t bus, char *buf, int len, int *read, int last, int delay)
+{
+ struct iicbus_softc *sc = (struct iicbus_softc *)device_get_softc(bus);
+
+ /* a slave must have been started with the appropriate address */
+ if (!sc->started || !(sc->started & LSB))
+ return (EINVAL);
+
+ return (IICBUS_READ(device_get_parent(bus), buf, len, read, last, delay));
+}
+
+/*
+ * iicbus_write_byte()
+ *
+ * Write a byte to the slave previously started by iicbus_start() call
+ */
+int
+iicbus_write_byte(device_t bus, char byte, int timeout)
+{
+ char data = byte;
+ int sent;
+
+ return (iicbus_write(bus, &data, 1, &sent, timeout));
+}
+
+/*
+ * iicbus_read_byte()
+ *
+ * Read a byte from the slave previously started by iicbus_start() call
+ */
+int
+iicbus_read_byte(device_t bus, char *byte, int timeout)
+{
+ int read;
+
+ return (iicbus_read(bus, byte, 1, &read, IIC_LAST_READ, timeout));
+}
+
+/*
+ * iicbus_block_write()
+ *
+ * Write a block of data to slave ; start/stop protocol managed
+ */
+int
+iicbus_block_write(device_t bus, u_char slave, char *buf, int len, int *sent)
+{
+ u_char addr = slave & ~LSB;
+ int error;
+
+ if ((error = iicbus_start(bus, addr, 0)))
+ return (error);
+
+ error = iicbus_write(bus, buf, len, sent, 0);
+
+ iicbus_stop(bus);
+
+ return (error);
+}
+
+/*
+ * iicbus_block_read()
+ *
+ * Read a block of data from slave ; start/stop protocol managed
+ */
+int
+iicbus_block_read(device_t bus, u_char slave, char *buf, int len, int *read)
+{
+ u_char addr = slave | LSB;
+ int error;
+
+ if ((error = iicbus_start(bus, addr, 0)))
+ return (error);
+
+ error = iicbus_read(bus, buf, len, read, IIC_LAST_READ, 0);
+
+ iicbus_stop(bus);
+
+ return (error);
+}
+
+/*
+ * iicbus_transfer()
+ *
+ * Do an aribtrary number of transfers on the iicbus. We pass these
+ * raw requests to the bridge driver. If the bridge driver supports
+ * them directly, then it manages all the details. If not, it can use
+ * the helper function iicbus_transfer_gen() which will do the
+ * transfers at a low level.
+ *
+ * Pointers passed in as part of iic_msg must be kernel pointers.
+ * Callers that have user addresses to manage must do so on their own.
+ */
+int
+iicbus_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs)
+{
+ return (IICBUS_TRANSFER(device_get_parent(bus), msgs, nmsgs));
+}
+
+/*
+ * Generic version of iicbus_transfer that calls the appropriate
+ * routines to accomplish this. See note above about acceptable
+ * buffer addresses.
+ */
+int
+iicbus_transfer_gen(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
+{
+ int i, error, lenread, lenwrote, nkid;
+ device_t *children, bus;
+
+ if ((error = device_get_children(dev, &children, &nkid)) != 0)
+ return (error);
+ if (nkid != 1) {
+ free(children, M_TEMP);
+ return (EIO);
+ }
+ bus = children[0];
+ free(children, M_TEMP);
+ for (i = 0, error = 0; i < nmsgs && error == 0; i++) {
+ if (msgs[i].flags & IIC_M_RD)
+ error = iicbus_block_read(bus, msgs[i].slave,
+ msgs[i].buf, msgs[i].len, &lenread);
+ else
+ error = iicbus_block_write(bus, msgs[i].slave,
+ msgs[i].buf, msgs[i].len, &lenwrote);
+ }
+ return (error);
+}
diff --git a/sys/dev/iicbus/iiconf.h b/sys/dev/iicbus/iiconf.h
new file mode 100644
index 000000000000..092ba8de065e
--- /dev/null
+++ b/sys/dev/iicbus/iiconf.h
@@ -0,0 +1,140 @@
+/*-
+ * Copyright (c) 1998, 2001 Nicolas Souchu
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+#ifndef __IICONF_H
+#define __IICONF_H
+
+#include <sys/queue.h>
+#include <dev/iicbus/iic.h>
+
+
+#define IICPRI (PZERO+8) /* XXX sleep/wakeup queue priority */
+
+#define LSB 0x1
+
+/*
+ * How tsleep() is called in iic_request_bus().
+ */
+#define IIC_DONTWAIT 0
+#define IIC_NOINTR 0
+#define IIC_WAIT 0x1
+#define IIC_INTR 0x2
+
+/*
+ * i2c modes
+ */
+#define IIC_MASTER 0x1
+#define IIC_SLAVE 0x2
+#define IIC_POLLED 0x4
+
+/*
+ * i2c speed
+ */
+#define IIC_UNKNOWN 0x0
+#define IIC_SLOW 0x1
+#define IIC_FAST 0x2
+#define IIC_FASTEST 0x3
+
+#define IIC_LAST_READ 0x1
+
+/*
+ * callback index
+ */
+#define IIC_REQUEST_BUS 0x1
+#define IIC_RELEASE_BUS 0x2
+
+/*
+ * interrupt events
+ */
+#define INTR_GENERAL 0x1 /* general call received */
+#define INTR_START 0x2 /* the I2C interface is addressed */
+#define INTR_STOP 0x3 /* stop condition received */
+#define INTR_RECEIVE 0x4 /* character received */
+#define INTR_TRANSMIT 0x5 /* character to transmit */
+#define INTR_ERROR 0x6 /* error */
+#define INTR_NOACK 0x7 /* no ack from master receiver */
+
+/*
+ * adapter layer errors
+ */
+#define IIC_NOERR 0x0 /* no error occured */
+#define IIC_EBUSERR 0x1 /* bus error */
+#define IIC_ENOACK 0x2 /* ack not received until timeout */
+#define IIC_ETIMEOUT 0x3 /* timeout */
+#define IIC_EBUSBSY 0x4 /* bus busy */
+#define IIC_ESTATUS 0x5 /* status error */
+#define IIC_EUNDERFLOW 0x6 /* slave ready for more data */
+#define IIC_EOVERFLOW 0x7 /* too much data */
+#define IIC_ENOTSUPP 0x8 /* request not supported */
+#define IIC_ENOADDR 0x9 /* no address assigned to the interface */
+
+extern int iicbus_request_bus(device_t, device_t, int);
+extern int iicbus_release_bus(device_t, device_t);
+extern device_t iicbus_alloc_bus(device_t);
+
+extern void iicbus_intr(device_t, int, char *);
+
+extern int iicbus_null_repeated_start(device_t, u_char);
+extern int iicbus_null_callback(device_t, int, caddr_t);
+
+#define iicbus_reset(bus,speed,addr,oldaddr) \
+ (IICBUS_RESET(device_get_parent(bus), speed, addr, oldaddr))
+
+/* basic I2C operations */
+extern int iicbus_started(device_t);
+extern int iicbus_start(device_t, u_char, int);
+extern int iicbus_stop(device_t);
+extern int iicbus_repeated_start(device_t, u_char, int);
+extern int iicbus_write(device_t, const char *, int, int *, int);
+extern int iicbus_read(device_t, char *, int, int *, int, int);
+
+/* single byte read/write functions, start/stop not managed */
+extern int iicbus_write_byte(device_t, char, int);
+extern int iicbus_read_byte(device_t, char *, int);
+
+/* Read/write operations with start/stop conditions managed */
+extern int iicbus_block_write(device_t, u_char, char *, int, int *);
+extern int iicbus_block_read(device_t, u_char, char *, int, int *);
+
+/* vectors of iic operations to pass to bridge */
+int iicbus_transfer(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
+int iicbus_transfer_gen(device_t bus, struct iic_msg *msgs, uint32_t nmsgs);
+
+#define IICBUS_MODVER 1
+#define IICBUS_MINVER 1
+#define IICBUS_MAXVER 1
+#define IICBUS_PREFVER IICBUS_MODVER
+
+extern driver_t iicbb_driver;
+extern devclass_t iicbb_devclass;
+
+#define IICBB_MODVER 1
+#define IICBB_MINVER 1
+#define IICBB_MAXVER 1
+#define IICBB_PREFVER IICBB_MODVER
+
+#endif
diff --git a/sys/dev/iicbus/iicsmb.c b/sys/dev/iicbus/iicsmb.c
new file mode 100644
index 000000000000..10229acff75d
--- /dev/null
+++ b/sys/dev/iicbus/iicsmb.c
@@ -0,0 +1,522 @@
+/*-
+ * Copyright (c) 1998, 2001 Nicolas Souchu
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ *
+ */
+
+/*
+ * I2C to SMB bridge
+ *
+ * Example:
+ *
+ * smb bttv
+ * \ /
+ * smbus
+ * / \
+ * iicsmb bti2c
+ * |
+ * iicbus
+ * / | \
+ * iicbb pcf ...
+ * |
+ * lpbb
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/module.h>
+#include <sys/mutex.h>
+#include <sys/systm.h>
+#include <sys/uio.h>
+
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+
+#include <dev/smbus/smbconf.h>
+
+#include "iicbus_if.h"
+#include "smbus_if.h"
+
+struct iicsmb_softc {
+
+#define SMB_WAITING_ADDR 0x0
+#define SMB_WAITING_LOW 0x1
+#define SMB_WAITING_HIGH 0x2
+#define SMB_DONE 0x3
+ int state;
+
+ u_char devaddr; /* slave device address */
+
+ char low; /* low byte received first */
+ char high; /* high byte */
+
+ struct mtx lock;
+ device_t smbus;
+};
+
+static int iicsmb_probe(device_t);
+static int iicsmb_attach(device_t);
+static int iicsmb_detach(device_t);
+static void iicsmb_identify(driver_t *driver, device_t parent);
+
+static int iicsmb_intr(device_t dev, int event, char *buf);
+static int iicsmb_callback(device_t dev, int index, void *data);
+static int iicsmb_quick(device_t dev, u_char slave, int how);
+static int iicsmb_sendb(device_t dev, u_char slave, char byte);
+static int iicsmb_recvb(device_t dev, u_char slave, char *byte);
+static int iicsmb_writeb(device_t dev, u_char slave, char cmd, char byte);
+static int iicsmb_writew(device_t dev, u_char slave, char cmd, short word);
+static int iicsmb_readb(device_t dev, u_char slave, char cmd, char *byte);
+static int iicsmb_readw(device_t dev, u_char slave, char cmd, short *word);
+static int iicsmb_pcall(device_t dev, u_char slave, char cmd, short sdata, short *rdata);
+static int iicsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf);
+static int iicsmb_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf);
+
+static devclass_t iicsmb_devclass;
+
+static device_method_t iicsmb_methods[] = {
+ /* device interface */
+ DEVMETHOD(device_identify, iicsmb_identify),
+ DEVMETHOD(device_probe, iicsmb_probe),
+ DEVMETHOD(device_attach, iicsmb_attach),
+ DEVMETHOD(device_detach, iicsmb_detach),
+
+ /* bus interface */
+ DEVMETHOD(bus_driver_added, bus_generic_driver_added),
+ DEVMETHOD(bus_print_child, bus_generic_print_child),
+
+ /* iicbus interface */
+ DEVMETHOD(iicbus_intr, iicsmb_intr),
+
+ /* smbus interface */
+ DEVMETHOD(smbus_callback, iicsmb_callback),
+ DEVMETHOD(smbus_quick, iicsmb_quick),
+ DEVMETHOD(smbus_sendb, iicsmb_sendb),
+ DEVMETHOD(smbus_recvb, iicsmb_recvb),
+ DEVMETHOD(smbus_writeb, iicsmb_writeb),
+ DEVMETHOD(smbus_writew, iicsmb_writew),
+ DEVMETHOD(smbus_readb, iicsmb_readb),
+ DEVMETHOD(smbus_readw, iicsmb_readw),
+ DEVMETHOD(smbus_pcall, iicsmb_pcall),
+ DEVMETHOD(smbus_bwrite, iicsmb_bwrite),
+ DEVMETHOD(smbus_bread, iicsmb_bread),
+
+ { 0, 0 }
+};
+
+static driver_t iicsmb_driver = {
+ "iicsmb",
+ iicsmb_methods,
+ sizeof(struct iicsmb_softc),
+};
+
+#define IICBUS_TIMEOUT 100 /* us */
+
+static void
+iicsmb_identify(driver_t *driver, device_t parent)
+{
+
+ if (device_find_child(parent, "iicsmb", -1) == NULL)
+ BUS_ADD_CHILD(parent, 0, "iicsmb", -1);
+}
+
+static int
+iicsmb_probe(device_t dev)
+{
+ device_set_desc(dev, "SMBus over I2C bridge");
+ return (BUS_PROBE_NOWILDCARD);
+}
+
+static int
+iicsmb_attach(device_t dev)
+{
+ struct iicsmb_softc *sc = (struct iicsmb_softc *)device_get_softc(dev);
+
+ mtx_init(&sc->lock, "iicsmb", NULL, MTX_DEF);
+
+ sc->smbus = device_add_child(dev, "smbus", -1);
+
+ /* probe and attach the smbus */
+ bus_generic_attach(dev);
+
+ return (0);
+}
+
+static int
+iicsmb_detach(device_t dev)
+{
+ struct iicsmb_softc *sc = (struct iicsmb_softc *)device_get_softc(dev);
+
+ bus_generic_detach(dev);
+ if (sc->smbus) {
+ device_delete_child(dev, sc->smbus);
+ }
+ mtx_destroy(&sc->lock);
+
+ return (0);
+}
+
+/*
+ * iicsmb_intr()
+ *
+ * iicbus interrupt handler
+ */
+static int
+iicsmb_intr(device_t dev, int event, char *buf)
+{
+ struct iicsmb_softc *sc = (struct iicsmb_softc *)device_get_softc(dev);
+
+ mtx_lock(&sc->lock);
+ switch (event) {
+ case INTR_GENERAL:
+ case INTR_START:
+ sc->state = SMB_WAITING_ADDR;
+ break;
+
+ case INTR_STOP:
+ /* call smbus intr handler */
+ smbus_intr(sc->smbus, sc->devaddr,
+ sc->low, sc->high, SMB_ENOERR);
+ break;
+
+ case INTR_RECEIVE:
+ switch (sc->state) {
+ case SMB_DONE:
+ /* XXX too much data, discard */
+ printf("%s: too much data from 0x%x\n", __func__,
+ sc->devaddr & 0xff);
+ goto end;
+
+ case SMB_WAITING_ADDR:
+ sc->devaddr = (u_char)*buf;
+ sc->state = SMB_WAITING_LOW;
+ break;
+
+ case SMB_WAITING_LOW:
+ sc->low = *buf;
+ sc->state = SMB_WAITING_HIGH;
+ break;
+
+ case SMB_WAITING_HIGH:
+ sc->high = *buf;
+ sc->state = SMB_DONE;
+ break;
+ }
+end:
+ break;
+
+ case INTR_TRANSMIT:
+ case INTR_NOACK:
+ break;
+
+ case INTR_ERROR:
+ switch (*buf) {
+ case IIC_EBUSERR:
+ smbus_intr(sc->smbus, sc->devaddr, 0, 0, SMB_EBUSERR);
+ break;
+
+ default:
+ printf("%s unknown error 0x%x!\n", __func__,
+ (int)*buf);
+ break;
+ }
+ break;
+
+ default:
+ panic("%s: unknown event (%d)!", __func__, event);
+ }
+ mtx_unlock(&sc->lock);
+
+ return (0);
+}
+
+static int
+iicsmb_callback(device_t dev, int index, void *data)
+{
+ device_t parent = device_get_parent(dev);
+ int error = 0;
+ int how;
+
+ switch (index) {
+ case SMB_REQUEST_BUS:
+ /* request underlying iicbus */
+ how = *(int *)data;
+ error = iicbus_request_bus(parent, dev, how);
+ break;
+
+ case SMB_RELEASE_BUS:
+ /* release underlying iicbus */
+ error = iicbus_release_bus(parent, dev);
+ break;
+
+ default:
+ error = EINVAL;
+ }
+
+ return (error);
+}
+
+static int
+iicsmb_quick(device_t dev, u_char slave, int how)
+{
+ device_t parent = device_get_parent(dev);
+ int error;
+
+ switch (how) {
+ case SMB_QWRITE:
+ error = iicbus_start(parent, slave & ~LSB, IICBUS_TIMEOUT);
+ break;
+
+ case SMB_QREAD:
+ error = iicbus_start(parent, slave | LSB, IICBUS_TIMEOUT);
+ break;
+
+ default:
+ error = EINVAL;
+ break;
+ }
+
+ if (!error)
+ error = iicbus_stop(parent);
+
+ return (error);
+}
+
+static int
+iicsmb_sendb(device_t dev, u_char slave, char byte)
+{
+ device_t parent = device_get_parent(dev);
+ int error, sent;
+
+ error = iicbus_start(parent, slave & ~LSB, IICBUS_TIMEOUT);
+
+ if (!error) {
+ error = iicbus_write(parent, &byte, 1, &sent, IICBUS_TIMEOUT);
+
+ iicbus_stop(parent);
+ }
+
+ return (error);
+}
+
+static int
+iicsmb_recvb(device_t dev, u_char slave, char *byte)
+{
+ device_t parent = device_get_parent(dev);
+ int error, read;
+
+ error = iicbus_start(parent, slave | LSB, 0);
+
+ if (!error) {
+ error = iicbus_read(parent, byte, 1, &read, IIC_LAST_READ, IICBUS_TIMEOUT);
+
+ iicbus_stop(parent);
+ }
+
+ return (error);
+}
+
+static int
+iicsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
+{
+ device_t parent = device_get_parent(dev);
+ int error, sent;
+
+ error = iicbus_start(parent, slave & ~LSB, 0);
+
+ if (!error) {
+ if (!(error = iicbus_write(parent, &cmd, 1, &sent, IICBUS_TIMEOUT)))
+ error = iicbus_write(parent, &byte, 1, &sent, IICBUS_TIMEOUT);
+
+ iicbus_stop(parent);
+ }
+
+ return (error);
+}
+
+static int
+iicsmb_writew(device_t dev, u_char slave, char cmd, short word)
+{
+ device_t parent = device_get_parent(dev);
+ int error, sent;
+
+ char low = (char)(word & 0xff);
+ char high = (char)((word & 0xff00) >> 8);
+
+ error = iicbus_start(parent, slave & ~LSB, 0);
+
+ if (!error) {
+ if (!(error = iicbus_write(parent, &cmd, 1, &sent, IICBUS_TIMEOUT)))
+ if (!(error = iicbus_write(parent, &low, 1, &sent, IICBUS_TIMEOUT)))
+ error = iicbus_write(parent, &high, 1, &sent, IICBUS_TIMEOUT);
+
+ iicbus_stop(parent);
+ }
+
+ return (error);
+}
+
+static int
+iicsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
+{
+ device_t parent = device_get_parent(dev);
+ int error, sent, read;
+
+ if ((error = iicbus_start(parent, slave & ~LSB, IICBUS_TIMEOUT)))
+ return (error);
+
+ if ((error = iicbus_write(parent, &cmd, 1, &sent, IICBUS_TIMEOUT)))
+ goto error;
+
+ if ((error = iicbus_repeated_start(parent, slave | LSB, IICBUS_TIMEOUT)))
+ goto error;
+
+ if ((error = iicbus_read(parent, byte, 1, &read, IIC_LAST_READ, IICBUS_TIMEOUT)))
+ goto error;
+
+error:
+ iicbus_stop(parent);
+ return (error);
+}
+
+#define BUF2SHORT(low,high) \
+ ((short)(((high) & 0xff) << 8) | (short)((low) & 0xff))
+
+static int
+iicsmb_readw(device_t dev, u_char slave, char cmd, short *word)
+{
+ device_t parent = device_get_parent(dev);
+ int error, sent, read;
+ char buf[2];
+
+ if ((error = iicbus_start(parent, slave & ~LSB, IICBUS_TIMEOUT)))
+ return (error);
+
+ if ((error = iicbus_write(parent, &cmd, 1, &sent, IICBUS_TIMEOUT)))
+ goto error;
+
+ if ((error = iicbus_repeated_start(parent, slave | LSB, IICBUS_TIMEOUT)))
+ goto error;
+
+ if ((error = iicbus_read(parent, buf, 2, &read, IIC_LAST_READ, IICBUS_TIMEOUT)))
+ goto error;
+
+ /* first, receive low, then high byte */
+ *word = BUF2SHORT(buf[0], buf[1]);
+
+error:
+ iicbus_stop(parent);
+ return (error);
+}
+
+static int
+iicsmb_pcall(device_t dev, u_char slave, char cmd, short sdata, short *rdata)
+{
+ device_t parent = device_get_parent(dev);
+ int error, sent, read;
+ char buf[2];
+
+ if ((error = iicbus_start(parent, slave & ~LSB, IICBUS_TIMEOUT)))
+ return (error);
+
+ if ((error = iicbus_write(parent, &cmd, 1, &sent, IICBUS_TIMEOUT)))
+ goto error;
+
+ /* first, send low, then high byte */
+ buf[0] = (char)(sdata & 0xff);
+ buf[1] = (char)((sdata & 0xff00) >> 8);
+
+ if ((error = iicbus_write(parent, buf, 2, &sent, IICBUS_TIMEOUT)))
+ goto error;
+
+ if ((error = iicbus_repeated_start(parent, slave | LSB, IICBUS_TIMEOUT)))
+ goto error;
+
+ if ((error = iicbus_read(parent, buf, 2, &read, IIC_LAST_READ, IICBUS_TIMEOUT)))
+ goto error;
+
+ /* first, receive low, then high byte */
+ *rdata = BUF2SHORT(buf[0], buf[1]);
+
+error:
+ iicbus_stop(parent);
+ return (error);
+}
+
+static int
+iicsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
+{
+ device_t parent = device_get_parent(dev);
+ int error, sent;
+
+ if ((error = iicbus_start(parent, slave & ~LSB, IICBUS_TIMEOUT)))
+ goto error;
+
+ if ((error = iicbus_write(parent, &cmd, 1, &sent, IICBUS_TIMEOUT)))
+ goto error;
+
+ if ((error = iicbus_write(parent, buf, (int)count, &sent, IICBUS_TIMEOUT)))
+ goto error;
+
+ if ((error = iicbus_stop(parent)))
+ goto error;
+
+error:
+ return (error);
+}
+
+static int
+iicsmb_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
+{
+ device_t parent = device_get_parent(dev);
+ int error, sent, read;
+
+ if ((error = iicbus_start(parent, slave & ~LSB, IICBUS_TIMEOUT)))
+ return (error);
+
+ if ((error = iicbus_write(parent, &cmd, 1, &sent, IICBUS_TIMEOUT)))
+ goto error;
+
+ if ((error = iicbus_repeated_start(parent, slave | LSB, IICBUS_TIMEOUT)))
+ goto error;
+
+ if ((error = iicbus_read(parent, buf, (int)*count, &read,
+ IIC_LAST_READ, IICBUS_TIMEOUT)))
+ goto error;
+ *count = read;
+
+error:
+ iicbus_stop(parent);
+ return (error);
+}
+
+DRIVER_MODULE(iicsmb, iicbus, iicsmb_driver, iicsmb_devclass, 0, 0);
+DRIVER_MODULE(smbus, iicsmb, smbus_driver, smbus_devclass, 0, 0);
+MODULE_DEPEND(iicsmb, iicbus, IICBUS_MINVER, IICBUS_PREFVER, IICBUS_MAXVER);
+MODULE_DEPEND(iicsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
+MODULE_VERSION(iicsmb, 1);