diff options
Diffstat (limited to 'test/CodeGen/ARM/vget_lane.ll')
| -rw-r--r-- | test/CodeGen/ARM/vget_lane.ll | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/test/CodeGen/ARM/vget_lane.ll b/test/CodeGen/ARM/vget_lane.ll index c9ce3b7450b6..2518ee2278cc 100644 --- a/test/CodeGen/ARM/vget_lane.ll +++ b/test/CodeGen/ARM/vget_lane.ll @@ -3,7 +3,7 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32- target triple = "thumbv7-elf" define i32 @vget_lanes8(<8 x i8>* %A) nounwind { -;CHECK: vget_lanes8: +;CHECK-LABEL: vget_lanes8: ;CHECK: vmov.s8 %tmp1 = load <8 x i8>* %A %tmp2 = extractelement <8 x i8> %tmp1, i32 1 @@ -12,7 +12,7 @@ define i32 @vget_lanes8(<8 x i8>* %A) nounwind { } define i32 @vget_lanes16(<4 x i16>* %A) nounwind { -;CHECK: vget_lanes16: +;CHECK-LABEL: vget_lanes16: ;CHECK: vmov.s16 %tmp1 = load <4 x i16>* %A %tmp2 = extractelement <4 x i16> %tmp1, i32 1 @@ -21,7 +21,7 @@ define i32 @vget_lanes16(<4 x i16>* %A) nounwind { } define i32 @vget_laneu8(<8 x i8>* %A) nounwind { -;CHECK: vget_laneu8: +;CHECK-LABEL: vget_laneu8: ;CHECK: vmov.u8 %tmp1 = load <8 x i8>* %A %tmp2 = extractelement <8 x i8> %tmp1, i32 1 @@ -30,7 +30,7 @@ define i32 @vget_laneu8(<8 x i8>* %A) nounwind { } define i32 @vget_laneu16(<4 x i16>* %A) nounwind { -;CHECK: vget_laneu16: +;CHECK-LABEL: vget_laneu16: ;CHECK: vmov.u16 %tmp1 = load <4 x i16>* %A %tmp2 = extractelement <4 x i16> %tmp1, i32 1 @@ -40,7 +40,7 @@ define i32 @vget_laneu16(<4 x i16>* %A) nounwind { ; Do a vector add to keep the extraction from being done directly from memory. define i32 @vget_lanei32(<2 x i32>* %A) nounwind { -;CHECK: vget_lanei32: +;CHECK-LABEL: vget_lanei32: ;CHECK: vmov.32 %tmp1 = load <2 x i32>* %A %tmp2 = add <2 x i32> %tmp1, %tmp1 @@ -49,7 +49,7 @@ define i32 @vget_lanei32(<2 x i32>* %A) nounwind { } define i32 @vgetQ_lanes8(<16 x i8>* %A) nounwind { -;CHECK: vgetQ_lanes8: +;CHECK-LABEL: vgetQ_lanes8: ;CHECK: vmov.s8 %tmp1 = load <16 x i8>* %A %tmp2 = extractelement <16 x i8> %tmp1, i32 1 @@ -58,7 +58,7 @@ define i32 @vgetQ_lanes8(<16 x i8>* %A) nounwind { } define i32 @vgetQ_lanes16(<8 x i16>* %A) nounwind { -;CHECK: vgetQ_lanes16: +;CHECK-LABEL: vgetQ_lanes16: ;CHECK: vmov.s16 %tmp1 = load <8 x i16>* %A %tmp2 = extractelement <8 x i16> %tmp1, i32 1 @@ -67,7 +67,7 @@ define i32 @vgetQ_lanes16(<8 x i16>* %A) nounwind { } define i32 @vgetQ_laneu8(<16 x i8>* %A) nounwind { -;CHECK: vgetQ_laneu8: +;CHECK-LABEL: vgetQ_laneu8: ;CHECK: vmov.u8 %tmp1 = load <16 x i8>* %A %tmp2 = extractelement <16 x i8> %tmp1, i32 1 @@ -76,7 +76,7 @@ define i32 @vgetQ_laneu8(<16 x i8>* %A) nounwind { } define i32 @vgetQ_laneu16(<8 x i16>* %A) nounwind { -;CHECK: vgetQ_laneu16: +;CHECK-LABEL: vgetQ_laneu16: ;CHECK: vmov.u16 %tmp1 = load <8 x i16>* %A %tmp2 = extractelement <8 x i16> %tmp1, i32 1 @@ -86,7 +86,7 @@ define i32 @vgetQ_laneu16(<8 x i16>* %A) nounwind { ; Do a vector add to keep the extraction from being done directly from memory. define i32 @vgetQ_lanei32(<4 x i32>* %A) nounwind { -;CHECK: vgetQ_lanei32: +;CHECK-LABEL: vgetQ_lanei32: ;CHECK: vmov.32 %tmp1 = load <4 x i32>* %A %tmp2 = add <4 x i32> %tmp1, %tmp1 @@ -159,7 +159,7 @@ return: ; preds = %entry } define <8 x i8> @vset_lane8(<8 x i8>* %A, i8 %B) nounwind { -;CHECK: vset_lane8: +;CHECK-LABEL: vset_lane8: ;CHECK: vmov.8 %tmp1 = load <8 x i8>* %A %tmp2 = insertelement <8 x i8> %tmp1, i8 %B, i32 1 @@ -167,7 +167,7 @@ define <8 x i8> @vset_lane8(<8 x i8>* %A, i8 %B) nounwind { } define <4 x i16> @vset_lane16(<4 x i16>* %A, i16 %B) nounwind { -;CHECK: vset_lane16: +;CHECK-LABEL: vset_lane16: ;CHECK: vmov.16 %tmp1 = load <4 x i16>* %A %tmp2 = insertelement <4 x i16> %tmp1, i16 %B, i32 1 @@ -175,7 +175,7 @@ define <4 x i16> @vset_lane16(<4 x i16>* %A, i16 %B) nounwind { } define <2 x i32> @vset_lane32(<2 x i32>* %A, i32 %B) nounwind { -;CHECK: vset_lane32: +;CHECK-LABEL: vset_lane32: ;CHECK: vmov.32 %tmp1 = load <2 x i32>* %A %tmp2 = insertelement <2 x i32> %tmp1, i32 %B, i32 1 @@ -183,7 +183,7 @@ define <2 x i32> @vset_lane32(<2 x i32>* %A, i32 %B) nounwind { } define <16 x i8> @vsetQ_lane8(<16 x i8>* %A, i8 %B) nounwind { -;CHECK: vsetQ_lane8: +;CHECK-LABEL: vsetQ_lane8: ;CHECK: vmov.8 %tmp1 = load <16 x i8>* %A %tmp2 = insertelement <16 x i8> %tmp1, i8 %B, i32 1 @@ -191,7 +191,7 @@ define <16 x i8> @vsetQ_lane8(<16 x i8>* %A, i8 %B) nounwind { } define <8 x i16> @vsetQ_lane16(<8 x i16>* %A, i16 %B) nounwind { -;CHECK: vsetQ_lane16: +;CHECK-LABEL: vsetQ_lane16: ;CHECK: vmov.16 %tmp1 = load <8 x i16>* %A %tmp2 = insertelement <8 x i16> %tmp1, i16 %B, i32 1 @@ -199,7 +199,7 @@ define <8 x i16> @vsetQ_lane16(<8 x i16>* %A, i16 %B) nounwind { } define <4 x i32> @vsetQ_lane32(<4 x i32>* %A, i32 %B) nounwind { -;CHECK: vsetQ_lane32: +;CHECK-LABEL: vsetQ_lane32: ;CHECK: vmov.32 d{{.*}}[1], r1 %tmp1 = load <4 x i32>* %A %tmp2 = insertelement <4 x i32> %tmp1, i32 %B, i32 1 @@ -207,7 +207,7 @@ define <4 x i32> @vsetQ_lane32(<4 x i32>* %A, i32 %B) nounwind { } define arm_aapcs_vfpcc <2 x float> @test_vset_lanef32(float %arg0_float32_t, <2 x float> %arg1_float32x2_t) nounwind { -;CHECK: test_vset_lanef32: +;CHECK-LABEL: test_vset_lanef32: ;CHECK: vmov.f32 s3, s0 ;CHECK: vmov.f64 d0, d1 entry: |