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-rw-r--r--test/CodeGen/Hexagon/bit-validate-reg.ll5
1 files changed, 4 insertions, 1 deletions
diff --git a/test/CodeGen/Hexagon/bit-validate-reg.ll b/test/CodeGen/Hexagon/bit-validate-reg.ll
index 16d4a5e4484d..42eed97786cd 100644
--- a/test/CodeGen/Hexagon/bit-validate-reg.ll
+++ b/test/CodeGen/Hexagon/bit-validate-reg.ll
@@ -1,10 +1,13 @@
-; RUN: llc -march=hexagon < %s | FileCheck %s
+; RUN: llc -march=hexagon -hexbit-extract=0 < %s | FileCheck %s
; Make sure we don't generate zxtb to transfer a predicate register into
; a general purpose register.
; CHECK: r0 = p0
; CHECK-NOT: zxtb(p
+; CHECK-NOT: and(p
+; CHECK-NOT: extract(p
+; CHECK-NOT: extractu(p
target triple = "hexagon"