diff options
Diffstat (limited to 'test/CodeGen/MIR')
187 files changed, 1439 insertions, 429 deletions
diff --git a/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir b/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir index cf7572ecad37..9a6f8dbafa00 100644 --- a/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir +++ b/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the .cfi_def_cfa operands # correctly. diff --git a/test/CodeGen/MIR/AArch64/expected-target-flag-name.mir b/test/CodeGen/MIR/AArch64/expected-target-flag-name.mir index b7bac2682c70..f94f09a485d9 100644 --- a/test/CodeGen/MIR/AArch64/expected-target-flag-name.mir +++ b/test/CodeGen/MIR/AArch64/expected-target-flag-name.mir @@ -1,4 +1,4 @@ -# RUN: not llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -mtriple=aarch64-none-linux-gnu -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir b/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir new file mode 100644 index 000000000000..b3d8c5c3d361 --- /dev/null +++ b/test/CodeGen/MIR/AArch64/generic-virtual-registers-error.mir @@ -0,0 +1,43 @@ +# RUN: not llc -mtriple=aarch64-apple-ios -run-pass none -o - %s 2> %t.log \ +# RUN: | FileCheck %s --check-prefix=CHECK +# RUN: FileCheck %s -input-file=%t.log --check-prefix=ERR +# RUN: rm -f %t.log +# REQUIRES: global-isel +# This test ensures that the MIR parser errors out when +# generic virtual register definitions are not correct. + +--- | + define void @bar() { ret void } + + define void @baz() { ret void } +... + +--- +name: bar +isSSA: true +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: gpr } +registers: + - { id: 0, class: gpr } +body: | + bb.0: + liveins: %w0 + ; ERR: generic virtual registers must have a size + ; ERR-NEXT: %0 + %0 = G_ADD i32 %w0, %w0 +... + +--- +name: baz +isSSA: true +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: _ } +registers: + - { id: 0, class: _ } +body: | + bb.0: + liveins: %w0 + ; ERR: generic virtual registers must have a size + ; ERR-NEXT: %0 + %0 = G_ADD i32 %w0, %w0 +... diff --git a/test/CodeGen/MIR/AArch64/invalid-target-flag-name.mir b/test/CodeGen/MIR/AArch64/invalid-target-flag-name.mir index d4145b8961df..e2a257535314 100644 --- a/test/CodeGen/MIR/AArch64/invalid-target-flag-name.mir +++ b/test/CodeGen/MIR/AArch64/invalid-target-flag-name.mir @@ -1,4 +1,4 @@ -# RUN: not llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -mtriple=aarch64-none-linux-gnu -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/AArch64/machine-dead-copy.mir b/test/CodeGen/MIR/AArch64/machine-dead-copy.mir new file mode 100644 index 000000000000..90f2f3c09993 --- /dev/null +++ b/test/CodeGen/MIR/AArch64/machine-dead-copy.mir @@ -0,0 +1,71 @@ + +# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s + +--- | + define i32 @copyprop1(i32 %a, i32 %b) { ret i32 %a } + define i32 @copyprop2(i32 %a, i32 %b) { ret i32 %a } + define i32 @copyprop3(i32 %a, i32 %b) { ret i32 %a } + define i32 @copyprop4(i32 %a, i32 %b) { ret i32 %a } + declare i32 @foo(i32) +... +--- +# The first copy is dead copy which is not used. +# CHECK-LABEL: name: copyprop1 +# CHECK: bb.0: +# CHECK-NOT: %w20 = COPY +name: copyprop1 +allVRegsAllocated: true +body: | + bb.0: + liveins: %w0, %w1 + %w20 = COPY %w1 + BL @foo, csr_aarch64_aapcs, implicit %w0, implicit-def %w0 + RET_ReallyLR implicit %w0 +... +--- +# The first copy is not a dead copy which is used in the second copy after the +# call. +# CHECK-LABEL: name: copyprop2 +# CHECK: bb.0: +# CHECK: %w20 = COPY +name: copyprop2 +allVRegsAllocated: true +body: | + bb.0: + liveins: %w0, %w1 + %w20 = COPY %w1 + BL @foo, csr_aarch64_aapcs, implicit %w0, implicit-def %w0 + %w0 = COPY %w20 + RET_ReallyLR implicit %w0 +... +--- +# Both the first and second copy are dead copies which are not used. +# CHECK-LABEL: name: copyprop3 +# CHECK: bb.0: +# CHECK-NOT: COPY +name: copyprop3 +allVRegsAllocated: true +body: | + bb.0: + liveins: %w0, %w1 + %w20 = COPY %w1 + BL @foo, csr_aarch64_aapcs, implicit %w0, implicit-def %w0 + %w20 = COPY %w0 + RET_ReallyLR implicit %w0 +... +# The second copy is removed as a NOP copy, after then the first copy become +# dead which should be removed as well. +# CHECK-LABEL: name: copyprop4 +# CHECK: bb.0: +# CHECK-NOT: COPY +name: copyprop4 +allVRegsAllocated: true +body: | + bb.0: + liveins: %w0, %w1 + %w20 = COPY %w0 + %w0 = COPY %w20 + BL @foo, csr_aarch64_aapcs, implicit %w0, implicit-def %w0 + RET_ReallyLR implicit %w0 +... + diff --git a/test/CodeGen/MIR/AArch64/machine-scheduler.mir b/test/CodeGen/MIR/AArch64/machine-scheduler.mir new file mode 100644 index 000000000000..9ea5c6811b65 --- /dev/null +++ b/test/CodeGen/MIR/AArch64/machine-scheduler.mir @@ -0,0 +1,35 @@ +# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-scheduler -verify-machineinstrs -o - %s | FileCheck %s + +--- | + define i64 @load_imp-def(i64* nocapture %P, i32 %v) { + entry: + %0 = bitcast i64* %P to i32* + %1 = load i32, i32* %0 + %conv = zext i32 %1 to i64 + %arrayidx19 = getelementptr inbounds i64, i64* %P, i64 1 + %arrayidx1 = bitcast i64* %arrayidx19 to i32* + store i32 %v, i32* %arrayidx1 + %2 = load i64, i64* %arrayidx19 + %and = and i64 %2, 4294967295 + %add = add nuw nsw i64 %and, %conv + ret i64 %add + } +... +--- +# CHECK-LABEL: name: load_imp-def +# CHECK: bb.0.entry: +# CHECK: LDRWui %x0, 0 +# CHECK: LDRWui %x0, 1 +# CHECK: STRWui %w1, %x0, 2 +name: load_imp-def +isSSA: true +body: | + bb.0.entry: + liveins: %w1, %x0 + %w8 = LDRWui %x0, 1, implicit-def %x8 :: (load 4 from %ir.0) + STRWui killed %w1, %x0, 2 :: (store 4 into %ir.arrayidx1) + %w9 = LDRWui killed %x0, 0, implicit-def %x9 :: (load 4 from %ir.arrayidx19, align 8) + %x0 = ADDXrr killed %x9, killed %x8 + RET_ReallyLR implicit %x0 +... + diff --git a/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir b/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir index e23a352dff21..e19b618123de 100644 --- a/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir +++ b/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser can parse multiple register machine # operands before '='. diff --git a/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir b/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir index 9471516db647..a2ad2092cb0e 100644 --- a/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir +++ b/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s +# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s --- | @var = global i64 0 @@ -26,7 +26,7 @@ frameInfo: maxAlignment: 8 # CHECK-LABEL: stack_local # CHECK: stack: -# CHECK_NEXT: { id:0, name:local_var, offset:0, size:8, alignment:8, local-offset: -8 } +# CHECK-NEXT: { id: 0, name: local_var, offset: 0, size: 8, alignment: 8, local-offset: -8 } stack: - { id: 0,name: local_var,offset: 0,size: 8,alignment: 8, local-offset: -8 } body: | diff --git a/test/CodeGen/MIR/AArch64/target-flags.mir b/test/CodeGen/MIR/AArch64/target-flags.mir index e96fce7c2f2b..e0a41015531b 100644 --- a/test/CodeGen/MIR/AArch64/target-flags.mir +++ b/test/CodeGen/MIR/AArch64/target-flags.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s --- | diff --git a/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir b/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir index 34793880a60b..d4d2ae15af96 100644 --- a/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir +++ b/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=amdgcn -mcpu=SI -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir b/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir index e20cf376414a..1b67edc6bb43 100644 --- a/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir +++ b/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=amdgcn -mcpu=SI -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/AMDGPU/target-index-operands.mir b/test/CodeGen/MIR/AMDGPU/target-index-operands.mir index 839fd3212c61..b0b7ea4eabd0 100644 --- a/test/CodeGen/MIR/AMDGPU/target-index-operands.mir +++ b/test/CodeGen/MIR/AMDGPU/target-index-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o /dev/null %s | FileCheck %s +# RUN: llc -march=amdgcn -mcpu=SI -run-pass none -o - %s | FileCheck %s # This test verifies that the MIR parser can parse target index operands. --- | diff --git a/test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir b/test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir deleted file mode 100644 index e351713dc290..000000000000 --- a/test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir +++ /dev/null @@ -1,165 +0,0 @@ -# RUN: llc -start-after machine-cp -stop-after=if-converter -mtriple=thumbv7 %s -o /dev/null 2>&1 | FileCheck %s ---- | - ; ModuleID = '/Volumes/Data/llvm/test/CodeGen/ARM/sched-it-debug-nodes.ll' - target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" - target triple = "thumbv7" - - %struct.s = type opaque - - ; Function Attrs: nounwind - define arm_aapcscc i32 @f(%struct.s* %s, i32 %u, i8* %b, i32 %n) #0 !dbg !4 { - entry: - tail call void @llvm.dbg.value(metadata %struct.s* %s, i64 0, metadata !18, metadata !27), !dbg !28 - tail call void @llvm.dbg.value(metadata i32 %u, i64 0, metadata !19, metadata !27), !dbg !28 - tail call void @llvm.dbg.value(metadata i8* %b, i64 0, metadata !20, metadata !27), !dbg !28 - tail call void @llvm.dbg.value(metadata i32 %n, i64 0, metadata !21, metadata !27), !dbg !28 - %cmp = icmp ult i32 %n, 4, !dbg !29 - br i1 %cmp, label %return, label %if.end, !dbg !31 - - if.end: ; preds = %entry - tail call arm_aapcscc void @g(%struct.s* %s, i8* %b, i32 %n) #3, !dbg !32 - br label %return, !dbg !33 - - return: ; preds = %if.end, %entry - %retval.0 = phi i32 [ 0, %if.end ], [ -1, %entry ] - ret i32 %retval.0, !dbg !34 - } - - declare arm_aapcscc void @g(%struct.s*, i8*, i32) #1 - - ; Function Attrs: nounwind readnone - declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 - - attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } - attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } - attributes #2 = { nounwind readnone } - attributes #3 = { nounwind } - - !llvm.dbg.cu = !{!0} - !llvm.module.flags = !{!22, !23, !24, !25} - !llvm.ident = !{!26} - - !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0 (llvm/trunk 237059)", isOptimized: true, runtimeVersion: 0, emissionKind: 1, enums: !2, retainedTypes: !2, subprograms: !3, globals: !2, imports: !2) - !1 = !DIFile(filename: "<stdin>", directory: "/Users/compnerd/Source/llvm") - !2 = !{} - !3 = !{!4} - !4 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 9, type: !5, isLocal: false, isDefinition: true, scopeLine: 9, flags: DIFlagPrototyped, isOptimized: true, variables: !17) - !5 = !DISubroutineType(types: !6) - !6 = !{!7, !8, !11, !12, !16} - !7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed) - !8 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !9, size: 32, align: 32) - !9 = !DIDerivedType(tag: DW_TAG_typedef, name: "s", file: !1, line: 5, baseType: !10) - !10 = !DICompositeType(tag: DW_TAG_structure_type, name: "s", file: !1, line: 5, flags: DIFlagFwdDecl) - !11 = !DIBasicType(name: "unsigned int", size: 32, align: 32, encoding: DW_ATE_unsigned) - !12 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !13, size: 32, align: 32) - !13 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !14) - !14 = !DIDerivedType(tag: DW_TAG_typedef, name: "uint8_t", file: !1, line: 2, baseType: !15) - !15 = !DIBasicType(name: "unsigned char", size: 8, align: 8, encoding: DW_ATE_unsigned_char) - !16 = !DIDerivedType(tag: DW_TAG_typedef, name: "size_t", file: !1, line: 3, baseType: !11) - !17 = !{!18, !19, !20, !21} - !18 = !DILocalVariable(name: "s", arg: 1, scope: !4, file: !1, line: 9, type: !8) - !19 = !DILocalVariable(name: "u", arg: 2, scope: !4, file: !1, line: 9, type: !11) - !20 = !DILocalVariable(name: "b", arg: 3, scope: !4, file: !1, line: 9, type: !12) - !21 = !DILocalVariable(name: "n", arg: 4, scope: !4, file: !1, line: 9, type: !16) - !22 = !{i32 2, !"Dwarf Version", i32 4} - !23 = !{i32 2, !"Debug Info Version", i32 3} - !24 = !{i32 1, !"wchar_size", i32 4} - !25 = !{i32 1, !"min_enum_size", i32 4} - !26 = !{!"clang version 3.7.0 (llvm/trunk 237059)"} - !27 = !DIExpression() - !28 = !DILocation(line: 9, scope: !4) - !29 = !DILocation(line: 10, scope: !30) - !30 = distinct !DILexicalBlock(scope: !4, file: !1, line: 10) - !31 = !DILocation(line: 10, scope: !4) - !32 = !DILocation(line: 13, scope: !4) - !33 = !DILocation(line: 14, scope: !4) - !34 = !DILocation(line: 15, scope: !4) - -... ---- -name: f -alignment: 1 -exposesReturnsTwice: false -hasInlineAsm: false -isSSA: false -tracksRegLiveness: true -tracksSubRegLiveness: false -liveins: - - { reg: '%r0' } - - { reg: '%r2' } - - { reg: '%r3' } -calleeSavedRegisters: [ '%lr', '%d8', '%d9', '%d10', '%d11', '%d12', '%d13', - '%d14', '%d15', '%q4', '%q5', '%q6', '%q7', '%r4', - '%r5', '%r6', '%r7', '%r8', '%r9', '%r10', '%r11', - '%s16', '%s17', '%s18', '%s19', '%s20', '%s21', - '%s22', '%s23', '%s24', '%s25', '%s26', '%s27', - '%s28', '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11', - '%d10_d12', '%d11_d13', '%d12_d14', '%d13_d15', - '%q4_q5', '%q5_q6', '%q6_q7', '%q4_q5_q6_q7', '%r4_r5', - '%r6_r7', '%r8_r9', '%r10_r11', '%d8_d9_d10', '%d9_d10_d11', - '%d10_d11_d12', '%d11_d12_d13', '%d12_d13_d14', - '%d13_d14_d15', '%d8_d10_d12', '%d9_d11_d13', '%d10_d12_d14', - '%d11_d13_d15', '%d8_d10_d12_d14', '%d9_d11_d13_d15', - '%d9_d10', '%d11_d12', '%d13_d14', '%d9_d10_d11_d12', - '%d11_d12_d13_d14' ] -frameInfo: - isFrameAddressTaken: false - isReturnAddressTaken: false - hasStackMap: false - hasPatchPoint: false - stackSize: 8 - offsetAdjustment: 0 - maxAlignment: 4 - adjustsStack: true - hasCalls: true - maxCallFrameSize: 0 - hasOpaqueSPAdjustment: false - hasVAStart: false - hasMustTailInVarArgFunc: false - savePoint: '%bb.2.if.end' - restorePoint: '%bb.2.if.end' -stack: - - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '%lr' } - - { id: 1, type: spill-slot, offset: -8, size: 4, alignment: 4, callee-saved-register: '%r7' } -body: | - bb.0.entry: - successors: %bb.1, %bb.2.if.end - liveins: %r0, %r2, %r3, %lr, %r7 - - DBG_VALUE debug-use %r0, debug-use _, !18, !27, debug-location !28 - DBG_VALUE debug-use %r1, debug-use _, !19, !27, debug-location !28 - DBG_VALUE debug-use %r2, debug-use _, !20, !27, debug-location !28 - DBG_VALUE debug-use %r3, debug-use _, !21, !27, debug-location !28 - t2CMPri %r3, 4, 14, _, implicit-def %cpsr, debug-location !31 - t2Bcc %bb.2.if.end, 2, killed %cpsr - - bb.1: - liveins: %lr, %r7 - - DBG_VALUE debug-use %r1, debug-use _, !19, !27, debug-location !28 - %r0 = t2MOVi -1, 14, _, _ - DBG_VALUE debug-use %r1, debug-use _, !19, !27, debug-location !28 - tBX_RET 14, _, implicit %r0, debug-location !34 - - bb.2.if.end: - liveins: %r0, %r2, %r3, %r7, %lr - - %sp = frame-setup t2STMDB_UPD %sp, 14, _, killed %r7, killed %lr - frame-setup CFI_INSTRUCTION .cfi_def_cfa_offset 8 - frame-setup CFI_INSTRUCTION .cfi_offset %lr, -4 - frame-setup CFI_INSTRUCTION .cfi_offset %r7, -8 - DBG_VALUE debug-use %r0, debug-use _, !18, !27, debug-location !28 - DBG_VALUE debug-use %r1, debug-use _, !19, !27, debug-location !28 - DBG_VALUE debug-use %r2, debug-use _, !20, !27, debug-location !28 - DBG_VALUE debug-use %r3, debug-use _, !21, !27, debug-location !28 - %r1 = COPY killed %r2, debug-location !32 - %r2 = COPY killed %r3, debug-location !32 - tBL 14, _, @g, csr_aapcs, implicit-def dead %lr, implicit %sp, implicit %r0, implicit %r1, implicit %r2, implicit-def %sp, debug-location !32 - %r0 = t2MOVi 0, 14, _, _ - %sp = t2LDMIA_UPD %sp, 14, _, def %r7, def %lr - DBG_VALUE debug-use %r1, debug-use _, !19, !27, debug-location !28 - tBX_RET 14, _, implicit %r0, debug-location !34 -# Verify that the DBG_VALUE is ignored. -# CHECK: %sp = t2LDMIA_RET %sp, 14, _, def %r7, def %pc, implicit %r0 - -... diff --git a/test/CodeGen/MIR/ARM/bundled-instructions.mir b/test/CodeGen/MIR/ARM/bundled-instructions.mir index 814c4e188ea5..56e21e362707 100644 --- a/test/CodeGen/MIR/ARM/bundled-instructions.mir +++ b/test/CodeGen/MIR/ARM/bundled-instructions.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s | FileCheck %s +# RUN: llc -mtriple thumbv7-apple-ios -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the bundled machine instructions # and 'internal' register flags correctly. diff --git a/test/CodeGen/MIR/ARM/cfi-same-value.mir b/test/CodeGen/MIR/ARM/cfi-same-value.mir index f9850abe0463..32d0a85b5484 100644 --- a/test/CodeGen/MIR/ARM/cfi-same-value.mir +++ b/test/CodeGen/MIR/ARM/cfi-same-value.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=arm-linux-unknown-gnueabi -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -mtriple=arm-linux-unknown-gnueabi -run-pass none -o - %s | FileCheck %s --- | declare void @dummy_use(i32*, i32) diff --git a/test/CodeGen/MIR/ARM/expected-closing-brace.mir b/test/CodeGen/MIR/ARM/expected-closing-brace.mir index 78d91aead247..4304935067ad 100644 --- a/test/CodeGen/MIR/ARM/expected-closing-brace.mir +++ b/test/CodeGen/MIR/ARM/expected-closing-brace.mir @@ -1,4 +1,4 @@ -# RUN: not llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -mtriple thumbv7-apple-ios -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | @G = external global i32 diff --git a/test/CodeGen/MIR/ARM/extraneous-closing-brace-error.mir b/test/CodeGen/MIR/ARM/extraneous-closing-brace-error.mir index a069dd307936..fcd938efbb91 100644 --- a/test/CodeGen/MIR/ARM/extraneous-closing-brace-error.mir +++ b/test/CodeGen/MIR/ARM/extraneous-closing-brace-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -mtriple thumbv7-apple-ios -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i32 @test1(i32 %a) { diff --git a/test/CodeGen/MIR/ARM/imm-peephole-arm.mir b/test/CodeGen/MIR/ARM/imm-peephole-arm.mir new file mode 100644 index 000000000000..cd30bdb74d57 --- /dev/null +++ b/test/CodeGen/MIR/ARM/imm-peephole-arm.mir @@ -0,0 +1,60 @@ +# RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s + +# CHECK: [[IN:%.*]] = COPY %r0 +# CHECK: [[SUM1TMP:%.*]] = ADDri [[IN]], 133 +# CHECK: [[SUM1:%.*]] = ADDri killed [[SUM1TMP]], 25600 + +# CHECK: [[SUM2TMP:%.*]] = SUBri [[IN]], 133 +# CHECK: [[SUM2:%.*]] = SUBri killed [[SUM2TMP]], 25600 + +# CHECK: [[SUM3TMP:%.*]] = SUBri [[IN]], 133 +# CHECK: [[SUM3:%.*]] = SUBri killed [[SUM3TMP]], 25600 + +# CHECK: [[SUM4TMP:%.*]] = ADDri killed [[IN]], 133 +# CHECK: [[SUM4:%.*]] = ADDri killed [[SUM4TMP]], 25600 + + +--- | + target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32" + target triple = "armv7-apple-ios" + + define i32 @foo(i32 %in) { + ret i32 undef + } +... +--- +name: foo +registers: + - { id: 0, class: gprnopc } + - { id: 1, class: rgpr } + - { id: 2, class: rgpr } + - { id: 3, class: rgpr } + - { id: 4, class: rgpr } + - { id: 5, class: rgpr } + - { id: 6, class: rgpr } + - { id: 7, class: rgpr } + - { id: 8, class: rgpr } +liveins: + - { reg: '%r0', virtual-reg: '%0' } +body: | + bb.0 (%ir-block.0): + liveins: %r0 + + %0 = COPY %r0 + %1 = MOVi32imm -25733 + %2 = SUBrr %0, killed %1, 14, _, _ + + %3 = MOVi32imm 25733 + %4 = SUBrr %0, killed %3, 14, _, _ + + %5 = MOVi32imm -25733 + %6 = ADDrr %0, killed %5, 14, _, _ + + %7 = MOVi32imm 25733 + %8 = ADDrr killed %0, killed %7, 14, _, _ + + %r0 = COPY killed %8 + BX_RET 14, _, implicit %r0 + +... + diff --git a/test/CodeGen/MIR/ARM/imm-peephole-thumb.mir b/test/CodeGen/MIR/ARM/imm-peephole-thumb.mir new file mode 100644 index 000000000000..3d342902d80d --- /dev/null +++ b/test/CodeGen/MIR/ARM/imm-peephole-thumb.mir @@ -0,0 +1,59 @@ +# RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s + +# CHECK: [[IN:%.*]] = COPY %r0 +# CHECK: [[SUM1TMP:%.*]] = t2ADDri [[IN]], 25600 +# CHECK: [[SUM1:%.*]] = t2ADDri killed [[SUM1TMP]], 133 + +# CHECK: [[SUM2TMP:%.*]] = t2SUBri [[IN]], 25600 +# CHECK: [[SUM2:%.*]] = t2SUBri killed [[SUM2TMP]], 133 + +# CHECK: [[SUM3TMP:%.*]] = t2SUBri [[IN]], 25600 +# CHECK: [[SUM3:%.*]] = t2SUBri killed [[SUM3TMP]], 133 + +# CHECK: [[SUM4TMP:%.*]] = t2ADDri killed [[IN]], 25600 +# CHECK: [[SUM4:%.*]] = t2ADDri killed [[SUM4TMP]], 133 + + +--- | + target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32" + target triple = "thumbv7-apple-ios" + + define i32 @foo(i32 %in) { + ret i32 undef + } +... +--- +name: foo +registers: + - { id: 0, class: gprnopc } + - { id: 1, class: rgpr } + - { id: 2, class: rgpr } + - { id: 3, class: rgpr } + - { id: 4, class: rgpr } + - { id: 5, class: rgpr } + - { id: 6, class: rgpr } + - { id: 7, class: rgpr } + - { id: 8, class: rgpr } +liveins: + - { reg: '%r0', virtual-reg: '%0' } +body: | + bb.0 (%ir-block.0): + liveins: %r0 + %0 = COPY %r0 + %1 = t2MOVi32imm -25733 + %2 = t2SUBrr %0, killed %1, 14, _, _ + + %3 = t2MOVi32imm 25733 + %4 = t2SUBrr %0, killed %3, 14, _, _ + + %5 = t2MOVi32imm -25733 + %6= t2ADDrr %0, killed %5, 14, _, _ + + %7 = t2MOVi32imm 25733 + %8 = t2ADDrr killed %0, killed %7, 14, _, _ + + %r0 = COPY killed %8 + tBX_RET 14, _, implicit %r0 + +... + diff --git a/test/CodeGen/MIR/ARM/nested-instruction-bundle-error.mir b/test/CodeGen/MIR/ARM/nested-instruction-bundle-error.mir index b93697857e79..63b997046d02 100644 --- a/test/CodeGen/MIR/ARM/nested-instruction-bundle-error.mir +++ b/test/CodeGen/MIR/ARM/nested-instruction-bundle-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -mtriple thumbv7-apple-ios -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i32 @test1(i32 %a) { diff --git a/test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir b/test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir index 5b5750b8d1e8..eb4a44b7e175 100644 --- a/test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir +++ b/test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir @@ -1,11 +1,11 @@ -# RUN: llc -mtriple thumbv7 -start-after if-converter -print-before=post-RA-sched -print-after=post-RA-sched %s -o /dev/null 2>&1 | FileCheck %s +# RUN: llc -mtriple thumbv7 -verify-machineinstrs -start-after if-converter -print-before post-RA-sched -print-after post-RA-sched %s -o /dev/null 2>&1 | FileCheck %s --- | ; ModuleID = '/Volumes/Data/llvm/test/CodeGen/ARM/sched-it-debug-nodes.ll' target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" target triple = "thumbv7" - + %struct.s = type opaque - + ; Function Attrs: nounwind define arm_aapcscc i32 @f(%struct.s* %s, i32 %u, i8* %b, i32 %n) #0 !dbg !4 { entry: @@ -15,11 +15,11 @@ tail call void @llvm.dbg.value(metadata i32 %n, i64 0, metadata !21, metadata !27), !dbg !28 %cmp = icmp ult i32 %n, 4, !dbg !29 br i1 %cmp, label %return, label %if.end, !dbg !31 - + if.end: ; preds = %entry tail call arm_aapcscc void @g(%struct.s* %s, i8* %b, i32 %n) #3, !dbg !32 br label %return, !dbg !33 - + return: ; preds = %if.end, %entry %retval.0 = phi i32 [ 0, %if.end ], [ -1, %entry ] ret i32 %retval.0, !dbg !34 @@ -31,30 +31,29 @@ ; attempts to schedule the Machine Instr, and tries to tag the register in the ; debug value as KILL'ed, resulting in a DEBUG_VALUE node changing codegen! (or ; hopefully, triggering an assert). - + ; CHECK: BUNDLE %ITSTATE<imp-def,dead> ; CHECK: * DBG_VALUE %R1, %noreg, !"u" ; CHECK-NOT: * DBG_VALUE %R1<kill>, %noreg, !"u" - + declare arm_aapcscc void @g(%struct.s*, i8*, i32) #1 - + ; Function Attrs: nounwind readnone declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 - + attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #2 = { nounwind readnone } attributes #3 = { nounwind } - + !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!22, !23, !24, !25} !llvm.ident = !{!26} - - !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0 (llvm/trunk 237059)", isOptimized: true, runtimeVersion: 0, emissionKind: 1, enums: !2, retainedTypes: !2, subprograms: !3, globals: !2, imports: !2) + + !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0 (llvm/trunk 237059)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2) !1 = !DIFile(filename: "<stdin>", directory: "/Users/compnerd/Source/llvm") !2 = !{} - !3 = !{!4} - !4 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 9, type: !5, isLocal: false, isDefinition: true, scopeLine: 9, flags: DIFlagPrototyped, isOptimized: true, variables: !17) + !4 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 9, type: !5, isLocal: false, isDefinition: true, scopeLine: 9, flags: DIFlagPrototyped, isOptimized: true, unit: !0, variables: !17) !5 = !DISubroutineType(types: !6) !6 = !{!7, !8, !11, !12, !16} !7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed) @@ -92,28 +91,30 @@ name: f alignment: 1 exposesReturnsTwice: false hasInlineAsm: false +allVRegsAllocated: true isSSA: false tracksRegLiveness: true tracksSubRegLiveness: false -liveins: +liveins: - { reg: '%r0' } + - { reg: '%r1' } - { reg: '%r2' } - { reg: '%r3' } -calleeSavedRegisters: [ '%lr', '%d8', '%d9', '%d10', '%d11', '%d12', '%d13', - '%d14', '%d15', '%q4', '%q5', '%q6', '%q7', '%r4', - '%r5', '%r6', '%r7', '%r8', '%r9', '%r10', '%r11', - '%s16', '%s17', '%s18', '%s19', '%s20', '%s21', - '%s22', '%s23', '%s24', '%s25', '%s26', '%s27', - '%s28', '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11', - '%d10_d12', '%d11_d13', '%d12_d14', '%d13_d15', - '%q4_q5', '%q5_q6', '%q6_q7', '%q4_q5_q6_q7', '%r4_r5', - '%r6_r7', '%r8_r9', '%r10_r11', '%d8_d9_d10', '%d9_d10_d11', - '%d10_d11_d12', '%d11_d12_d13', '%d12_d13_d14', - '%d13_d14_d15', '%d8_d10_d12', '%d9_d11_d13', '%d10_d12_d14', - '%d11_d13_d15', '%d8_d10_d12_d14', '%d9_d11_d13_d15', - '%d9_d10', '%d11_d12', '%d13_d14', '%d9_d10_d11_d12', +calleeSavedRegisters: [ '%lr', '%d8', '%d9', '%d10', '%d11', '%d12', '%d13', + '%d14', '%d15', '%q4', '%q5', '%q6', '%q7', '%r4', + '%r5', '%r6', '%r7', '%r8', '%r9', '%r10', '%r11', + '%s16', '%s17', '%s18', '%s19', '%s20', '%s21', + '%s22', '%s23', '%s24', '%s25', '%s26', '%s27', + '%s28', '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11', + '%d10_d12', '%d11_d13', '%d12_d14', '%d13_d15', + '%q4_q5', '%q5_q6', '%q6_q7', '%q4_q5_q6_q7', '%r4_r5', + '%r6_r7', '%r8_r9', '%r10_r11', '%d8_d9_d10', '%d9_d10_d11', + '%d10_d11_d12', '%d11_d12_d13', '%d12_d13_d14', + '%d13_d14_d15', '%d8_d10_d12', '%d9_d11_d13', '%d10_d12_d14', + '%d11_d13_d15', '%d8_d10_d12_d14', '%d9_d11_d13_d15', + '%d9_d10', '%d11_d12', '%d13_d14', '%d9_d10_d11_d12', '%d11_d12_d13_d14' ] -frameInfo: +frameInfo: isFrameAddressTaken: false isReturnAddressTaken: false hasStackMap: false @@ -127,13 +128,13 @@ frameInfo: hasOpaqueSPAdjustment: false hasVAStart: false hasMustTailInVarArgFunc: false -stack: +stack: - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '%lr' } - { id: 1, type: spill-slot, offset: -8, size: 4, alignment: 4, callee-saved-register: '%r7' } body: | bb.0.entry: - liveins: %r0, %r2, %r3, %lr, %r7 - + liveins: %r0, %r1, %r2, %r3, %lr, %r7 + DBG_VALUE debug-use %r0, debug-use _, !18, !27, debug-location !28 DBG_VALUE debug-use %r1, debug-use _, !19, !27, debug-location !28 DBG_VALUE debug-use %r2, debug-use _, !20, !27, debug-location !28 diff --git a/test/CodeGen/MIR/Generic/basic-blocks.mir b/test/CodeGen/MIR/Generic/basic-blocks.mir index 22f8d28290db..0df7a9c8c633 100644 --- a/test/CodeGen/MIR/Generic/basic-blocks.mir +++ b/test/CodeGen/MIR/Generic/basic-blocks.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses machine functions correctly. --- | diff --git a/test/CodeGen/MIR/Generic/expected-colon-after-basic-block.mir b/test/CodeGen/MIR/Generic/expected-colon-after-basic-block.mir index 892258666d10..040ab7c44c4a 100644 --- a/test/CodeGen/MIR/Generic/expected-colon-after-basic-block.mir +++ b/test/CodeGen/MIR/Generic/expected-colon-after-basic-block.mir @@ -1,4 +1,4 @@ -# RUN: not llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/Generic/expected-mbb-reference-for-successor-mbb.mir b/test/CodeGen/MIR/Generic/expected-mbb-reference-for-successor-mbb.mir index a5e04f86c6d1..42996568fe27 100644 --- a/test/CodeGen/MIR/Generic/expected-mbb-reference-for-successor-mbb.mir +++ b/test/CodeGen/MIR/Generic/expected-mbb-reference-for-successor-mbb.mir @@ -1,4 +1,4 @@ -# RUN: not llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/Generic/frame-info.mir b/test/CodeGen/MIR/Generic/frame-info.mir index 6e4e3955cb17..71448c8a71ba 100644 --- a/test/CodeGen/MIR/Generic/frame-info.mir +++ b/test/CodeGen/MIR/Generic/frame-info.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s +# RUN: llc -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses machine frame info properties # correctly. diff --git a/test/CodeGen/MIR/Generic/function-missing-machine-function.mir b/test/CodeGen/MIR/Generic/function-missing-machine-function.mir index 71b5b2845340..f3a834801671 100644 --- a/test/CodeGen/MIR/Generic/function-missing-machine-function.mir +++ b/test/CodeGen/MIR/Generic/function-missing-machine-function.mir @@ -1,4 +1,4 @@ -# RUN: not llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test verifies that an error is reported when a MIR file has some # function but is missing a corresponding machine function. diff --git a/test/CodeGen/MIR/Generic/invalid-jump-table-kind.mir b/test/CodeGen/MIR/Generic/invalid-jump-table-kind.mir index 576de4bd9dc7..5f96d2d57e7c 100644 --- a/test/CodeGen/MIR/Generic/invalid-jump-table-kind.mir +++ b/test/CodeGen/MIR/Generic/invalid-jump-table-kind.mir @@ -1,4 +1,4 @@ -# RUN: not llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/Generic/llvm-ir-error-reported.mir b/test/CodeGen/MIR/Generic/llvm-ir-error-reported.mir index 3508c341c44d..15824cb2ca6d 100644 --- a/test/CodeGen/MIR/Generic/llvm-ir-error-reported.mir +++ b/test/CodeGen/MIR/Generic/llvm-ir-error-reported.mir @@ -1,4 +1,4 @@ -# RUN: not llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures an error is reported if the embedded LLVM IR contains an # error. diff --git a/test/CodeGen/MIR/Generic/llvmIR.mir b/test/CodeGen/MIR/Generic/llvmIR.mir index c7a220afa505..432b18ff939d 100644 --- a/test/CodeGen/MIR/Generic/llvmIR.mir +++ b/test/CodeGen/MIR/Generic/llvmIR.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -run-pass none -o - %s | FileCheck %s # This test ensures that the LLVM IR that's embedded with MIR is parsed # correctly. diff --git a/test/CodeGen/MIR/Generic/llvmIRMissing.mir b/test/CodeGen/MIR/Generic/llvmIRMissing.mir index afa96010f297..9f361e8d3fe4 100644 --- a/test/CodeGen/MIR/Generic/llvmIRMissing.mir +++ b/test/CodeGen/MIR/Generic/llvmIRMissing.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -run-pass none -o - %s 2>&1 | FileCheck %s # This test ensures that the MIR parser accepts files without the LLVM IR. --- diff --git a/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir b/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir index d6ecd5dc8514..a5737c2c1526 100644 --- a/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir +++ b/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -run-pass none -o - %s 2>&1 | FileCheck %s # This test ensures that the MIR parser preserves unnamed LLVM IR block # references. diff --git a/test/CodeGen/MIR/Generic/machine-basic-block-redefinition-error.mir b/test/CodeGen/MIR/Generic/machine-basic-block-redefinition-error.mir index 41747535c351..538c3f456b0b 100644 --- a/test/CodeGen/MIR/Generic/machine-basic-block-redefinition-error.mir +++ b/test/CodeGen/MIR/Generic/machine-basic-block-redefinition-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/Generic/machine-basic-block-undefined-ir-block.mir b/test/CodeGen/MIR/Generic/machine-basic-block-undefined-ir-block.mir index df559f852ec0..ac9a12b3e44d 100644 --- a/test/CodeGen/MIR/Generic/machine-basic-block-undefined-ir-block.mir +++ b/test/CodeGen/MIR/Generic/machine-basic-block-undefined-ir-block.mir @@ -1,4 +1,4 @@ -# RUN: not llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/Generic/machine-basic-block-unknown-name.mir b/test/CodeGen/MIR/Generic/machine-basic-block-unknown-name.mir index 876947b868b0..98d68f7cd46c 100644 --- a/test/CodeGen/MIR/Generic/machine-basic-block-unknown-name.mir +++ b/test/CodeGen/MIR/Generic/machine-basic-block-unknown-name.mir @@ -1,4 +1,4 @@ -# RUN: not llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that an error is reported whenever the MIR parser can't find # a basic block with the machine basis block's name. diff --git a/test/CodeGen/MIR/Generic/machine-function-missing-body-error.mir b/test/CodeGen/MIR/Generic/machine-function-missing-body-error.mir index 0dc7477f6275..1896371db36a 100644 --- a/test/CodeGen/MIR/Generic/machine-function-missing-body-error.mir +++ b/test/CodeGen/MIR/Generic/machine-function-missing-body-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that the MIR parser reports an error when it encounters a # machine function with an empty body. diff --git a/test/CodeGen/MIR/Generic/machine-function-missing-function.mir b/test/CodeGen/MIR/Generic/machine-function-missing-function.mir index 6800f8724324..c547bb25d753 100644 --- a/test/CodeGen/MIR/Generic/machine-function-missing-function.mir +++ b/test/CodeGen/MIR/Generic/machine-function-missing-function.mir @@ -1,4 +1,4 @@ -# RUN: not llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that an error is reported when the mir file has LLVM IR and # one of the machine functions has a name that doesn't match any function in # the LLVM IR. diff --git a/test/CodeGen/MIR/Generic/machine-function-missing-name.mir b/test/CodeGen/MIR/Generic/machine-function-missing-name.mir index f65b77880e97..30f0e51b3b66 100644 --- a/test/CodeGen/MIR/Generic/machine-function-missing-name.mir +++ b/test/CodeGen/MIR/Generic/machine-function-missing-name.mir @@ -1,4 +1,4 @@ -# RUN: not llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that an error is reported when a machine function doesn't # have a name attribute. diff --git a/test/CodeGen/MIR/Generic/machine-function-redefinition-error.mir b/test/CodeGen/MIR/Generic/machine-function-redefinition-error.mir index be84161b5630..a05d5357182e 100644 --- a/test/CodeGen/MIR/Generic/machine-function-redefinition-error.mir +++ b/test/CodeGen/MIR/Generic/machine-function-redefinition-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that the machine function errors are reported correctly. --- diff --git a/test/CodeGen/MIR/Generic/machine-function.mir b/test/CodeGen/MIR/Generic/machine-function.mir index 1c4ca3d07d2a..64802a13060e 100644 --- a/test/CodeGen/MIR/Generic/machine-function.mir +++ b/test/CodeGen/MIR/Generic/machine-function.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses machine functions correctly. --- | diff --git a/test/CodeGen/MIR/Generic/multiRunPass.mir b/test/CodeGen/MIR/Generic/multiRunPass.mir new file mode 100644 index 000000000000..bca007de80b7 --- /dev/null +++ b/test/CodeGen/MIR/Generic/multiRunPass.mir @@ -0,0 +1,20 @@ +# RUN: llc -run-pass expand-isel-pseudos -run-pass peephole-opt -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE +# RUN: llc -run-pass expand-isel-pseudos,peephole-opt -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PSEUDO_PEEPHOLE +# RUN: llc -run-pass peephole-opt -run-pass expand-isel-pseudos -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO +# RUN: llc -run-pass peephole-opt,expand-isel-pseudos -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=PEEPHOLE_PSEUDO +# REQUIRES: asserts + +# This test ensures that the command line accepts +# several run passes on the same command line and +# actually create the proper pipeline for it. +# PSEUDO_PEEPHOLE: -expand-isel-pseudos -peephole-opt +# PEEPHOLE_PSEUDO: -peephole-opt -expand-isel-pseudos + +# Make sure there are no other passes happening after what we asked. +# CHECK-NEXT: --- | +--- +# CHECK: name: foo +name: foo +body: | + bb.0: +... diff --git a/test/CodeGen/MIR/Generic/register-info.mir b/test/CodeGen/MIR/Generic/register-info.mir index 229cf0f9130f..bf90196b3e6e 100644 --- a/test/CodeGen/MIR/Generic/register-info.mir +++ b/test/CodeGen/MIR/Generic/register-info.mir @@ -1,4 +1,4 @@ -# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses machine register info properties # correctly. diff --git a/test/CodeGen/MIR/Hexagon/anti-dep-partial.mir b/test/CodeGen/MIR/Hexagon/anti-dep-partial.mir new file mode 100644 index 000000000000..a83c53e57cd3 --- /dev/null +++ b/test/CodeGen/MIR/Hexagon/anti-dep-partial.mir @@ -0,0 +1,35 @@ +# RUN: llc -march=hexagon -post-RA-scheduler -run-pass post-RA-sched %s -o - | FileCheck %s + +--- | + declare void @check(i64, i32, i32, i64) + define void @foo() { + ret void + } +... + +--- +name: foo +tracksRegLiveness: true +allVRegsAllocated: true +body: | + bb.0: + successors: + liveins: %r0, %r1, %d1, %d2, %r16, %r17, %r19, %r22, %r23 + %r2 = A2_add %r23, killed %r17 + %r6 = M2_mpyi %r16, %r16 + %r22 = M2_accii %r22, killed %r2, 2 + %r7 = A2_tfrsi 12345678 + %r3 = A2_tfr killed %r16 + %d2 = A2_tfrp killed %d0 + %r2 = L2_loadri_io %r29, 28 + %r2 = M2_mpyi killed %r6, killed %r2 + %r23 = S2_asr_i_r %r22, 31 + S2_storeri_io killed %r29, 0, killed %r7 + ; The anti-dependency on r23 between the first A2_add and the + ; S2_asr_i_r was causing d11 to be renamed, while r22 remained + ; unchanged. Check that the renaming of d11 does not happen. + ; CHECK: d11 + %d0 = A2_tfrp killed %d11 + J2_call @check, implicit-def %d0, implicit-def %d1, implicit-def %d2, implicit %d0, implicit %d1, implicit %d2 +... + diff --git a/test/CodeGen/MIR/Hexagon/lit.local.cfg b/test/CodeGen/MIR/Hexagon/lit.local.cfg new file mode 100644 index 000000000000..cc6a7edf05f3 --- /dev/null +++ b/test/CodeGen/MIR/Hexagon/lit.local.cfg @@ -0,0 +1,2 @@ +if not 'Hexagon' in config.root.targets: + config.unsupported = True diff --git a/test/CodeGen/MIR/Lanai/lit.local.cfg b/test/CodeGen/MIR/Lanai/lit.local.cfg new file mode 100644 index 000000000000..f1b8b4f4e21f --- /dev/null +++ b/test/CodeGen/MIR/Lanai/lit.local.cfg @@ -0,0 +1,2 @@ +if not 'Lanai' in config.root.targets: + config.unsupported = True diff --git a/test/CodeGen/MIR/Lanai/peephole-compare.mir b/test/CodeGen/MIR/Lanai/peephole-compare.mir new file mode 100644 index 000000000000..763fe2b9b961 --- /dev/null +++ b/test/CodeGen/MIR/Lanai/peephole-compare.mir @@ -0,0 +1,714 @@ +# RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s + +# Test the compare fold peephole. + +# CHECK-LABEL: name: test0a +# TODO: Enhance combiner to handle this case. This expands into: +# sub %r7, %r6, %r3 +# sub.f %r7, %r6, %r0 +# sel.eq %r18, %r3, %rv +# This is different from the pattern currently matched. If the lowered form had +# been sub.f %r3, 0, %r0 then it would have matched. + +# CHECK-LABEL: name: test1a +# CHECK: [[IN1:%.*]] = COPY %r7 +# CHECK: [[IN2:%.*]] = COPY %r6 +# CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def %sr + +# CHECK-LABEL: name: test1b +# CHECK: [[IN1:%.*]] = COPY %r7 +# CHECK: [[IN2:%.*]] = COPY %r6 +# CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def %sr + +# CHECK-LABEL: name: test2a +# CHECK: [[IN1:%.*]] = COPY %r7 +# CHECK: [[IN2:%.*]] = COPY %r6 +# CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def %sr + +# CHECK-LABEL: name: test2b +# CHECK: [[IN1:%.*]] = COPY %r7 +# CHECK: [[IN2:%.*]] = COPY %r6 +# CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def %sr + +# CHECK-LABEL: name: test3 +# CHECK: AND_F_R +# CHECK: AND_F_R +# CHECK: AND_F_R + +--- | + target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64" + target triple = "lanai-unknown-unknown" + + @a = global i32 -1, align 4 + @b = global i32 0, align 4 + + define i32 @test0a(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) { + entry: + %sub = sub i32 %b, %a + %cmp = icmp eq i32 %sub, 0 + %cond = select i1 %cmp, i32 %c, i32 %sub + ret i32 %cond + } + + define i32 @test0b(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) { + entry: + %cmp = icmp eq i32 %b, %a + %cond = select i1 %cmp, i32 %c, i32 %b + ret i32 %cond + } + + define i32 @test1a(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) { + entry: + %sub = sub i32 %b, %a + %cmp = icmp slt i32 %sub, 0 + %cond = select i1 %cmp, i32 %c, i32 %d + ret i32 %cond + } + + define i32 @test1b(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) { + entry: + %sub = sub i32 %b, %a + %cmp = icmp slt i32 %sub, 0 + %cond = select i1 %cmp, i32 %c, i32 %d + ret i32 %cond + } + + define i32 @test2a(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) { + entry: + %sub = sub i32 %b, %a + %cmp = icmp sgt i32 %sub, -1 + %cond = select i1 %cmp, i32 %c, i32 %d + ret i32 %cond + } + + define i32 @test2b(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) { + entry: + %sub = sub i32 %b, %a + %cmp = icmp sgt i32 %sub, -1 + %cond = select i1 %cmp, i32 %c, i32 %d + ret i32 %cond + } + + define i32 @test3(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) { + entry: + %sub = sub i32 %b, %a + %cmp = icmp slt i32 %sub, 1 + %cond = select i1 %cmp, i32 %c, i32 %d + ret i32 %cond + } + + define i32 @test4(i32 inreg %a, i32 inreg %b, i32 inreg %c, i32 inreg %d) { + entry: + %cmp = icmp ne i32 %a, 0 + %cmp1 = icmp ult i32 %a, %b + %or.cond = and i1 %cmp, %cmp1 + br i1 %or.cond, label %return, label %if.end + + if.end: ; preds = %entry + %cmp2 = icmp ne i32 %b, 0 + %cmp4 = icmp ult i32 %b, %c + %or.cond29 = and i1 %cmp2, %cmp4 + br i1 %or.cond29, label %return, label %if.end6 + + if.end6: ; preds = %if.end + %cmp7 = icmp ne i32 %c, 0 + %cmp9 = icmp ult i32 %c, %d + %or.cond30 = and i1 %cmp7, %cmp9 + br i1 %or.cond30, label %return, label %if.end11 + + if.end11: ; preds = %if.end6 + %cmp12 = icmp ne i32 %d, 0 + %cmp14 = icmp ult i32 %d, %a + %or.cond31 = and i1 %cmp12, %cmp14 + %b. = select i1 %or.cond31, i32 %b, i32 21 + ret i32 %b. + + return: ; preds = %if.end6, %if.end, %entry + %retval.0 = phi i32 [ %c, %entry ], [ %d, %if.end ], [ %a, %if.end6 ] + ret i32 %retval.0 + } + + define void @testBB() { + entry: + %0 = load i32, i32* @a, align 4, !tbaa !0 + %1 = load i32, i32* @b, align 4, !tbaa !0 + %sub.i = sub i32 %1, %0 + %tobool = icmp sgt i32 %sub.i, -1 + br i1 %tobool, label %if.end, label %if.then + + if.then: ; preds = %entry + %call1 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)() + br label %while.body + + while.body: ; preds = %while.body, %if.then + br label %while.body + + if.end: ; preds = %entry + %cmp.i = icmp slt i32 %sub.i, 1 + br i1 %cmp.i, label %if.then4, label %if.end7 + + if.then4: ; preds = %if.end + %call5 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)() + br label %while.body6 + + while.body6: ; preds = %while.body6, %if.then4 + br label %while.body6 + + if.end7: ; preds = %if.end + ret void + } + + declare i32 @g(...) + + ; Function Attrs: nounwind + declare void @llvm.stackprotector(i8*, i8**) #0 + + attributes #0 = { nounwind } + + !0 = !{!1, !1, i64 0} + !1 = !{!"int", !2, i64 0} + !2 = !{!"omnipotent char", !3, i64 0} + !3 = !{!"Simple C/C++ TBAA"} + +... +--- +name: test0a +alignment: 2 +exposesReturnsTwice: false +hasInlineAsm: false +allVRegsAllocated: false +isSSA: true +tracksRegLiveness: true +tracksSubRegLiveness: false +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } + - { id: 5, class: gpr } +liveins: + - { reg: '%r6', virtual-reg: '%0' } + - { reg: '%r7', virtual-reg: '%1' } + - { reg: '%r18', virtual-reg: '%2' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 0 + adjustsStack: false + hasCalls: false + maxCallFrameSize: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false +body: | + bb.0.entry: + liveins: %r6, %r7, %r18 + + %2 = COPY %r18 + %1 = COPY %r7 + %0 = COPY %r6 + %4 = SUB_R %1, %0, 0 + SFSUB_F_RI_LO %4, 0, implicit-def %sr + %5 = SELECT %2, %4, 7, implicit %sr + %rv = COPY %5 + RET implicit %rca, implicit %rv + +... +--- +name: test0b +alignment: 2 +exposesReturnsTwice: false +hasInlineAsm: false +allVRegsAllocated: false +isSSA: true +tracksRegLiveness: true +tracksSubRegLiveness: false +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } +liveins: + - { reg: '%r6', virtual-reg: '%0' } + - { reg: '%r7', virtual-reg: '%1' } + - { reg: '%r18', virtual-reg: '%2' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 0 + adjustsStack: false + hasCalls: false + maxCallFrameSize: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false +body: | + bb.0.entry: + liveins: %r6, %r7, %r18 + + %2 = COPY %r18 + %1 = COPY %r7 + %0 = COPY %r6 + SFSUB_F_RR %1, %0, implicit-def %sr + %4 = SELECT %2, %1, 7, implicit %sr + %rv = COPY %4 + RET implicit %rca, implicit %rv + +... +--- +name: test1a +alignment: 2 +exposesReturnsTwice: false +hasInlineAsm: false +allVRegsAllocated: false +isSSA: true +tracksRegLiveness: true +tracksSubRegLiveness: false +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } + - { id: 5, class: gpr } +liveins: + - { reg: '%r6', virtual-reg: '%0' } + - { reg: '%r7', virtual-reg: '%1' } + - { reg: '%r18', virtual-reg: '%2' } + - { reg: '%r19', virtual-reg: '%3' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 0 + adjustsStack: false + hasCalls: false + maxCallFrameSize: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false +body: | + bb.0.entry: + liveins: %r6, %r7, %r18, %r19 + + %3 = COPY %r19 + %2 = COPY %r18 + %1 = COPY %r7 + %0 = COPY %r6 + %4 = SUB_R %1, %0, 0 + SFSUB_F_RI_LO killed %4, 0, implicit-def %sr + %5 = SELECT %2, %3, 11, implicit %sr + %rv = COPY %5 + RET implicit %rca, implicit %rv + +... +--- +name: test1b +alignment: 2 +exposesReturnsTwice: false +hasInlineAsm: false +allVRegsAllocated: false +isSSA: true +tracksRegLiveness: true +tracksSubRegLiveness: false +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } + - { id: 5, class: gpr } +liveins: + - { reg: '%r6', virtual-reg: '%0' } + - { reg: '%r7', virtual-reg: '%1' } + - { reg: '%r18', virtual-reg: '%2' } + - { reg: '%r19', virtual-reg: '%3' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 0 + adjustsStack: false + hasCalls: false + maxCallFrameSize: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false +body: | + bb.0.entry: + liveins: %r6, %r7, %r18, %r19 + + %3 = COPY %r19 + %2 = COPY %r18 + %1 = COPY %r7 + %0 = COPY %r6 + %4 = SUB_R %1, %0, 0 + SFSUB_F_RI_LO killed %4, 0, implicit-def %sr + %5 = SELECT %2, %3, 11, implicit %sr + %rv = COPY %5 + RET implicit %rca, implicit %rv + +... +--- +name: test2a +alignment: 2 +exposesReturnsTwice: false +hasInlineAsm: false +allVRegsAllocated: false +isSSA: true +tracksRegLiveness: true +tracksSubRegLiveness: false +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } + - { id: 5, class: gpr } +liveins: + - { reg: '%r6', virtual-reg: '%0' } + - { reg: '%r7', virtual-reg: '%1' } + - { reg: '%r18', virtual-reg: '%2' } + - { reg: '%r19', virtual-reg: '%3' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 0 + adjustsStack: false + hasCalls: false + maxCallFrameSize: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false +body: | + bb.0.entry: + liveins: %r6, %r7, %r18, %r19 + + %3 = COPY %r19 + %2 = COPY %r18 + %1 = COPY %r7 + %0 = COPY %r6 + %4 = SUB_R %1, %0, 0 + SFSUB_F_RI_LO killed %4, 0, implicit-def %sr + %5 = SELECT %2, %3, 10, implicit %sr + %rv = COPY %5 + RET implicit %rca, implicit %rv + +... +--- +name: test2b +alignment: 2 +exposesReturnsTwice: false +hasInlineAsm: false +allVRegsAllocated: false +isSSA: true +tracksRegLiveness: true +tracksSubRegLiveness: false +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } + - { id: 5, class: gpr } +liveins: + - { reg: '%r6', virtual-reg: '%0' } + - { reg: '%r7', virtual-reg: '%1' } + - { reg: '%r18', virtual-reg: '%2' } + - { reg: '%r19', virtual-reg: '%3' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 0 + adjustsStack: false + hasCalls: false + maxCallFrameSize: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false +body: | + bb.0.entry: + liveins: %r6, %r7, %r18, %r19 + + %3 = COPY %r19 + %2 = COPY %r18 + %1 = COPY %r7 + %0 = COPY %r6 + %4 = SUB_R %1, %0, 0 + SFSUB_F_RI_LO killed %4, 0, implicit-def %sr + %5 = SELECT %2, %3, 10, implicit %sr + %rv = COPY %5 + RET implicit %rca, implicit %rv + +... +--- +name: test3 +alignment: 2 +exposesReturnsTwice: false +hasInlineAsm: false +allVRegsAllocated: false +isSSA: true +tracksRegLiveness: true +tracksSubRegLiveness: false +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } + - { id: 5, class: gpr } +liveins: + - { reg: '%r6', virtual-reg: '%0' } + - { reg: '%r7', virtual-reg: '%1' } + - { reg: '%r18', virtual-reg: '%2' } + - { reg: '%r19', virtual-reg: '%3' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 0 + adjustsStack: false + hasCalls: false + maxCallFrameSize: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false +body: | + bb.0.entry: + liveins: %r6, %r7, %r18, %r19 + + %3 = COPY %r19 + %2 = COPY %r18 + %1 = COPY %r7 + %0 = COPY %r6 + %4 = SUB_R %1, %0, 0 + SFSUB_F_RI_LO killed %4, 1, implicit-def %sr + %5 = SELECT %2, %3, 13, implicit %sr + %rv = COPY %5 + RET implicit %rca, implicit %rv + +... +--- +name: test4 +alignment: 2 +exposesReturnsTwice: false +hasInlineAsm: false +allVRegsAllocated: false +isSSA: true +tracksRegLiveness: true +tracksSubRegLiveness: false +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } + - { id: 5, class: gpr } + - { id: 6, class: gpr } + - { id: 7, class: gpr } + - { id: 8, class: gpr } + - { id: 9, class: gpr } + - { id: 10, class: gpr } + - { id: 11, class: gpr } + - { id: 12, class: gpr } + - { id: 13, class: gpr } + - { id: 14, class: gpr } + - { id: 15, class: gpr } + - { id: 16, class: gpr } + - { id: 17, class: gpr } + - { id: 18, class: gpr } + - { id: 19, class: gpr } + - { id: 20, class: gpr } + - { id: 21, class: gpr } + - { id: 22, class: gpr } +liveins: + - { reg: '%r6', virtual-reg: '%1' } + - { reg: '%r7', virtual-reg: '%2' } + - { reg: '%r18', virtual-reg: '%3' } + - { reg: '%r19', virtual-reg: '%4' } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 0 + adjustsStack: false + hasCalls: false + maxCallFrameSize: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false +body: | + bb.0.entry: + successors: %bb.4.return, %bb.1.if.end + liveins: %r6, %r7, %r18, %r19 + + %4 = COPY %r19 + %3 = COPY %r18 + %2 = COPY %r7 + %1 = COPY %r6 + SFSUB_F_RI_LO %1, 0, implicit-def %sr + %5 = SCC 6, implicit %sr + SFSUB_F_RR %1, %2, implicit-def %sr + %6 = SCC 4, implicit %sr + %7 = AND_R killed %5, killed %6, 0 + %8 = SLI 1 + %9 = AND_R killed %7, %8, 0 + SFSUB_F_RI_LO killed %9, 0, implicit-def %sr + BRCC %bb.4.return, 6, implicit %sr + BT %bb.1.if.end + + bb.1.if.end: + successors: %bb.4.return, %bb.2.if.end6 + + SFSUB_F_RI_LO %2, 0, implicit-def %sr + %10 = SCC 6, implicit %sr + SFSUB_F_RR %2, %3, implicit-def %sr + %11 = SCC 4, implicit %sr + %12 = AND_R killed %10, killed %11, 0 + %14 = AND_R killed %12, %8, 0 + SFSUB_F_RI_LO killed %14, 0, implicit-def %sr + BRCC %bb.4.return, 6, implicit %sr + BT %bb.2.if.end6 + + bb.2.if.end6: + successors: %bb.4.return, %bb.3.if.end11 + + SFSUB_F_RI_LO %3, 0, implicit-def %sr + %15 = SCC 6, implicit %sr + SFSUB_F_RR %3, %4, implicit-def %sr + %16 = SCC 4, implicit %sr + %17 = AND_R killed %15, killed %16, 0 + %18 = SLI 1 + %19 = AND_R killed %17, killed %18, 0 + SFSUB_F_RI_LO killed %19, 0, implicit-def %sr + BRCC %bb.4.return, 6, implicit %sr + BT %bb.3.if.end11 + + bb.3.if.end11: + %20 = SLI 21 + SFSUB_F_RR %4, %1, implicit-def %sr + %21 = SELECT %2, %20, 4, implicit %sr + SFSUB_F_RI_LO %4, 0, implicit-def %sr + %22 = SELECT killed %21, %20, 6, implicit %sr + %rv = COPY %22 + RET implicit %rca, implicit %rv + + bb.4.return: + %0 = PHI %3, %bb.0.entry, %4, %bb.1.if.end, %1, %bb.2.if.end6 + %rv = COPY %0 + RET implicit %rca, implicit %rv + +... +--- +name: testBB +alignment: 2 +exposesReturnsTwice: false +hasInlineAsm: false +allVRegsAllocated: false +isSSA: true +tracksRegLiveness: true +tracksSubRegLiveness: false +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } + - { id: 5, class: gpr } + - { id: 6, class: gpr } + - { id: 7, class: gpr } + - { id: 8, class: gpr } +frameInfo: + isFrameAddressTaken: false + isReturnAddressTaken: false + hasStackMap: false + hasPatchPoint: false + stackSize: 0 + offsetAdjustment: 0 + maxAlignment: 0 + adjustsStack: false + hasCalls: true + maxCallFrameSize: 0 + hasOpaqueSPAdjustment: false + hasVAStart: false + hasMustTailInVarArgFunc: false +body: | + bb.0.entry: + successors: %bb.3.if.end, %bb.1.if.then + + %1 = MOVHI target-flags(lanai-hi) @a + %2 = OR_I_LO killed %1, target-flags(lanai-lo) @a + %3 = LDW_RI killed %2, 0, 0 :: (load 4 from @a, !tbaa !0) + %4 = MOVHI target-flags(lanai-hi) @b + %5 = OR_I_LO killed %4, target-flags(lanai-lo) @b + %6 = LDW_RI killed %5, 0, 0 :: (load 4 from @b, !tbaa !0) + %0 = SUB_R killed %6, killed %3, 0 + SFSUB_F_RI_LO %0, 0, implicit-def %sr + BRCC %bb.3.if.end, 10, implicit %sr + BT %bb.1.if.then + + bb.1.if.then: + successors: %bb.2.while.body + + ADJCALLSTACKDOWN 0, implicit-def dead %sp, implicit %sp + CALL @g, csr, implicit-def dead %rca, implicit %sp, implicit-def %sp, implicit-def %rv + ADJCALLSTACKUP 0, 0, implicit-def dead %sp, implicit %sp + + bb.2.while.body: + successors: %bb.2.while.body + + BT %bb.2.while.body + + bb.3.if.end: + successors: %bb.4.if.then4, %bb.6.if.end7 + liveins: %sr + + BRCC %bb.6.if.end7, 14, implicit %sr + BT %bb.4.if.then4 + + bb.4.if.then4: + successors: %bb.5.while.body6 + + ADJCALLSTACKDOWN 0, implicit-def dead %sp, implicit %sp + CALL @g, csr, implicit-def dead %rca, implicit %sp, implicit-def %sp, implicit-def %rv + ADJCALLSTACKUP 0, 0, implicit-def dead %sp, implicit %sp + + bb.5.while.body6: + successors: %bb.5.while.body6 + + BT %bb.5.while.body6 + + bb.6.if.end7: + RET implicit %rca + +... diff --git a/test/CodeGen/MIR/Mips/expected-global-value-or-symbol-after-call-entry.mir b/test/CodeGen/MIR/Mips/expected-global-value-or-symbol-after-call-entry.mir index ea94c9906557..cc7a96ff50cc 100644 --- a/test/CodeGen/MIR/Mips/expected-global-value-or-symbol-after-call-entry.mir +++ b/test/CodeGen/MIR/Mips/expected-global-value-or-symbol-after-call-entry.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=mipsel -mattr=mips16 -relocation-model=pic -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i32 @test(i32 %a) { entry: diff --git a/test/CodeGen/MIR/Mips/memory-operands.mir b/test/CodeGen/MIR/Mips/memory-operands.mir index d4206b067f7e..69ecf985fcc0 100644 --- a/test/CodeGen/MIR/Mips/memory-operands.mir +++ b/test/CodeGen/MIR/Mips/memory-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the call entry pseudo source # values in memory operands correctly. @@ -50,8 +50,8 @@ body: | %v0 = SllX16 killed %v0, 16 %v0 = AdduRxRyRz16 killed %v1, killed %v0 ; CHECK-LABEL: name: test - ; CHECK: %v1 = LwRxRyOffMemX16 %v0, @foo, 0 :: (load 4 from call-entry @foo) - %v1 = LwRxRyOffMemX16 %v0, @foo, 0 :: (load 4 from call-entry @foo) + ; CHECK: %v1 = LwRxRyOffMemX16 %v0, @foo :: (load 4 from call-entry @foo) + %v1 = LwRxRyOffMemX16 %v0, @foo :: (load 4 from call-entry @foo) %t9 = COPY %v1 %gp = COPY killed %v0 JumpLinkReg16 killed %v1, csr_o32, implicit-def %ra, implicit killed %t9, implicit %a0, implicit killed %gp, implicit-def %sp, implicit-def dead %v0 @@ -87,13 +87,13 @@ body: | %v0, %v1 = GotPrologue16 $_gp_disp, $_gp_disp %v0 = SllX16 killed %v0, 16 %s0 = AdduRxRyRz16 killed %v1, killed %v0 - %v0 = LwRxRyOffMemX16 %s0, @g, 0 :: (load 4 from call-entry @g) + %v0 = LwRxRyOffMemX16 %s0, @g :: (load 4 from call-entry @g) ; CHECK-LABEL: test2 - ; CHECK: %v1 = LwRxRyOffMemX16 %s0, $__mips16_call_stub_sf_0, 0 :: (load 4 from call-entry $__mips16_call_stub_sf_0) - %v1 = LwRxRyOffMemX16 %s0, $__mips16_call_stub_sf_0, 0 :: (load 4 from call-entry $__mips16_call_stub_sf_0) + ; CHECK: %v1 = LwRxRyOffMemX16 %s0, $__mips16_call_stub_sf_0 :: (load 4 from call-entry $__mips16_call_stub_sf_0) + %v1 = LwRxRyOffMemX16 %s0, $__mips16_call_stub_sf_0 :: (load 4 from call-entry $__mips16_call_stub_sf_0) %gp = COPY %s0 JumpLinkReg16 killed %v1, csr_o32, implicit-def %ra, implicit %v0, implicit killed %gp, implicit-def %sp, implicit-def %v0 - %v1 = LwRxRyOffMemX16 %s0, @__mips16_ret_sf, 0 :: (load 4 from call-entry @__mips16_ret_sf) + %v1 = LwRxRyOffMemX16 %s0, @__mips16_ret_sf :: (load 4 from call-entry @__mips16_ret_sf) %t9 = COPY %v1 %gp = COPY killed %s0 JumpLinkReg16 killed %v1, csr_mips16rethelper, implicit-def %ra, implicit killed %t9, implicit %v0, implicit killed %gp, implicit-def %sp diff --git a/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir b/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir index 28fb2a2cf5c9..d35fd323bf5d 100644 --- a/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir +++ b/test/CodeGen/MIR/NVPTX/expected-floating-point-literal.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=nvptx -mcpu=sm_20 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir b/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir index 18866d58a946..312bf004a9ce 100644 --- a/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir +++ b/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=nvptx -mcpu=sm_20 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses floating point constant operands # correctly. diff --git a/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir b/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir index e4080f80ee52..2ff7f1a9451d 100644 --- a/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir +++ b/test/CodeGen/MIR/NVPTX/floating-point-invalid-type-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=nvptx -mcpu=sm_20 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir b/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir index 39d14e72ffee..3caab2c7a578 100644 --- a/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir +++ b/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=powerpc64-unknown-linux-gnu -start-after machine-combiner -stop-after machine-combiner -o /dev/null %s | FileCheck %s +# RUN: llc -mtriple=powerpc64-unknown-linux-gnu -run-pass none -o - %s | FileCheck %s # PR24724 --- | diff --git a/test/CodeGen/MIR/X86/basic-block-liveins.mir b/test/CodeGen/MIR/X86/basic-block-liveins.mir index 00732975495d..35f5512936ba 100644 --- a/test/CodeGen/MIR/X86/basic-block-liveins.mir +++ b/test/CodeGen/MIR/X86/basic-block-liveins.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses basic block liveins correctly. --- | diff --git a/test/CodeGen/MIR/X86/basic-block-not-at-start-of-line-error.mir b/test/CodeGen/MIR/X86/basic-block-not-at-start-of-line-error.mir index b4b7dddea56c..01c226a34537 100644 --- a/test/CodeGen/MIR/X86/basic-block-not-at-start-of-line-error.mir +++ b/test/CodeGen/MIR/X86/basic-block-not-at-start-of-line-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/block-address-operands.mir b/test/CodeGen/MIR/X86/block-address-operands.mir index 3c2d2aefff20..2207f9360965 100644 --- a/test/CodeGen/MIR/X86/block-address-operands.mir +++ b/test/CodeGen/MIR/X86/block-address-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the block address operands # correctly. diff --git a/test/CodeGen/MIR/X86/callee-saved-info.mir b/test/CodeGen/MIR/X86/callee-saved-info.mir index 17c7739951d9..883f6fdb0d22 100644 --- a/test/CodeGen/MIR/X86/callee-saved-info.mir +++ b/test/CodeGen/MIR/X86/callee-saved-info.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses callee saved information in the # stack objects correctly. diff --git a/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir b/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir index 47051a53e3f4..ed26df684b00 100644 --- a/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir +++ b/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the .cfi_def_cfa_offset operands # correctly. diff --git a/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir b/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir index 74a33b5c3437..9a57eb047b87 100644 --- a/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir +++ b/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the .cfi_def_cfa_register # operands correctly. diff --git a/test/CodeGen/MIR/X86/cfi-offset.mir b/test/CodeGen/MIR/X86/cfi-offset.mir index fd9e605a036a..0a50fe1866f4 100644 --- a/test/CodeGen/MIR/X86/cfi-offset.mir +++ b/test/CodeGen/MIR/X86/cfi-offset.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the .cfi_offset operands # correctly. diff --git a/test/CodeGen/MIR/X86/constant-pool-item-redefinition-error.mir b/test/CodeGen/MIR/X86/constant-pool-item-redefinition-error.mir index 2ddf5736b977..2f016a7599e3 100644 --- a/test/CodeGen/MIR/X86/constant-pool-item-redefinition-error.mir +++ b/test/CodeGen/MIR/X86/constant-pool-item-redefinition-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/constant-pool.mir b/test/CodeGen/MIR/X86/constant-pool.mir index 213e4e283485..3312e6f67bde 100644 --- a/test/CodeGen/MIR/X86/constant-pool.mir +++ b/test/CodeGen/MIR/X86/constant-pool.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses constant pool constants and # constant pool operands correctly. diff --git a/test/CodeGen/MIR/X86/constant-value-error.mir b/test/CodeGen/MIR/X86/constant-value-error.mir index 1e14d2282c5a..baf933a87105 100644 --- a/test/CodeGen/MIR/X86/constant-value-error.mir +++ b/test/CodeGen/MIR/X86/constant-value-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that the MIR parser reports an error when parsing an invalid # constant value. diff --git a/test/CodeGen/MIR/X86/dead-register-flag.mir b/test/CodeGen/MIR/X86/dead-register-flag.mir index 309e776de46a..e6ab458e7389 100644 --- a/test/CodeGen/MIR/X86/dead-register-flag.mir +++ b/test/CodeGen/MIR/X86/dead-register-flag.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the 'dead' register flags # correctly. diff --git a/test/CodeGen/MIR/X86/def-register-already-tied-error.mir b/test/CodeGen/MIR/X86/def-register-already-tied-error.mir index 69c816f59b9b..bd9365b5f416 100644 --- a/test/CodeGen/MIR/X86/def-register-already-tied-error.mir +++ b/test/CodeGen/MIR/X86/def-register-already-tied-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i64 @test(i64 %x) #0 { entry: diff --git a/test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir b/test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir index 7d01810c792b..0c15e84f2268 100644 --- a/test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir +++ b/test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/duplicate-register-flag-error.mir b/test/CodeGen/MIR/X86/duplicate-register-flag-error.mir index d80c6ed061de..9d8f4f159304 100644 --- a/test/CodeGen/MIR/X86/duplicate-register-flag-error.mir +++ b/test/CodeGen/MIR/X86/duplicate-register-flag-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/early-clobber-register-flag.mir b/test/CodeGen/MIR/X86/early-clobber-register-flag.mir index 4dc442e4fb94..0870fa062be6 100644 --- a/test/CodeGen/MIR/X86/early-clobber-register-flag.mir +++ b/test/CodeGen/MIR/X86/early-clobber-register-flag.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the 'early-clobber' register # flags correctly. diff --git a/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir b/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir index f2e349454c5d..f65a5e6c9486 100644 --- a/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir +++ b/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir b/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir index 7ce377f8c5fb..9bde7bf279a9 100644 --- a/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir +++ b/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-basic-block-at-start-of-body.mir b/test/CodeGen/MIR/X86/expected-basic-block-at-start-of-body.mir index 861baec4bcbc..0de5b5bc6878 100644 --- a/test/CodeGen/MIR/X86/expected-basic-block-at-start-of-body.mir +++ b/test/CodeGen/MIR/X86/expected-basic-block-at-start-of-body.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir b/test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir index ef7df4c8c20f..c74d42d4dcc7 100644 --- a/test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir +++ b/test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir b/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir index ba7b2ab64c3e..52ba166094f3 100644 --- a/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir +++ b/test/CodeGen/MIR/X86/expected-comma-after-cfi-register.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir b/test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir index dd5693952573..f617ddfa0eb0 100644 --- a/test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir +++ b/test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir b/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir index 601551a7720a..d96d263a3204 100644 --- a/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir +++ b/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir b/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir index 6494960d3264..bd6cf6bd576d 100644 --- a/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir +++ b/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-from-in-memory-operand.mir b/test/CodeGen/MIR/X86/expected-from-in-memory-operand.mir deleted file mode 100644 index f9e9d0b22968..000000000000 --- a/test/CodeGen/MIR/X86/expected-from-in-memory-operand.mir +++ /dev/null @@ -1,24 +0,0 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s - ---- | - - define i32 @test(i32* %a) { - entry: - %b = load i32, i32* %a - ret i32 %b - } - -... ---- -name: test -tracksRegLiveness: true -liveins: - - { reg: '%rdi' } -body: | - bb.0.entry: - liveins: %rdi - ; CHECK: [[@LINE+1]]:55: expected 'from' - %eax = MOV32rm killed %rdi, 1, _, 0, _ :: (load 4 %ir.a) - RETQ %eax -... - diff --git a/test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir b/test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir index de6a745fd702..2f53023ecdb2 100644 --- a/test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir +++ b/test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir b/test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir index f737c06c3e1e..1cabcfc73c2a 100644 --- a/test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir +++ b/test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir b/test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir index e337292f17a2..f2f354b5a7c9 100644 --- a/test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir +++ b/test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir b/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir index 580d2bc0a419..c3f4fca11eaa 100644 --- a/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir +++ b/test/CodeGen/MIR/X86/expected-integer-after-tied-def.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i64 @test(i64 %x) #0 { entry: diff --git a/test/CodeGen/MIR/X86/expected-integer-in-successor-weight.mir b/test/CodeGen/MIR/X86/expected-integer-in-successor-weight.mir index 83874eb67476..e8f06358505b 100644 --- a/test/CodeGen/MIR/X86/expected-integer-in-successor-weight.mir +++ b/test/CodeGen/MIR/X86/expected-integer-in-successor-weight.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir b/test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir index 8fcd622a18e6..225f767c5558 100644 --- a/test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir +++ b/test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-machine-operand.mir b/test/CodeGen/MIR/X86/expected-machine-operand.mir index 3ba5126b9982..70fff3daa093 100644 --- a/test/CodeGen/MIR/X86/expected-machine-operand.mir +++ b/test/CodeGen/MIR/X86/expected-machine-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir b/test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir index 620bb5d961ee..c5d7d5eb2893 100644 --- a/test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir +++ b/test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | @@ -20,11 +20,10 @@ !llvm.module.flags = !{!9, !10} !llvm.ident = !{!11} - !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0", isOptimized: false, runtimeVersion: 0, emissionKind: 1, enums: !2, retainedTypes: !2, subprograms: !3, globals: !2, imports: !2) + !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2) !1 = !DIFile(filename: "test.ll", directory: "") !2 = !{} - !3 = !{!4} - !4 = distinct !DISubprogram(name: "test", scope: !5, file: !5, line: 4, type: !6, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: false, variables: !2) + !4 = distinct !DISubprogram(name: "test", scope: !5, file: !5, line: 4, type: !6, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2) !5 = !DIFile(filename: "test.c", directory: "") !6 = !DISubroutineType(types: !7) !7 = !{!8, !8} diff --git a/test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir b/test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir index 6497f5db2026..c94fd9f5028e 100644 --- a/test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir +++ b/test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | @@ -20,11 +20,10 @@ !llvm.module.flags = !{!9, !10} !llvm.ident = !{!11} - !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0", isOptimized: false, runtimeVersion: 0, emissionKind: 1, enums: !2, retainedTypes: !2, subprograms: !3, globals: !2, imports: !2) + !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2) !1 = !DIFile(filename: "test.ll", directory: "") !2 = !{} - !3 = !{!4} - !4 = distinct !DISubprogram(name: "test", scope: !5, file: !5, line: 4, type: !6, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: false, variables: !2) + !4 = distinct !DISubprogram(name: "test", scope: !5, file: !5, line: 4, type: !6, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2) !5 = !DIFile(filename: "test.c", directory: "") !6 = !DISubroutineType(types: !7) !7 = !{!8, !8} diff --git a/test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir b/test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir index 9a4696779fb5..dc8cb02338ea 100644 --- a/test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir +++ b/test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i32 @test(i32 %x) { entry: diff --git a/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir b/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir index 04568f6dde57..bba7b1a6e4a0 100644 --- a/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir +++ b/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir b/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir index be57734ecf33..424f7cb21c45 100644 --- a/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir +++ b/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-named-register-in-functions-livein.mir b/test/CodeGen/MIR/X86/expected-named-register-in-functions-livein.mir index ae9f776ad769..a6384bb07197 100644 --- a/test/CodeGen/MIR/X86/expected-named-register-in-functions-livein.mir +++ b/test/CodeGen/MIR/X86/expected-named-register-in-functions-livein.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-named-register-livein.mir b/test/CodeGen/MIR/X86/expected-named-register-livein.mir index 41e6a4a6cc88..fcd68d3f614c 100644 --- a/test/CodeGen/MIR/X86/expected-named-register-livein.mir +++ b/test/CodeGen/MIR/X86/expected-named-register-livein.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-newline-at-end-of-list.mir b/test/CodeGen/MIR/X86/expected-newline-at-end-of-list.mir index 1f0439d126f4..238d7aa6ffb8 100644 --- a/test/CodeGen/MIR/X86/expected-newline-at-end-of-list.mir +++ b/test/CodeGen/MIR/X86/expected-newline-at-end-of-list.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-number-after-bb.mir b/test/CodeGen/MIR/X86/expected-number-after-bb.mir index a239cf176f5f..6770031da807 100644 --- a/test/CodeGen/MIR/X86/expected-number-after-bb.mir +++ b/test/CodeGen/MIR/X86/expected-number-after-bb.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir b/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir index aefeed9ce05e..e3c5ee9b9c88 100644 --- a/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir +++ b/test/CodeGen/MIR/X86/expected-offset-after-cfi-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir b/test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir index fca078c3497c..3d127f855ced 100644 --- a/test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir +++ b/test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir b/test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir index 31b4c5be1251..1119133fc113 100644 --- a/test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir +++ b/test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir b/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir index 3280fca6d551..eea795821465 100644 --- a/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir +++ b/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-register-after-flags.mir b/test/CodeGen/MIR/X86/expected-register-after-flags.mir index 68f1060ad873..dc679ea7fc22 100644 --- a/test/CodeGen/MIR/X86/expected-register-after-flags.mir +++ b/test/CodeGen/MIR/X86/expected-register-after-flags.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that an error is reported when a register operand doesn't # follow register flags. diff --git a/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir b/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir index 71ff15bd9c52..cfa03247e31f 100644 --- a/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir +++ b/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-stack-object.mir b/test/CodeGen/MIR/X86/expected-stack-object.mir index ff0c10d59e33..c536295c42f4 100644 --- a/test/CodeGen/MIR/X86/expected-stack-object.mir +++ b/test/CodeGen/MIR/X86/expected-stack-object.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-subregister-after-colon.mir b/test/CodeGen/MIR/X86/expected-subregister-after-colon.mir index 6283427c10b3..d1d62461d371 100644 --- a/test/CodeGen/MIR/X86/expected-subregister-after-colon.mir +++ b/test/CodeGen/MIR/X86/expected-subregister-after-colon.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-target-flag-name.mir b/test/CodeGen/MIR/X86/expected-target-flag-name.mir index 3d094a11e9f3..c3ee45d96606 100644 --- a/test/CodeGen/MIR/X86/expected-target-flag-name.mir +++ b/test/CodeGen/MIR/X86/expected-target-flag-name.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir b/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir index e8d6afd5333e..9e307f8833d9 100644 --- a/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir +++ b/test/CodeGen/MIR/X86/expected-tied-def-after-lparen.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i64 @test(i64 %x) #0 { entry: diff --git a/test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir b/test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir index f99443f1726d..a76202eb55b4 100644 --- a/test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir +++ b/test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/expected-virtual-register-in-functions-livein.mir b/test/CodeGen/MIR/X86/expected-virtual-register-in-functions-livein.mir index da0d1e166a1c..cdfcabbbf827 100644 --- a/test/CodeGen/MIR/X86/expected-virtual-register-in-functions-livein.mir +++ b/test/CodeGen/MIR/X86/expected-virtual-register-in-functions-livein.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/external-symbol-operands.mir b/test/CodeGen/MIR/X86/external-symbol-operands.mir index 7e85d946b75a..599f957f66d5 100644 --- a/test/CodeGen/MIR/X86/external-symbol-operands.mir +++ b/test/CodeGen/MIR/X86/external-symbol-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the external symbol machine # operands correctly. diff --git a/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir b/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir index 75d0f8a39c1c..f7a48d2eec06 100644 --- a/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir +++ b/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses fixed stack memory operands # correctly. diff --git a/test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir b/test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir index c4c57a1d2443..d1b7c1633c29 100644 --- a/test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir +++ b/test/CodeGen/MIR/X86/fixed-stack-object-redefinition-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/fixed-stack-objects.mir b/test/CodeGen/MIR/X86/fixed-stack-objects.mir index 70e5a7428359..a7ecac841a64 100644 --- a/test/CodeGen/MIR/X86/fixed-stack-objects.mir +++ b/test/CodeGen/MIR/X86/fixed-stack-objects.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses fixed stack objects correctly. --- | diff --git a/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir b/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir index 54fa8ad0b616..2d5347e5d30d 100644 --- a/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir +++ b/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -enable-shrink-wrap=true -start-after shrink-wrap -stop-after shrink-wrap -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the save and restore points in # the machine frame info correctly. diff --git a/test/CodeGen/MIR/X86/frame-info-stack-references.mir b/test/CodeGen/MIR/X86/frame-info-stack-references.mir index c8fa3bbe226f..e64b44c65f81 100644 --- a/test/CodeGen/MIR/X86/frame-info-stack-references.mir +++ b/test/CodeGen/MIR/X86/frame-info-stack-references.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the stack protector stack # object reference in the machine frame info correctly. diff --git a/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir b/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir index 87c1fc68046e..5ae4df459437 100644 --- a/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir +++ b/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the frame setup instruction flag. --- | diff --git a/test/CodeGen/MIR/X86/function-liveins.mir b/test/CodeGen/MIR/X86/function-liveins.mir index 95f8786b47a8..cbdc36281b71 100644 --- a/test/CodeGen/MIR/X86/function-liveins.mir +++ b/test/CodeGen/MIR/X86/function-liveins.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses machine function's liveins # correctly. diff --git a/test/CodeGen/MIR/X86/generic-instr-type-error.mir b/test/CodeGen/MIR/X86/generic-instr-type-error.mir new file mode 100644 index 000000000000..1f196919afa0 --- /dev/null +++ b/test/CodeGen/MIR/X86/generic-instr-type-error.mir @@ -0,0 +1,15 @@ +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s +# This test ensures that the MIR parser report an error for +# opaque types used on generic instruction. + +--- +name: bar +isSSA: true +registers: + - { id: 0, class: gr32 } +body: | + bb.0.entry: + liveins: %edi + ; CHECK: [[@LINE+1]]:20: expected a sized type + %0(32) = G_ADD %opaque %edi, %edi +... diff --git a/test/CodeGen/MIR/X86/generic-virtual-registers.mir b/test/CodeGen/MIR/X86/generic-virtual-registers.mir new file mode 100644 index 000000000000..225ddfbc452a --- /dev/null +++ b/test/CodeGen/MIR/X86/generic-virtual-registers.mir @@ -0,0 +1,48 @@ +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s +# REQUIRES: global-isel +# This test ensures that the MIR parser parses generic virtual +# register definitions correctly. + +--- | + ; ModuleID = 'generic-virtual-registers-type-error.mir' + target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" + %type_alias = type <2 x i32> + %structure_alias = type { i32, i16 } + define void @bar() { + entry: + ret void + } + +... + +--- +name: bar +isSSA: true +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: _ } +# CHECK-NEXT: - { id: 1, class: _ } +# CHECK-NEXT: - { id: 2, class: _ } +# CHECK-NEXT: - { id: 3, class: _ } +# CHECK-NEXT: - { id: 4, class: _ } +registers: + - { id: 0, class: _ } + - { id: 1, class: _ } + - { id: 2, class: _ } + - { id: 3, class: _ } + - { id: 4, class: _ } +body: | + bb.0.entry: + liveins: %edi + ; CHECK: %0(32) = G_ADD i32 %edi + %0(32) = G_ADD i32 %edi, %edi + ; CHECK: %1(64) = G_ADD <2 x i32> %edi + %1(64) = G_ADD <2 x i32> %edi, %edi + ; CHECK: %2(64) = G_ADD <2 x i32> %edi + %2(64) = G_ADD %type_alias %edi, %edi + ; G_ADD is actually not a valid operand for structure type, + ; but that is the only one we have for now for testing. + ; CHECK: %3(64) = G_ADD { i32, i32 } %edi + %3(64) = G_ADD {i32, i32} %edi, %edi + ; CHECK: %4(48) = G_ADD %structure_alias %edi + %4(48) = G_ADD %structure_alias %edi, %edi +... diff --git a/test/CodeGen/MIR/X86/global-value-operands.mir b/test/CodeGen/MIR/X86/global-value-operands.mir index 394aa397aef4..9b9554da7bd6 100644 --- a/test/CodeGen/MIR/X86/global-value-operands.mir +++ b/test/CodeGen/MIR/X86/global-value-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses global value operands correctly. --- | diff --git a/test/CodeGen/MIR/X86/immediate-operands.mir b/test/CodeGen/MIR/X86/immediate-operands.mir index 34bd0fa14904..4d47219bf3b1 100644 --- a/test/CodeGen/MIR/X86/immediate-operands.mir +++ b/test/CodeGen/MIR/X86/immediate-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses immediate machine operands. --- | diff --git a/test/CodeGen/MIR/X86/implicit-register-flag.mir b/test/CodeGen/MIR/X86/implicit-register-flag.mir index b0a15ed93a8f..70b1cc500944 100644 --- a/test/CodeGen/MIR/X86/implicit-register-flag.mir +++ b/test/CodeGen/MIR/X86/implicit-register-flag.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the 'implicit' and 'implicit-def' # register flags correctly. diff --git a/test/CodeGen/MIR/X86/inline-asm-registers.mir b/test/CodeGen/MIR/X86/inline-asm-registers.mir index 3fd565891091..f0e8d1fcd8ff 100644 --- a/test/CodeGen/MIR/X86/inline-asm-registers.mir +++ b/test/CodeGen/MIR/X86/inline-asm-registers.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after block-placement -stop-after block-placement -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s --- | define i64 @test(i64 %x, i64 %y) #0 { diff --git a/test/CodeGen/MIR/X86/instructions-debug-location.mir b/test/CodeGen/MIR/X86/instructions-debug-location.mir index ea2cdbf7cb2f..12ee5d873d94 100644 --- a/test/CodeGen/MIR/X86/instructions-debug-location.mir +++ b/test/CodeGen/MIR/X86/instructions-debug-location.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the machine instruction's # debug location metadata correctly. @@ -31,11 +31,10 @@ !llvm.module.flags = !{!9, !10} !llvm.ident = !{!11} - !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0", isOptimized: false, runtimeVersion: 0, emissionKind: 1, enums: !2, retainedTypes: !2, subprograms: !3, globals: !2, imports: !2) + !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2) !1 = !DIFile(filename: "test.ll", directory: "") !2 = !{} - !3 = !{!4} - !4 = distinct !DISubprogram(name: "test", scope: !5, file: !5, line: 4, type: !6, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: false, variables: !2) + !4 = distinct !DISubprogram(name: "test", scope: !5, file: !5, line: 4, type: !6, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2) !5 = !DIFile(filename: "test.c", directory: "") !6 = !DISubroutineType(types: !7) !7 = !{!8, !8} @@ -62,9 +61,9 @@ stack: body: | bb.0.entry: liveins: %edi - ; CHECK: DBG_VALUE debug-use _, 0, !12, !13, debug-location !14 - ; CHECK: %eax = COPY %0, debug-location !15 - ; CHECK: RETQ %eax, debug-location !15 + ; CHECK: DBG_VALUE debug-use _, 0, !11, !12, debug-location !13 + ; CHECK: %eax = COPY %0, debug-location !14 + ; CHECK: RETQ %eax, debug-location !14 %0 = COPY %edi DBG_VALUE debug-use _, 0, !12, !13, debug-location !14 MOV32mr %stack.0.x.addr, 1, _, 0, _, %0 @@ -86,9 +85,9 @@ body: | liveins: %edi %0 = COPY %edi - ; CHECK: DBG_VALUE _, i32 0, !12, !13 - ; CHECK-NEXT: DBG_VALUE _, i64 -22, !12, !13 - ; CHECK-NEXT: DBG_VALUE _, i128 123492148938512984928424384934328985928, !12, !13 + ; CHECK: DBG_VALUE _, i32 0, !11, !12 + ; CHECK-NEXT: DBG_VALUE _, i64 -22, !11, !12 + ; CHECK-NEXT: DBG_VALUE _, i128 123492148938512984928424384934328985928, !11, !12 DBG_VALUE _, i32 0, !12, !13 DBG_VALUE _, i64 -22, !12, !13 DBG_VALUE _, i128 123492148938512984928424384934328985928, !12, !13 diff --git a/test/CodeGen/MIR/X86/invalid-constant-pool-item.mir b/test/CodeGen/MIR/X86/invalid-constant-pool-item.mir index afd6c78546ce..0b1eb2f5275b 100644 --- a/test/CodeGen/MIR/X86/invalid-constant-pool-item.mir +++ b/test/CodeGen/MIR/X86/invalid-constant-pool-item.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that the MIR parser reports an error when parsing an invalid # constant pool item operand. diff --git a/test/CodeGen/MIR/X86/invalid-metadata-node-type.mir b/test/CodeGen/MIR/X86/invalid-metadata-node-type.mir index a6c2e509da0c..42d05274e7cd 100644 --- a/test/CodeGen/MIR/X86/invalid-metadata-node-type.mir +++ b/test/CodeGen/MIR/X86/invalid-metadata-node-type.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | declare void @llvm.dbg.declare(metadata, metadata, metadata) #0 @@ -6,7 +6,7 @@ entry: %x.i = alloca i8, align 1 %y.i = alloca [256 x i8], align 16 - %0 = bitcast [256 x i8]* %y.i to i8* + %0 = bitcast i8* %x.i to i8* br label %for.body for.body: @@ -22,12 +22,12 @@ !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!3} - !0 = distinct !DICompileUnit(language: DW_LANG_C89, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: 0, enums: !2, retainedTypes: !2) + !0 = distinct !DICompileUnit(language: DW_LANG_C89, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2) !1 = !DIFile(filename: "t.c", directory: "") !2 = !{} !3 = !{i32 1, !"Debug Info Version", i32 3} !4 = !DILocalVariable(name: "x", scope: !5, file: !1, line: 16, type: !6) - !5 = distinct !DISubprogram(scope: null, isLocal: false, isDefinition: true, isOptimized: false) + !5 = distinct !DISubprogram(scope: null, isLocal: false, isDefinition: true, isOptimized: false, unit: !0) !6 = !DIBasicType(name: "char", size: 8, align: 8, encoding: DW_ATE_signed_char) !7 = !DIExpression() !8 = !DILocation(line: 0, scope: !5) diff --git a/test/CodeGen/MIR/X86/invalid-target-flag-name.mir b/test/CodeGen/MIR/X86/invalid-target-flag-name.mir index 313c5bdafed8..1cc9bed2349f 100644 --- a/test/CodeGen/MIR/X86/invalid-target-flag-name.mir +++ b/test/CodeGen/MIR/X86/invalid-target-flag-name.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir b/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir index 00436adca484..2ba3288335fb 100644 --- a/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir +++ b/test/CodeGen/MIR/X86/invalid-tied-def-index-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i64 @test(i64 %x) #0 { entry: diff --git a/test/CodeGen/MIR/X86/jump-table-info.mir b/test/CodeGen/MIR/X86/jump-table-info.mir index a4e6f6a1728c..e44f4b237df4 100644 --- a/test/CodeGen/MIR/X86/jump-table-info.mir +++ b/test/CodeGen/MIR/X86/jump-table-info.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the jump table info and jump # table operands correctly. @@ -62,7 +62,7 @@ name: test_jumptable # CHECK-NEXT: entries: # CHECK-NEXT: - id: 0 # CHECK-NEXT: blocks: [ '%bb.3.lbl1', '%bb.4.lbl2', '%bb.5.lbl3', '%bb.6.lbl4' ] -# CHECK_NEXT: body: +# CHECK-NEXT: body: jumpTable: kind: label-difference32 entries: diff --git a/test/CodeGen/MIR/X86/jump-table-redefinition-error.mir b/test/CodeGen/MIR/X86/jump-table-redefinition-error.mir index d4ab11f40787..1eeabfba8124 100644 --- a/test/CodeGen/MIR/X86/jump-table-redefinition-error.mir +++ b/test/CodeGen/MIR/X86/jump-table-redefinition-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/killed-register-flag.mir b/test/CodeGen/MIR/X86/killed-register-flag.mir index 9e8f3ba3b368..159553ba4829 100644 --- a/test/CodeGen/MIR/X86/killed-register-flag.mir +++ b/test/CodeGen/MIR/X86/killed-register-flag.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the 'killed' register flags # correctly. diff --git a/test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir b/test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir index 93ce30abec7c..3339115c8bdf 100644 --- a/test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir +++ b/test/CodeGen/MIR/X86/large-cfi-offset-number-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/large-immediate-operand-error.mir b/test/CodeGen/MIR/X86/large-immediate-operand-error.mir index f815c63e18e9..0d72690401d4 100644 --- a/test/CodeGen/MIR/X86/large-immediate-operand-error.mir +++ b/test/CodeGen/MIR/X86/large-immediate-operand-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/large-index-number-error.mir b/test/CodeGen/MIR/X86/large-index-number-error.mir index 272cd685b381..f8423fd43e14 100644 --- a/test/CodeGen/MIR/X86/large-index-number-error.mir +++ b/test/CodeGen/MIR/X86/large-index-number-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/large-offset-number-error.mir b/test/CodeGen/MIR/X86/large-offset-number-error.mir index 5463cdbce444..0b2225f15414 100644 --- a/test/CodeGen/MIR/X86/large-offset-number-error.mir +++ b/test/CodeGen/MIR/X86/large-offset-number-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/large-size-in-memory-operand-error.mir b/test/CodeGen/MIR/X86/large-size-in-memory-operand-error.mir index c570f0992a3f..616adfad1eda 100644 --- a/test/CodeGen/MIR/X86/large-size-in-memory-operand-error.mir +++ b/test/CodeGen/MIR/X86/large-size-in-memory-operand-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/liveout-register-mask.mir b/test/CodeGen/MIR/X86/liveout-register-mask.mir index 7ded7287060e..c2a5a34a85ca 100644 --- a/test/CodeGen/MIR/X86/liveout-register-mask.mir +++ b/test/CodeGen/MIR/X86/liveout-register-mask.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after stackmap-liveness -stop-after stackmap-liveness -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the liveout register mask # machine operands correctly. diff --git a/test/CodeGen/MIR/X86/machine-basic-block-operands.mir b/test/CodeGen/MIR/X86/machine-basic-block-operands.mir index 0d7a9f8ef34c..f59157386796 100644 --- a/test/CodeGen/MIR/X86/machine-basic-block-operands.mir +++ b/test/CodeGen/MIR/X86/machine-basic-block-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses machine basic block operands. --- | diff --git a/test/CodeGen/MIR/X86/machine-instructions.mir b/test/CodeGen/MIR/X86/machine-instructions.mir index 0e46d01e0bd1..28d4d47e3e7f 100644 --- a/test/CodeGen/MIR/X86/machine-instructions.mir +++ b/test/CodeGen/MIR/X86/machine-instructions.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses X86 machine instructions # correctly. diff --git a/test/CodeGen/MIR/X86/machine-verifier.mir b/test/CodeGen/MIR/X86/machine-verifier.mir index a7413d4d03bc..c56bab8c998c 100644 --- a/test/CodeGen/MIR/X86/machine-verifier.mir +++ b/test/CodeGen/MIR/X86/machine-verifier.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that the MIR parser runs the machine verifier after parsing. --- | diff --git a/test/CodeGen/MIR/X86/memory-operands.mir b/test/CodeGen/MIR/X86/memory-operands.mir index 3c9463d2f313..a25538d9b1fc 100644 --- a/test/CodeGen/MIR/X86/memory-operands.mir +++ b/test/CodeGen/MIR/X86/memory-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the machine memory operands # correctly. @@ -186,6 +186,9 @@ %0 = load i8*, i8** undef, align 8 ret i8* %0 } + + define void @dummy0() { ret void } + define void @dummy1() { ret void } ... --- name: test @@ -506,3 +509,28 @@ body: | %rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8 from `i8** undef`) RETQ %rax ... +--- +# Test memory operand without associated value. +# CHECK-LABEL: name: dummy0 +# CHECK: %rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8) +name: dummy0 +tracksRegLiveness: true +body: | + bb.0: + %rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8) + RETQ %rax +... +--- +# Test parsing of stack references in machine memory operands. +# CHECK-LABEL: name: dummy1 +# CHECK: %rax = MOV64rm %rsp, 1, _, 0, _ :: (load 8 from %stack.0) +name: dummy1 +tracksRegLiveness: true +stack: + - { id: 0, size: 4, alignment: 4 } +body: | + bb.0: + %rax = MOV64rm %rsp, 1, _, 0, _ :: (load 8 from %stack.0) + RETQ %rax + +... diff --git a/test/CodeGen/MIR/X86/metadata-operands.mir b/test/CodeGen/MIR/X86/metadata-operands.mir index 89a1e6fcb815..42f3fe1c86c7 100644 --- a/test/CodeGen/MIR/X86/metadata-operands.mir +++ b/test/CodeGen/MIR/X86/metadata-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the metadata machine operands # correctly. @@ -22,11 +22,10 @@ !llvm.module.flags = !{!9, !10} !llvm.ident = !{!11} - !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0", isOptimized: false, runtimeVersion: 0, emissionKind: 1, enums: !2, retainedTypes: !2, subprograms: !3, globals: !2, imports: !2) + !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2) !1 = !DIFile(filename: "test.ll", directory: "") !2 = !{} - !3 = !{!4} - !4 = distinct !DISubprogram(name: "test", scope: !5, file: !5, line: 4, type: !6, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: false, variables: !2) + !4 = distinct !DISubprogram(name: "test", scope: !5, file: !5, line: 4, type: !6, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2) !5 = !DIFile(filename: "test.c", directory: "") !6 = !DISubroutineType(types: !7) !7 = !{!8, !8} @@ -54,7 +53,7 @@ body: | bb.0.entry: liveins: %edi ; CHECK: %0 = COPY %edi - ; CHECK-NEXT: DBG_VALUE _, 0, !12, !13 + ; CHECK-NEXT: DBG_VALUE _, 0, !11, !12 %0 = COPY %edi DBG_VALUE _, 0, !12, ! 13 MOV32mr %stack.0.x.addr, 1, _, 0, _, %0 diff --git a/test/CodeGen/MIR/X86/missing-closing-quote.mir b/test/CodeGen/MIR/X86/missing-closing-quote.mir index 9f4b369a3df4..0e912f5ea788 100644 --- a/test/CodeGen/MIR/X86/missing-closing-quote.mir +++ b/test/CodeGen/MIR/X86/missing-closing-quote.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/missing-comma.mir b/test/CodeGen/MIR/X86/missing-comma.mir index 092995e59c70..0aaba6ddaa3a 100644 --- a/test/CodeGen/MIR/X86/missing-comma.mir +++ b/test/CodeGen/MIR/X86/missing-comma.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/missing-implicit-operand.mir b/test/CodeGen/MIR/X86/missing-implicit-operand.mir index 0135c756e138..fd26f19d1847 100644 --- a/test/CodeGen/MIR/X86/missing-implicit-operand.mir +++ b/test/CodeGen/MIR/X86/missing-implicit-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that the MIR parser reports an error when an instruction # is missing one of its implicit register operands. diff --git a/test/CodeGen/MIR/X86/named-registers.mir b/test/CodeGen/MIR/X86/named-registers.mir index e547c326563e..eedc2dbe853f 100644 --- a/test/CodeGen/MIR/X86/named-registers.mir +++ b/test/CodeGen/MIR/X86/named-registers.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses X86 registers correctly. --- | diff --git a/test/CodeGen/MIR/X86/newline-handling.mir b/test/CodeGen/MIR/X86/newline-handling.mir index bce06d540114..ce43a83ecae5 100644 --- a/test/CodeGen/MIR/X86/newline-handling.mir +++ b/test/CodeGen/MIR/X86/newline-handling.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/null-register-operands.mir b/test/CodeGen/MIR/X86/null-register-operands.mir index 5563ef8e8f75..9cba00bc9e5e 100644 --- a/test/CodeGen/MIR/X86/null-register-operands.mir +++ b/test/CodeGen/MIR/X86/null-register-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses null register operands correctly. --- | diff --git a/test/CodeGen/MIR/X86/register-mask-operands.mir b/test/CodeGen/MIR/X86/register-mask-operands.mir index 9fa4e6e3994e..c683a635f147 100644 --- a/test/CodeGen/MIR/X86/register-mask-operands.mir +++ b/test/CodeGen/MIR/X86/register-mask-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses register mask operands correctly. --- | diff --git a/test/CodeGen/MIR/X86/register-operands-target-flag-error.mir b/test/CodeGen/MIR/X86/register-operands-target-flag-error.mir index 64d46d20db74..d4d3f5692e90 100644 --- a/test/CodeGen/MIR/X86/register-operands-target-flag-error.mir +++ b/test/CodeGen/MIR/X86/register-operands-target-flag-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir b/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir index d7e76329be73..27ca266f7794 100644 --- a/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir +++ b/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses simple register allocation hints # correctly. diff --git a/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir b/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir index b62cd755fec1..5e191ba11942 100644 --- a/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir +++ b/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-aliased.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir b/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir index c89216bea67a..91288aa40b39 100644 --- a/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir +++ b/test/CodeGen/MIR/X86/spill-slot-fixed-stack-object-immutable.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir b/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir index 7e13a26f0b68..1771d6fafcae 100644 --- a/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir +++ b/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses fixed stack objects correctly. --- | diff --git a/test/CodeGen/MIR/X86/stack-object-debug-info.mir b/test/CodeGen/MIR/X86/stack-object-debug-info.mir index 509b196416fd..d80b7d0bfcb1 100644 --- a/test/CodeGen/MIR/X86/stack-object-debug-info.mir +++ b/test/CodeGen/MIR/X86/stack-object-debug-info.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the stack object's debug info # correctly. --- | @@ -31,15 +31,18 @@ !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!3} - !0 = distinct !DICompileUnit(language: DW_LANG_C89, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: 0, enums: !2, retainedTypes: !2) + !0 = distinct !DICompileUnit(language: DW_LANG_C89, file: !1, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2) !1 = !DIFile(filename: "t.c", directory: "") !2 = !{} !3 = !{i32 1, !"Debug Info Version", i32 3} - !4 = !DILocalVariable(name: "x", scope: !5, file: !1, line: 16, type: !6) - !5 = distinct !DISubprogram(scope: null, isLocal: false, isDefinition: true, isOptimized: false) + !4 = !DILocalVariable(name: "x", scope: !5, file: !1, line: 16, type: !9) + !5 = distinct !DISubprogram(scope: null, isLocal: false, isDefinition: true, isOptimized: false, unit: !0) !6 = !DIBasicType(name: "char", size: 8, align: 8, encoding: DW_ATE_signed_char) !7 = !DIExpression() !8 = !DILocation(line: 0, scope: !5) + !9 = !DICompositeType(tag: DW_TAG_array_type, baseType: !6, size: 2048, align: 8, elements: !10) + !10 = !{!11} + !11 = !DISubrange(count: 256) ... --- name: foo @@ -50,7 +53,7 @@ frameInfo: # CHECK-LABEL: foo # CHECK: stack: # CHECK: - { id: 0, name: y.i, offset: 0, size: 256, alignment: 16, di-variable: '!4', -# CHECK-NEXT: di-expression: '!7', di-location: '!8' } +# CHECK-NEXT: di-expression: '!10', di-location: '!11' } stack: - { id: 0, name: y.i, offset: 0, size: 256, alignment: 16, di-variable: '!4', di-expression: '!7', di-location: '!8' } diff --git a/test/CodeGen/MIR/X86/stack-object-invalid-name.mir b/test/CodeGen/MIR/X86/stack-object-invalid-name.mir index e42e1e59f1e7..4572f106256d 100644 --- a/test/CodeGen/MIR/X86/stack-object-invalid-name.mir +++ b/test/CodeGen/MIR/X86/stack-object-invalid-name.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that the MIR parser reports an error when it encounters a # stack object with a name that can't be associated with an alloca instruction. diff --git a/test/CodeGen/MIR/X86/stack-object-operand-name-mismatch-error.mir b/test/CodeGen/MIR/X86/stack-object-operand-name-mismatch-error.mir index 46661d95e727..2115a11ae693 100644 --- a/test/CodeGen/MIR/X86/stack-object-operand-name-mismatch-error.mir +++ b/test/CodeGen/MIR/X86/stack-object-operand-name-mismatch-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that an error is reported when an stack object reference # uses a different name then the stack object definition. diff --git a/test/CodeGen/MIR/X86/stack-object-operands.mir b/test/CodeGen/MIR/X86/stack-object-operands.mir index fce5bf717d1a..6ff15aef4d7f 100644 --- a/test/CodeGen/MIR/X86/stack-object-operands.mir +++ b/test/CodeGen/MIR/X86/stack-object-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses stack object machine operands # correctly. diff --git a/test/CodeGen/MIR/X86/stack-object-redefinition-error.mir b/test/CodeGen/MIR/X86/stack-object-redefinition-error.mir index b84863ebca67..0fccff0425ee 100644 --- a/test/CodeGen/MIR/X86/stack-object-redefinition-error.mir +++ b/test/CodeGen/MIR/X86/stack-object-redefinition-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/stack-objects.mir b/test/CodeGen/MIR/X86/stack-objects.mir index bdd911075da0..08b9ec0b4347 100644 --- a/test/CodeGen/MIR/X86/stack-objects.mir +++ b/test/CodeGen/MIR/X86/stack-objects.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses stack objects correctly. --- | diff --git a/test/CodeGen/MIR/X86/standalone-register-error.mir b/test/CodeGen/MIR/X86/standalone-register-error.mir index f17451bfc89c..b50393390289 100644 --- a/test/CodeGen/MIR/X86/standalone-register-error.mir +++ b/test/CodeGen/MIR/X86/standalone-register-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i32 @test(i32 %a) { body: diff --git a/test/CodeGen/MIR/X86/subreg-on-physreg.mir b/test/CodeGen/MIR/X86/subreg-on-physreg.mir new file mode 100644 index 000000000000..f20195e7ddf5 --- /dev/null +++ b/test/CodeGen/MIR/X86/subreg-on-physreg.mir @@ -0,0 +1,12 @@ +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s +# This test ensures that an error is reported for subreg index on a physreg. +--- | + define void @t() { ret void } +... +--- +name: t +body: | + bb.0: + ; CHECK: [[@LINE+1]]:19: subregister index expects a virtual register + %eax:sub_8bit = COPY %bl +... diff --git a/test/CodeGen/MIR/X86/subregister-index-operands.mir b/test/CodeGen/MIR/X86/subregister-index-operands.mir new file mode 100644 index 000000000000..a9a45adadf6e --- /dev/null +++ b/test/CodeGen/MIR/X86/subregister-index-operands.mir @@ -0,0 +1,32 @@ +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s +# This test ensures that the MIR parser parses and prints subregisters index +# operands correctly. + +--- | + + define zeroext i1 @t(i1 %c) { + entry: + ret i1 %c + } + +... +--- +# CHECK-LABEL: name: t +# CHECK: %0 = INSERT_SUBREG %edi, %al, {{[0-9]+}} +# CHECK: %1 = EXTRACT_SUBREG %eax, {{[0-9]+}} +# CHECK: %ax = REG_SEQUENCE %1, {{[0-9]+}}, %1, {{[0-9]+}} +name: t +isSSA: true +tracksRegLiveness: true +registers: + - { id: 0, class: gr32 } + - { id: 1, class: gr8 } +body: | + bb.0.entry: + liveins: %edi, %eax + %0 = INSERT_SUBREG %edi, %al, %subreg.sub_8bit + %1 = EXTRACT_SUBREG %eax, %subreg.sub_8bit_hi + %ax = REG_SEQUENCE %1, %subreg.sub_8bit, %1, %subreg.sub_8bit_hi + RETQ %ax +... + diff --git a/test/CodeGen/MIR/X86/subregister-operands.mir b/test/CodeGen/MIR/X86/subregister-operands.mir index 8a3fcf69aca6..a02bfe8359dc 100644 --- a/test/CodeGen/MIR/X86/subregister-operands.mir +++ b/test/CodeGen/MIR/X86/subregister-operands.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses subregisters in register operands # correctly. diff --git a/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir b/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir index 64af6121189a..8de31f3274df 100644 --- a/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir +++ b/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses basic block successors and # probabilities correctly. diff --git a/test/CodeGen/MIR/X86/successor-basic-blocks.mir b/test/CodeGen/MIR/X86/successor-basic-blocks.mir index a6c14f70bc7c..6f15f522bd5f 100644 --- a/test/CodeGen/MIR/X86/successor-basic-blocks.mir +++ b/test/CodeGen/MIR/X86/successor-basic-blocks.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses basic block successors correctly. --- | diff --git a/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir b/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir index fe5263df355f..05502fff4062 100644 --- a/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir +++ b/test/CodeGen/MIR/X86/tied-def-operand-invalid.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i64 @test(i64 %x) #0 { entry: diff --git a/test/CodeGen/MIR/X86/undef-register-flag.mir b/test/CodeGen/MIR/X86/undef-register-flag.mir index 0b26c528aee1..2c332d848bbc 100644 --- a/test/CodeGen/MIR/X86/undef-register-flag.mir +++ b/test/CodeGen/MIR/X86/undef-register-flag.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the 'undef' register flags # correctly. diff --git a/test/CodeGen/MIR/X86/undefined-fixed-stack-object.mir b/test/CodeGen/MIR/X86/undefined-fixed-stack-object.mir index 8d8f8614f32b..18cb758408ff 100644 --- a/test/CodeGen/MIR/X86/undefined-fixed-stack-object.mir +++ b/test/CodeGen/MIR/X86/undefined-fixed-stack-object.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i32 @test(i32 %a) { diff --git a/test/CodeGen/MIR/X86/undefined-global-value.mir b/test/CodeGen/MIR/X86/undefined-global-value.mir index f82c626397a9..e717c1ee5976 100644 --- a/test/CodeGen/MIR/X86/undefined-global-value.mir +++ b/test/CodeGen/MIR/X86/undefined-global-value.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that an error is reported when an invalid global value index # is used. diff --git a/test/CodeGen/MIR/X86/undefined-ir-block-in-blockaddress.mir b/test/CodeGen/MIR/X86/undefined-ir-block-in-blockaddress.mir index f6b10e3123ca..5c2a45eec2a1 100644 --- a/test/CodeGen/MIR/X86/undefined-ir-block-in-blockaddress.mir +++ b/test/CodeGen/MIR/X86/undefined-ir-block-in-blockaddress.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/undefined-ir-block-slot-in-blockaddress.mir b/test/CodeGen/MIR/X86/undefined-ir-block-slot-in-blockaddress.mir index 0b3c0093dc62..ef7dd4802aca 100644 --- a/test/CodeGen/MIR/X86/undefined-ir-block-slot-in-blockaddress.mir +++ b/test/CodeGen/MIR/X86/undefined-ir-block-slot-in-blockaddress.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/undefined-jump-table-id.mir b/test/CodeGen/MIR/X86/undefined-jump-table-id.mir index b463dc4bd9f4..765bb9d97d19 100644 --- a/test/CodeGen/MIR/X86/undefined-jump-table-id.mir +++ b/test/CodeGen/MIR/X86/undefined-jump-table-id.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/undefined-named-global-value.mir b/test/CodeGen/MIR/X86/undefined-named-global-value.mir index a1ada4b42e46..435257b8fac1 100644 --- a/test/CodeGen/MIR/X86/undefined-named-global-value.mir +++ b/test/CodeGen/MIR/X86/undefined-named-global-value.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that an error is reported when an undefined global value is # used. diff --git a/test/CodeGen/MIR/X86/undefined-register-class.mir b/test/CodeGen/MIR/X86/undefined-register-class.mir index 348f6af5c44f..70b413b5ad37 100644 --- a/test/CodeGen/MIR/X86/undefined-register-class.mir +++ b/test/CodeGen/MIR/X86/undefined-register-class.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that the MIR parser reports an error when it encounters an # unknown register class. @@ -15,7 +15,7 @@ name: test isSSA: true tracksRegLiveness: true registers: - # CHECK: [[@LINE+1]]:20: use of undefined register class 'gr3200' + # CHECK: [[@LINE+1]]:20: use of undefined register class or register bank 'gr3200' - {id: 0, class: 'gr3200'} body: | bb.0.entry: diff --git a/test/CodeGen/MIR/X86/undefined-stack-object.mir b/test/CodeGen/MIR/X86/undefined-stack-object.mir index 416e6789ba0f..5d40791b4c31 100644 --- a/test/CodeGen/MIR/X86/undefined-stack-object.mir +++ b/test/CodeGen/MIR/X86/undefined-stack-object.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i32 @test(i32 %a) { diff --git a/test/CodeGen/MIR/X86/undefined-value-in-memory-operand.mir b/test/CodeGen/MIR/X86/undefined-value-in-memory-operand.mir index a3907d7a3a4a..42e94c1ce5a3 100644 --- a/test/CodeGen/MIR/X86/undefined-value-in-memory-operand.mir +++ b/test/CodeGen/MIR/X86/undefined-value-in-memory-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/undefined-virtual-register.mir b/test/CodeGen/MIR/X86/undefined-virtual-register.mir index 2f9a304ffe5c..fe41e0a4d2fc 100644 --- a/test/CodeGen/MIR/X86/undefined-virtual-register.mir +++ b/test/CodeGen/MIR/X86/undefined-virtual-register.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that the MIR parser reports an error when parsing a # reference to an undefined virtual register. diff --git a/test/CodeGen/MIR/X86/unknown-instruction.mir b/test/CodeGen/MIR/X86/unknown-instruction.mir index cec354948832..4377347f0a9f 100644 --- a/test/CodeGen/MIR/X86/unknown-instruction.mir +++ b/test/CodeGen/MIR/X86/unknown-instruction.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that an error is reported when an unknown instruction is # encountered. diff --git a/test/CodeGen/MIR/X86/unknown-machine-basic-block.mir b/test/CodeGen/MIR/X86/unknown-machine-basic-block.mir index a512d9aa08e6..0634fb2e0ed8 100644 --- a/test/CodeGen/MIR/X86/unknown-machine-basic-block.mir +++ b/test/CodeGen/MIR/X86/unknown-machine-basic-block.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that an error is reported when an invalid machine basic # block index is used. diff --git a/test/CodeGen/MIR/X86/unknown-metadata-keyword.mir b/test/CodeGen/MIR/X86/unknown-metadata-keyword.mir index c58c38ab1322..ddd5686b0cf3 100644 --- a/test/CodeGen/MIR/X86/unknown-metadata-keyword.mir +++ b/test/CodeGen/MIR/X86/unknown-metadata-keyword.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i32 @inc(i32* %x) { diff --git a/test/CodeGen/MIR/X86/unknown-metadata-node.mir b/test/CodeGen/MIR/X86/unknown-metadata-node.mir index 958a30678be1..793f9123776a 100644 --- a/test/CodeGen/MIR/X86/unknown-metadata-node.mir +++ b/test/CodeGen/MIR/X86/unknown-metadata-node.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | @@ -20,11 +20,10 @@ !llvm.module.flags = !{!9, !10} !llvm.ident = !{!11} - !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0", isOptimized: false, runtimeVersion: 0, emissionKind: 1, enums: !2, retainedTypes: !2, subprograms: !3, globals: !2, imports: !2) + !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2) !1 = !DIFile(filename: "test.ll", directory: "") !2 = !{} - !3 = !{!4} - !4 = distinct !DISubprogram(name: "test", scope: !5, file: !5, line: 4, type: !6, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: false, variables: !2) + !4 = distinct !DISubprogram(name: "test", scope: !5, file: !5, line: 4, type: !6, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2) !5 = !DIFile(filename: "test.c", directory: "") !6 = !DISubroutineType(types: !7) !7 = !{!8, !8} diff --git a/test/CodeGen/MIR/X86/unknown-named-machine-basic-block.mir b/test/CodeGen/MIR/X86/unknown-named-machine-basic-block.mir index 6627273d4470..5ba6402353ef 100644 --- a/test/CodeGen/MIR/X86/unknown-named-machine-basic-block.mir +++ b/test/CodeGen/MIR/X86/unknown-named-machine-basic-block.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that an error is reported when an unknown named machine # basic block is encountered. diff --git a/test/CodeGen/MIR/X86/unknown-register.mir b/test/CodeGen/MIR/X86/unknown-register.mir index da0798ca1b52..74e9bfa72157 100644 --- a/test/CodeGen/MIR/X86/unknown-register.mir +++ b/test/CodeGen/MIR/X86/unknown-register.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that an error is reported when an unknown register is # encountered. diff --git a/test/CodeGen/MIR/X86/unknown-subregister-index-op.mir b/test/CodeGen/MIR/X86/unknown-subregister-index-op.mir new file mode 100644 index 000000000000..2d997b07dbd5 --- /dev/null +++ b/test/CodeGen/MIR/X86/unknown-subregister-index-op.mir @@ -0,0 +1,26 @@ +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s +# This test ensures that an error is reported when an unknown subregister index +# is encountered. + +--- | + + define zeroext i1 @t(i1 %c) { + entry: + ret i1 %c + } + +... +--- +name: t +isSSA: true +tracksRegLiveness: true +registers: + - { id: 0, class: gr32 } + - { id: 1, class: gr8 } + - { id: 2, class: gr8 } +body: | + bb.0.entry: + ; CHECK: [[@LINE+1]]:35: unknown subregister index 'bit8' + %0 = INSERT_SUBREG %edi, %al, %subreg.bit8 + RETQ %0 +... diff --git a/test/CodeGen/MIR/X86/unknown-subregister-index.mir b/test/CodeGen/MIR/X86/unknown-subregister-index.mir index 5dde34561236..6ad6242f79a3 100644 --- a/test/CodeGen/MIR/X86/unknown-subregister-index.mir +++ b/test/CodeGen/MIR/X86/unknown-subregister-index.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s # This test ensures that an error is reported when an unknown subregister index # is encountered. diff --git a/test/CodeGen/MIR/X86/unrecognized-character.mir b/test/CodeGen/MIR/X86/unrecognized-character.mir index cf99028677fa..4b6631099716 100644 --- a/test/CodeGen/MIR/X86/unrecognized-character.mir +++ b/test/CodeGen/MIR/X86/unrecognized-character.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/used-physical-register-info.mir b/test/CodeGen/MIR/X86/used-physical-register-info.mir index 9a81578703e0..9edc4113b279 100644 --- a/test/CodeGen/MIR/X86/used-physical-register-info.mir +++ b/test/CodeGen/MIR/X86/used-physical-register-info.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses the callee saved register mask # correctly and that the MIR parser can infer it as well. diff --git a/test/CodeGen/MIR/X86/variable-sized-stack-object-size-error.mir b/test/CodeGen/MIR/X86/variable-sized-stack-object-size-error.mir index e6a9ef8d4c88..2633ea59bf55 100644 --- a/test/CodeGen/MIR/X86/variable-sized-stack-object-size-error.mir +++ b/test/CodeGen/MIR/X86/variable-sized-stack-object-size-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | define i32 @test(i32 %a) { diff --git a/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir b/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir index a58be69ae046..5e7d99352e57 100644 --- a/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir +++ b/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses variable sized stack objects # correctly. diff --git a/test/CodeGen/MIR/X86/virtual-register-redefinition-error.mir b/test/CodeGen/MIR/X86/virtual-register-redefinition-error.mir index 5dae6e666c83..4d2350a01b8d 100644 --- a/test/CodeGen/MIR/X86/virtual-register-redefinition-error.mir +++ b/test/CodeGen/MIR/X86/virtual-register-redefinition-error.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | diff --git a/test/CodeGen/MIR/X86/virtual-registers.mir b/test/CodeGen/MIR/X86/virtual-registers.mir index 93c2fea6fd95..3f7b0fdcc0e3 100644 --- a/test/CodeGen/MIR/X86/virtual-registers.mir +++ b/test/CodeGen/MIR/X86/virtual-registers.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s # This test ensures that the MIR parser parses virtual register definitions and # references correctly. diff --git a/test/CodeGen/MIR/lit.local.cfg b/test/CodeGen/MIR/lit.local.cfg deleted file mode 100644 index e69aa5765356..000000000000 --- a/test/CodeGen/MIR/lit.local.cfg +++ /dev/null @@ -1,2 +0,0 @@ -config.suffixes = ['.mir'] - |