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Diffstat (limited to 'test/CodeGen/Mips/msa/basic_operations_float.ll')
-rw-r--r--test/CodeGen/Mips/msa/basic_operations_float.ll160
1 files changed, 141 insertions, 19 deletions
diff --git a/test/CodeGen/Mips/msa/basic_operations_float.ll b/test/CodeGen/Mips/msa/basic_operations_float.ll
index 1f538108a1fa..a0c9d29e231a 100644
--- a/test/CodeGen/Mips/msa/basic_operations_float.ll
+++ b/test/CodeGen/Mips/msa/basic_operations_float.ll
@@ -3,11 +3,12 @@
@v4f32 = global <4 x float> <float 0.0, float 0.0, float 0.0, float 0.0>
@v2f64 = global <2 x double> <double 0.0, double 0.0>
+@i32 = global i32 0
@f32 = global float 0.0
@f64 = global double 0.0
define void @const_v4f32() nounwind {
- ; MIPS32: const_v4f32:
+ ; MIPS32-LABEL: const_v4f32:
store volatile <4 x float> <float 0.0, float 0.0, float 0.0, float 0.0>, <4 x float>*@v4f32
; MIPS32: ldi.b [[R1:\$w[0-9]+]], 0
@@ -17,7 +18,8 @@ define void @const_v4f32() nounwind {
; MIPS32: fill.w [[R2:\$w[0-9]+]], [[R1]]
store volatile <4 x float> <float 1.0, float 1.0, float 1.0, float 31.0>, <4 x float>*@v4f32
- ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
+ ; MIPS32: addiu [[G_PTR:\$[0-9]+]], {{.*}}, %lo($
+ ; MIPS32: ld.w [[R1:\$w[0-9]+]], 0([[G_PTR]])
store volatile <4 x float> <float 65537.0, float 65537.0, float 65537.0, float 65537.0>, <4 x float>*@v4f32
; MIPS32: lui [[R1:\$[0-9]+]], 18304
@@ -25,45 +27,53 @@ define void @const_v4f32() nounwind {
; MIPS32: fill.w [[R3:\$w[0-9]+]], [[R2]]
store volatile <4 x float> <float 1.0, float 2.0, float 1.0, float 2.0>, <4 x float>*@v4f32
- ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
+ ; MIPS32: addiu [[G_PTR:\$[0-9]+]], {{.*}}, %lo($
+ ; MIPS32: ld.w [[R1:\$w[0-9]+]], 0([[G_PTR]])
store volatile <4 x float> <float 3.0, float 4.0, float 5.0, float 6.0>, <4 x float>*@v4f32
- ; MIPS32: ld.w [[R1:\$w[0-9]+]], %lo(
+ ; MIPS32: addiu [[G_PTR:\$[0-9]+]], {{.*}}, %lo($
+ ; MIPS32: ld.w [[R1:\$w[0-9]+]], 0([[G_PTR]])
ret void
; MIPS32: .size const_v4f32
}
define void @const_v2f64() nounwind {
- ; MIPS32: const_v2f64:
+ ; MIPS32-LABEL: const_v2f64:
store volatile <2 x double> <double 0.0, double 0.0>, <2 x double>*@v2f64
; MIPS32: ldi.b [[R1:\$w[0-9]+]], 0
store volatile <2 x double> <double 72340172838076673.0, double 72340172838076673.0>, <2 x double>*@v2f64
- ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
+ ; MIPS32: addiu [[G_PTR:\$[0-9]+]], {{.*}}, %lo($
+ ; MIPS32: ld.d [[R1:\$w[0-9]+]], 0([[G_PTR]])
store volatile <2 x double> <double 281479271743489.0, double 281479271743489.0>, <2 x double>*@v2f64
- ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
+ ; MIPS32: addiu [[G_PTR:\$[0-9]+]], {{.*}}, %lo($
+ ; MIPS32: ld.d [[R1:\$w[0-9]+]], 0([[G_PTR]])
store volatile <2 x double> <double 4294967297.0, double 4294967297.0>, <2 x double>*@v2f64
- ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
+ ; MIPS32: addiu [[G_PTR:\$[0-9]+]], {{.*}}, %lo($
+ ; MIPS32: ld.d [[R1:\$w[0-9]+]], 0([[G_PTR]])
store volatile <2 x double> <double 1.0, double 1.0>, <2 x double>*@v2f64
- ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
+ ; MIPS32: addiu [[G_PTR:\$[0-9]+]], {{.*}}, %lo($
+ ; MIPS32: ld.d [[R1:\$w[0-9]+]], 0([[G_PTR]])
store volatile <2 x double> <double 1.0, double 31.0>, <2 x double>*@v2f64
- ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
+ ; MIPS32: addiu [[G_PTR:\$[0-9]+]], {{.*}}, %lo($
+ ; MIPS32: ld.d [[R1:\$w[0-9]+]], 0([[G_PTR]])
store volatile <2 x double> <double 3.0, double 4.0>, <2 x double>*@v2f64
- ; MIPS32: ld.d [[R1:\$w[0-9]+]], %lo(
+ ; MIPS32: addiu [[G_PTR:\$[0-9]+]], {{.*}}, %lo($
+ ; MIPS32: ld.d [[R1:\$w[0-9]+]], 0([[G_PTR]])
ret void
; MIPS32: .size const_v2f64
}
define void @nonconst_v4f32() nounwind {
- ; MIPS32: nonconst_v4f32:
+ ; MIPS32-LABEL: nonconst_v4f32:
%1 = load float *@f32
%2 = insertelement <4 x float> undef, float %1, i32 0
@@ -79,7 +89,7 @@ define void @nonconst_v4f32() nounwind {
}
define void @nonconst_v2f64() nounwind {
- ; MIPS32: nonconst_v2f64:
+ ; MIPS32-LABEL: nonconst_v2f64:
%1 = load double *@f64
%2 = insertelement <2 x double> undef, double %1, i32 0
@@ -93,7 +103,7 @@ define void @nonconst_v2f64() nounwind {
}
define float @extract_v4f32() nounwind {
- ; MIPS32: extract_v4f32:
+ ; MIPS32-LABEL: extract_v4f32:
%1 = load <4 x float>* @v4f32
; MIPS32-DAG: ld.w [[R1:\$w[0-9]+]],
@@ -111,7 +121,7 @@ define float @extract_v4f32() nounwind {
}
define float @extract_v4f32_elt0() nounwind {
- ; MIPS32: extract_v4f32_elt0:
+ ; MIPS32-LABEL: extract_v4f32_elt0:
%1 = load <4 x float>* @v4f32
; MIPS32-DAG: ld.w [[R1:\$w[0-9]+]],
@@ -128,8 +138,47 @@ define float @extract_v4f32_elt0() nounwind {
; MIPS32: .size extract_v4f32_elt0
}
+define float @extract_v4f32_elt2() nounwind {
+ ; MIPS32-LABEL: extract_v4f32_elt2:
+
+ %1 = load <4 x float>* @v4f32
+ ; MIPS32-DAG: ld.w [[R1:\$w[0-9]+]],
+
+ %2 = fadd <4 x float> %1, %1
+ ; MIPS32-DAG: fadd.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
+
+ %3 = extractelement <4 x float> %2, i32 2
+ ; Element 2 can be obtained by splatting it across the vector and extracting
+ ; $w0:sub_lo
+ ; MIPS32-DAG: splati.w $w0, [[R1]][2]
+
+ ret float %3
+ ; MIPS32: .size extract_v4f32_elt2
+}
+
+define float @extract_v4f32_vidx() nounwind {
+ ; MIPS32-LABEL: extract_v4f32_vidx:
+
+ %1 = load <4 x float>* @v4f32
+ ; MIPS32-DAG: lw [[PTR_V:\$[0-9]+]], %got(v4f32)(
+ ; MIPS32-DAG: ld.w [[R1:\$w[0-9]+]], 0([[PTR_V]])
+
+ %2 = fadd <4 x float> %1, %1
+ ; MIPS32-DAG: fadd.w [[R2:\$w[0-9]+]], [[R1]], [[R1]]
+
+ %3 = load i32* @i32
+ ; MIPS32-DAG: lw [[PTR_I:\$[0-9]+]], %got(i32)(
+ ; MIPS32-DAG: lw [[IDX:\$[0-9]+]], 0([[PTR_I]])
+
+ %4 = extractelement <4 x float> %2, i32 %3
+ ; MIPS32-DAG: splat.w $w0, [[R1]]{{\[}}[[IDX]]]
+
+ ret float %4
+ ; MIPS32: .size extract_v4f32_vidx
+}
+
define double @extract_v2f64() nounwind {
- ; MIPS32: extract_v2f64:
+ ; MIPS32-LABEL: extract_v2f64:
%1 = load <2 x double>* @v2f64
; MIPS32-DAG: ld.d [[R1:\$w[0-9]+]],
@@ -152,7 +201,7 @@ define double @extract_v2f64() nounwind {
}
define double @extract_v2f64_elt0() nounwind {
- ; MIPS32: extract_v2f64_elt0:
+ ; MIPS32-LABEL: extract_v2f64_elt0:
%1 = load <2 x double>* @v2f64
; MIPS32-DAG: ld.d [[R1:\$w[0-9]+]],
@@ -172,8 +221,29 @@ define double @extract_v2f64_elt0() nounwind {
; MIPS32: .size extract_v2f64_elt0
}
+define double @extract_v2f64_vidx() nounwind {
+ ; MIPS32-LABEL: extract_v2f64_vidx:
+
+ %1 = load <2 x double>* @v2f64
+ ; MIPS32-DAG: lw [[PTR_V:\$[0-9]+]], %got(v2f64)(
+ ; MIPS32-DAG: ld.d [[R1:\$w[0-9]+]], 0([[PTR_V]])
+
+ %2 = fadd <2 x double> %1, %1
+ ; MIPS32-DAG: fadd.d [[R2:\$w[0-9]+]], [[R1]], [[R1]]
+
+ %3 = load i32* @i32
+ ; MIPS32-DAG: lw [[PTR_I:\$[0-9]+]], %got(i32)(
+ ; MIPS32-DAG: lw [[IDX:\$[0-9]+]], 0([[PTR_I]])
+
+ %4 = extractelement <2 x double> %2, i32 %3
+ ; MIPS32-DAG: splat.d $w0, [[R1]]{{\[}}[[IDX]]]
+
+ ret double %4
+ ; MIPS32: .size extract_v2f64_vidx
+}
+
define void @insert_v4f32(float %a) nounwind {
- ; MIPS32: insert_v4f32:
+ ; MIPS32-LABEL: insert_v4f32:
%1 = load <4 x float>* @v4f32
; MIPS32-DAG: ld.w [[R1:\$w[0-9]+]],
@@ -190,7 +260,7 @@ define void @insert_v4f32(float %a) nounwind {
}
define void @insert_v2f64(double %a) nounwind {
- ; MIPS32: insert_v2f64:
+ ; MIPS32-LABEL: insert_v2f64:
%1 = load <2 x double>* @v2f64
; MIPS32-DAG: ld.d [[R1:\$w[0-9]+]],
@@ -205,3 +275,55 @@ define void @insert_v2f64(double %a) nounwind {
ret void
; MIPS32: .size insert_v2f64
}
+
+define void @insert_v4f32_vidx(float %a) nounwind {
+ ; MIPS32-LABEL: insert_v4f32_vidx:
+
+ %1 = load <4 x float>* @v4f32
+ ; MIPS32-DAG: lw [[PTR_V:\$[0-9]+]], %got(v4f32)(
+ ; MIPS32-DAG: ld.w [[R1:\$w[0-9]+]], 0([[PTR_V]])
+
+ %2 = load i32* @i32
+ ; MIPS32-DAG: lw [[PTR_I:\$[0-9]+]], %got(i32)(
+ ; MIPS32-DAG: lw [[IDX:\$[0-9]+]], 0([[PTR_I]])
+
+ %3 = insertelement <4 x float> %1, float %a, i32 %2
+ ; float argument passed in $f12
+ ; MIPS32-DAG: sll [[BIDX:\$[0-9]+]], [[IDX]], 2
+ ; MIPS32-DAG: sld.b [[R1]], [[R1]]{{\[}}[[BIDX]]]
+ ; MIPS32-DAG: insve.w [[R1]][0], $w12[0]
+ ; MIPS32-DAG: neg [[NIDX:\$[0-9]+]], [[BIDX]]
+ ; MIPS32-DAG: sld.b [[R1]], [[R1]]{{\[}}[[NIDX]]]
+
+ store <4 x float> %3, <4 x float>* @v4f32
+ ; MIPS32-DAG: st.w [[R1]]
+
+ ret void
+ ; MIPS32: .size insert_v4f32_vidx
+}
+
+define void @insert_v2f64_vidx(double %a) nounwind {
+ ; MIPS32-LABEL: insert_v2f64_vidx:
+
+ %1 = load <2 x double>* @v2f64
+ ; MIPS32-DAG: lw [[PTR_V:\$[0-9]+]], %got(v2f64)(
+ ; MIPS32-DAG: ld.d [[R1:\$w[0-9]+]], 0([[PTR_V]])
+
+ %2 = load i32* @i32
+ ; MIPS32-DAG: lw [[PTR_I:\$[0-9]+]], %got(i32)(
+ ; MIPS32-DAG: lw [[IDX:\$[0-9]+]], 0([[PTR_I]])
+
+ %3 = insertelement <2 x double> %1, double %a, i32 %2
+ ; double argument passed in $f12
+ ; MIPS32-DAG: sll [[BIDX:\$[0-9]+]], [[IDX]], 3
+ ; MIPS32-DAG: sld.b [[R1]], [[R1]]{{\[}}[[BIDX]]]
+ ; MIPS32-DAG: insve.d [[R1]][0], $w12[0]
+ ; MIPS32-DAG: neg [[NIDX:\$[0-9]+]], [[BIDX]]
+ ; MIPS32-DAG: sld.b [[R1]], [[R1]]{{\[}}[[NIDX]]]
+
+ store <2 x double> %3, <2 x double>* @v2f64
+ ; MIPS32-DAG: st.d [[R1]]
+
+ ret void
+ ; MIPS32: .size insert_v2f64_vidx
+}
generated by cgit v1.3 (git 2.53.0) at 2026-05-13 02:36:01 +0000