diff options
Diffstat (limited to 'test/CodeGen/Thumb2')
101 files changed, 682 insertions, 381 deletions
diff --git a/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll b/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll index 4616dcfe3e4e..4abeca930c1f 100644 --- a/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll +++ b/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll @@ -5,7 +5,7 @@ define i32 @t(i32, ...) nounwind { entry: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: add r7, sp, #12 %1 = load i8** undef, align 4 ; <i8*> [#uses=3] %2 = getelementptr i8* %1, i32 4 ; <i8*> [#uses=1] diff --git a/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll b/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll index 095aecce9e57..e0144531454a 100644 --- a/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll +++ b/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll @@ -7,7 +7,7 @@ @sep = external global [20 x i32] ; <[20 x i32]*> [#uses=1] define void @main(i32 %argc, i8** %argv) noreturn nounwind { -; CHECK: main: +; CHECK-LABEL: main: ; CHECK: ldrb entry: %nb.i.i.i = alloca [25 x i8], align 1 ; <[25 x i8]*> [#uses=0] diff --git a/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll b/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll index ff68e665078a..940cfd15e08e 100644 --- a/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll +++ b/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll @@ -4,7 +4,7 @@ define hidden i32 @__gcov_execlp(i8* %path, i8* %arg, ...) nounwind { entry: -; CHECK: __gcov_execlp: +; CHECK-LABEL: __gcov_execlp: ; CHECK: sub sp, #8 ; CHECK: push ; CHECK: add r7, sp, #4 diff --git a/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll b/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll index ac3e80a7c113..52066d3f86ad 100644 --- a/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll +++ b/test/CodeGen/Thumb2/2009-09-28-ITBlockBug.ll @@ -5,7 +5,7 @@ @getNeighbour = external global void (i32, i32, i32, i32, %struct.pix_pos*)*, align 4 ; <void (i32, i32, i32, i32, %struct.pix_pos*)**> [#uses=2] define void @t() nounwind { -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: it eq ; CHECK-NEXT: cmpeq entry: diff --git a/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll b/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll index 18c2e0bfaec5..04d46e60d7db 100644 --- a/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll +++ b/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll @@ -10,7 +10,7 @@ define weak arm_aapcs_vfpcc i32 @_ZNKSs7compareERKSs(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) { -; CHECK: _ZNKSs7compareERKSs: +; CHECK-LABEL: _ZNKSs7compareERKSs: ; CHECK: it eq ; CHECK-NEXT: subeq{{(.w)?}} r0, r{{[0-9]+}}, r{{[0-9]+}} ; CHECK-NEXT: pop.w diff --git a/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll b/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll index c153092288a1..c662620b19e2 100644 --- a/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll +++ b/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll @@ -2,7 +2,7 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" define i32 @test(i32 %n) nounwind { -; CHECK: test: +; CHECK-LABEL: test: ; CHECK-NOT: mov ; CHECK: return entry: @@ -30,7 +30,7 @@ return: ; preds = %bb, %entry } define i32 @test_dead_cycle(i32 %n) nounwind { -; CHECK: test_dead_cycle: +; CHECK-LABEL: test_dead_cycle: ; CHECK: blx ; CHECK-NOT: mov ; CHECK: blx diff --git a/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll b/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll index 2246de35e03c..1b8bdb1c19bb 100644 --- a/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll +++ b/test/CodeGen/Thumb2/2010-04-15-DynAllocBug.ll @@ -6,12 +6,12 @@ define void @t() nounwind ssp { entry: -; CHECK: t: +; CHECK-LABEL: t: %size = mul i32 8, 2 -; CHECK: subs r0, #16 +; CHECK: sub.w r0, sp, #16 ; CHECK: mov sp, r0 %vla_a = alloca i8, i32 %size, align 8 -; CHECK: subs r0, #16 +; CHECK: sub.w r0, sp, #16 ; CHECK: mov sp, r0 %vla_b = alloca i8, i32 %size, align 8 unreachable diff --git a/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll b/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll index 244d0bb8f720..810bfb790209 100644 --- a/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll +++ b/test/CodeGen/Thumb2/2010-06-21-TailMergeBug.ll @@ -40,7 +40,7 @@ entry: ; CHECK: pop ; CHECK: pop ; Do not convert into single stream code. BranchProbability Analysis assumes -; that branches which goes to "ret" intruction have lower probabilities. +; that branches which goes to "ret" instruction have lower probabilities. switch i32 undef, label %bb7 [ i32 37, label %bb43 i32 48, label %bb5 diff --git a/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll b/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll index 47d7a9cca48d..547950fb17f0 100644 --- a/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll +++ b/test/CodeGen/Thumb2/2010-08-10-VarSizedAllocaBug.ll @@ -4,7 +4,7 @@ define internal fastcc i32 @Callee(i32 %i) nounwind { entry: -; CHECK: Callee: +; CHECK-LABEL: Callee: ; CHECK: push ; CHECK: mov r4, sp ; CHECK: sub.w [[R12:r[0-9]+]], r4, #1000 @@ -33,7 +33,7 @@ bb2: ; preds = %entry declare i32 @__sprintf_chk(i8*, i32, i32, i8*, ...) nounwind define i32 @main() nounwind { -; CHECK: main: +; CHECK-LABEL: main: bb.nph: br label %bb diff --git a/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll b/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll index 5cb266b11b0c..75f5439b98c2 100644 --- a/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll +++ b/test/CodeGen/Thumb2/2010-11-22-EpilogueBug.ll @@ -6,7 +6,7 @@ declare void @bar() nounwind optsize define void @foo() nounwind optsize { -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: push ; CHECK: mov r7, sp ; CHECK: sub sp, #4 diff --git a/test/CodeGen/Thumb2/2011-04-21-FILoweringBug.ll b/test/CodeGen/Thumb2/2011-04-21-FILoweringBug.ll index 604a352baa11..9878ae862c7a 100644 --- a/test/CodeGen/Thumb2/2011-04-21-FILoweringBug.ll +++ b/test/CodeGen/Thumb2/2011-04-21-FILoweringBug.ll @@ -7,7 +7,7 @@ define i32 @t() nounwind { entry: -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: sub sp, #12 ; CHECK-NOT: sub ; CHECK: add r0, sp, #4 diff --git a/test/CodeGen/Thumb2/2012-01-13-CBNZBug.ll b/test/CodeGen/Thumb2/2012-01-13-CBNZBug.ll index 4acdd9e19ed8..500871519234 100644 --- a/test/CodeGen/Thumb2/2012-01-13-CBNZBug.ll +++ b/test/CodeGen/Thumb2/2012-01-13-CBNZBug.ll @@ -12,7 +12,7 @@ declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind define hidden fastcc void @rdictionary_lookup(%struct.Dict_node_struct* %dn, i8* nocapture %s) nounwind ssp { -; CHECK: rdictionary_lookup: +; CHECK-LABEL: rdictionary_lookup: entry: br label %tailrecurse diff --git a/test/CodeGen/Thumb2/2013-03-06-vector-sext-operand-scalarize.ll b/test/CodeGen/Thumb2/2013-03-06-vector-sext-operand-scalarize.ll index 203815fadc9c..974fade64f0b 100644 --- a/test/CodeGen/Thumb2/2013-03-06-vector-sext-operand-scalarize.ll +++ b/test/CodeGen/Thumb2/2013-03-06-vector-sext-operand-scalarize.ll @@ -3,7 +3,7 @@ ; Testing that these don't crash/assert. The loop vectorizer can end up ; with odd constructs like this. The code actually generated is incidental. define <1 x i64> @test_zext(i32 %a) nounwind { -; CHECK: test_zext: +; CHECK-LABEL: test_zext: %Cmp = icmp uge i32 %a, 42 %vec = insertelement <1 x i1> zeroinitializer, i1 %Cmp, i32 0 %Se = zext <1 x i1> %vec to <1 x i64> @@ -11,7 +11,7 @@ define <1 x i64> @test_zext(i32 %a) nounwind { } define <1 x i64> @test_sext(i32 %a) nounwind { -; CHECK: test_sext: +; CHECK-LABEL: test_sext: %Cmp = icmp uge i32 %a, 42 %vec = insertelement <1 x i1> zeroinitializer, i1 %Cmp, i32 0 %Se = sext <1 x i1> %vec to <1 x i64> diff --git a/test/CodeGen/Thumb2/buildvector-crash.ll b/test/CodeGen/Thumb2/buildvector-crash.ll index ce42f4b3773d..8a3c895bbe57 100644 --- a/test/CodeGen/Thumb2/buildvector-crash.ll +++ b/test/CodeGen/Thumb2/buildvector-crash.ll @@ -12,6 +12,6 @@ bb8: ; preds = %bb8, %bb.nph372 %3 = fadd <4 x float> undef, %2 store <4 x float> %3, <4 x float>* undef, align 4 br label %bb8 -; CHECK: RotateStarsFP_Vec: +; CHECK-LABEL: RotateStarsFP_Vec: ; CHECK: vld1.64 } diff --git a/test/CodeGen/Thumb2/carry.ll b/test/CodeGen/Thumb2/carry.ll index 85b4370fa599..da1902b7e0f8 100644 --- a/test/CodeGen/Thumb2/carry.ll +++ b/test/CodeGen/Thumb2/carry.ll @@ -2,7 +2,7 @@ define i64 @f1(i64 %a, i64 %b) { entry: -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: subs r0, r0, r2 ; CHECK: sbcs r1, r3 %tmp = sub i64 %a, %b @@ -11,7 +11,7 @@ entry: define i64 @f2(i64 %a, i64 %b) { entry: -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: adds r0, r0, r0 ; CHECK: adcs r1, r1 ; CHECK: subs r0, r0, r2 @@ -24,7 +24,7 @@ entry: ; rdar://12559385 define i64 @f3(i32 %vi) { entry: -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: movw [[REG:r[0-9]+]], #36102 ; CHECK: sbcs r{{[0-9]+}}, [[REG]] %v0 = zext i32 %vi to i64 diff --git a/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll index edbf83405be7..a9f948cf717a 100644 --- a/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll +++ b/test/CodeGen/Thumb2/cross-rc-coalescing-2.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | FileCheck %s define void @fht(float* nocapture %fz, i16 signext %n) nounwind { -; CHECK: fht: +; CHECK-LABEL: fht: entry: br label %bb5 diff --git a/test/CodeGen/Thumb2/div.ll b/test/CodeGen/Thumb2/div.ll index f89746a30327..003d71797ab1 100644 --- a/test/CodeGen/Thumb2/div.ll +++ b/test/CodeGen/Thumb2/div.ll @@ -3,7 +3,9 @@ ; RUN: llc < %s -march=thumb -mcpu=cortex-m3 -mattr=+thumb2 \ ; RUN: | FileCheck %s -check-prefix=CHECK-THUMBV7M ; RUN: llc < %s -march=thumb -mcpu=swift \ -; RUN: | FileCheck %s -check-prefix=CHECK-SWIFT-T2 +; RUN: | FileCheck %s -check-prefix=CHECK-HWDIV +; RUN: llc < %s -march=thumb -mcpu=cortex-r5 \ +; RUN: | FileCheck %s -check-prefix=CHECK-HWDIV define i32 @f1(i32 %a, i32 %b) { entry: @@ -11,8 +13,8 @@ entry: ; CHECK-THUMB: __divsi3 ; CHECK-THUMBV7M: f1 ; CHECK-THUMBV7M: sdiv -; CHECK-SWIFT-T2: f1 -; CHECK-SWIFT-T2: sdiv +; CHECK-HWDIV: f1 +; CHECK-HWDIV: sdiv %tmp1 = sdiv i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp1 } @@ -23,8 +25,8 @@ entry: ; CHECK-THUMB: __udivsi3 ; CHECK-THUMBV7M: f2 ; CHECK-THUMBV7M: udiv -; CHECK-SWIFT-T2: f2 -; CHECK-SWIFT-T2: udiv +; CHECK-HWDIV: f2 +; CHECK-HWDIV: udiv %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp1 } @@ -35,8 +37,8 @@ entry: ; CHECK-THUMB: __modsi3 ; CHECK-THUMBV7M: f3 ; CHECK-THUMBV7M: sdiv -; CHECK-SWIFT-T2: f3 -; CHECK-SWIFT-T2: sdiv +; CHECK-HWDIV: f3 +; CHECK-HWDIV: sdiv %tmp1 = srem i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp1 } @@ -47,8 +49,8 @@ entry: ; CHECK-THUMB: __umodsi3 ; CHECK-THUMBV7M: f4 ; CHECK-THUMBV7M: udiv -; CHECK-SWIFT-T2: f4 -; CHECK-SWIFT-T2: udiv +; CHECK-HWDIV: f4 +; CHECK-HWDIV: udiv %tmp1 = urem i32 %a, %b ; <i32> [#uses=1] ret i32 %tmp1 } diff --git a/test/CodeGen/Thumb2/large-call.ll b/test/CodeGen/Thumb2/large-call.ll index 61c477aa9180..1b4d4625dd05 100644 --- a/test/CodeGen/Thumb2/large-call.ll +++ b/test/CodeGen/Thumb2/large-call.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -mcpu=cortex-a8 | FileCheck %s +; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mcpu=cortex-a8 | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32" target triple = "thumbv7-apple-ios0.0.0" diff --git a/test/CodeGen/Thumb2/large-stack.ll b/test/CodeGen/Thumb2/large-stack.ll index 68b5d1cc94fb..36f3ce2eaa88 100644 --- a/test/CodeGen/Thumb2/large-stack.ll +++ b/test/CodeGen/Thumb2/large-stack.ll @@ -2,19 +2,19 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=LINUX define void @test1() { -; DARWIN: test1: +; DARWIN-LABEL: test1: ; DARWIN: sub sp, #256 -; LINUX: test1: +; LINUX-LABEL: test1: ; LINUX: sub sp, #256 %tmp = alloca [ 64 x i32 ] , align 4 ret void } define void @test2() { -; DARWIN: test2: +; DARWIN-LABEL: test2: ; DARWIN: sub.w sp, sp, #4160 ; DARWIN: sub sp, #8 -; LINUX: test2: +; LINUX-LABEL: test2: ; LINUX: sub.w sp, sp, #4160 ; LINUX: sub sp, #8 %tmp = alloca [ 4168 x i8 ] , align 4 @@ -22,11 +22,11 @@ define void @test2() { } define i32 @test3() { -; DARWIN: test3: +; DARWIN-LABEL: test3: ; DARWIN: push {r4, r7, lr} ; DARWIN: sub.w sp, sp, #805306368 ; DARWIN: sub sp, #20 -; LINUX: test3: +; LINUX-LABEL: test3: ; LINUX: push.w {r4, r7, r11, lr} ; LINUX: sub.w sp, sp, #805306368 ; LINUX: sub sp, #16 diff --git a/test/CodeGen/Thumb2/lit.local.cfg b/test/CodeGen/Thumb2/lit.local.cfg index cb77b09ef4ad..8a3ba96497e7 100644 --- a/test/CodeGen/Thumb2/lit.local.cfg +++ b/test/CodeGen/Thumb2/lit.local.cfg @@ -1,5 +1,3 @@ -config.suffixes = ['.ll', '.c', '.cpp'] - targets = set(config.root.targets_to_build.split()) if not 'ARM' in targets: config.unsupported = True diff --git a/test/CodeGen/Thumb2/longMACt.ll b/test/CodeGen/Thumb2/longMACt.ll index beefd6044cf4..a457333d978f 100644 --- a/test/CodeGen/Thumb2/longMACt.ll +++ b/test/CodeGen/Thumb2/longMACt.ll @@ -2,7 +2,7 @@ ; Check generated signed and unsigned multiply accumulate long. define i64 @MACLongTest1(i32 %a, i32 %b, i64 %c) { -;CHECK: MACLongTest1: +;CHECK-LABEL: MACLongTest1: ;CHECK: umlal %conv = zext i32 %a to i64 %conv1 = zext i32 %b to i64 @@ -12,7 +12,7 @@ define i64 @MACLongTest1(i32 %a, i32 %b, i64 %c) { } define i64 @MACLongTest2(i32 %a, i32 %b, i64 %c) { -;CHECK: MACLongTest2: +;CHECK-LABEL: MACLongTest2: ;CHECK: smlal %conv = sext i32 %a to i64 %conv1 = sext i32 %b to i64 @@ -22,7 +22,7 @@ define i64 @MACLongTest2(i32 %a, i32 %b, i64 %c) { } define i64 @MACLongTest3(i32 %a, i32 %b, i32 %c) { -;CHECK: MACLongTest3: +;CHECK-LABEL: MACLongTest3: ;CHECK: umlal %conv = zext i32 %b to i64 %conv1 = zext i32 %a to i64 @@ -33,7 +33,7 @@ define i64 @MACLongTest3(i32 %a, i32 %b, i32 %c) { } define i64 @MACLongTest4(i32 %a, i32 %b, i32 %c) { -;CHECK: MACLongTest4: +;CHECK-LABEL: MACLongTest4: ;CHECK: smlal %conv = sext i32 %b to i64 %conv1 = sext i32 %a to i64 diff --git a/test/CodeGen/Thumb2/lsr-deficiency.ll b/test/CodeGen/Thumb2/lsr-deficiency.ll index 9aaa821698c1..7ce6768a2187 100644 --- a/test/CodeGen/Thumb2/lsr-deficiency.ll +++ b/test/CodeGen/Thumb2/lsr-deficiency.ll @@ -7,7 +7,7 @@ @array = external global i32* ; <i32**> [#uses=1] define void @t() nounwind optsize { -; CHECK: t: +; CHECK-LABEL: t: ; CHECK: mov{{.*}}, #1000 entry: %.pre = load i32* @G, align 4 ; <i32> [#uses=1] diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll index 01df37323252..d9da846294c4 100644 --- a/test/CodeGen/Thumb2/machine-licm.ll +++ b/test/CodeGen/Thumb2/machine-licm.ll @@ -7,7 +7,7 @@ define void @t1(i32* nocapture %vals, i32 %c) nounwind { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: bxeq lr %0 = icmp eq i32 %c, 0 ; <i1> [#uses=1] @@ -50,7 +50,7 @@ return: ; preds = %bb, %entry ; rdar://8001136 define void @t2(i8* %ptr1, i8* %ptr2) nounwind { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: vmov.f32 q{{.*}}, #1.000000e+00 br i1 undef, label %bb1, label %bb2 @@ -82,7 +82,7 @@ declare <4 x float> @llvm.arm.neon.vmaxs.v4f32(<4 x float>, <4 x float>) nounwin ; rdar://8241368 ; isel should not fold immediate into eor's which would have prevented LICM. define zeroext i16 @t3(i8 zeroext %data, i16 zeroext %crc) nounwind readnone { -; CHECK: t3: +; CHECK-LABEL: t3: bb.nph: ; CHECK: bb.nph ; CHECK: movw {{(r[0-9])|(lr)}}, #32768 diff --git a/test/CodeGen/Thumb2/mul_const.ll b/test/CodeGen/Thumb2/mul_const.ll index 9a2ec93a5adc..488f4d13a0eb 100644 --- a/test/CodeGen/Thumb2/mul_const.ll +++ b/test/CodeGen/Thumb2/mul_const.ll @@ -3,7 +3,7 @@ define i32 @t1(i32 %v) nounwind readnone { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: add.w r0, r0, r0, lsl #3 %0 = mul i32 %v, 9 ret i32 %0 @@ -11,7 +11,7 @@ entry: define i32 @t2(i32 %v) nounwind readnone { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: rsb r0, r0, r0, lsl #3 %0 = mul i32 %v, 7 ret i32 %0 diff --git a/test/CodeGen/Thumb2/pic-load.ll b/test/CodeGen/Thumb2/pic-load.ll index 35a03e777313..b22fd1dc72e1 100644 --- a/test/CodeGen/Thumb2/pic-load.ll +++ b/test/CodeGen/Thumb2/pic-load.ll @@ -7,7 +7,7 @@ define hidden i32 @atexit(void ()* %func) nounwind { entry: -; CHECK: atexit: +; CHECK-LABEL: atexit: ; CHECK: add r0, pc %r = alloca %struct.one_atexit_routine, align 4 ; <%struct.one_atexit_routine*> [#uses=3] %0 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 0, i32 0 ; <void ()**> [#uses=1] diff --git a/test/CodeGen/Thumb2/tail-call-r9.ll b/test/CodeGen/Thumb2/tail-call-r9.ll new file mode 100644 index 000000000000..24c76c98c03a --- /dev/null +++ b/test/CodeGen/Thumb2/tail-call-r9.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-m3 | FileCheck %s + +@foo = common global void ()* null, align 4 + +; Make sure in the presence of a tail call, r9 doesn't get used to hold +; the destination address. It's callee-saved in AAPCS. +define arm_aapcscc void @test(i32 %a) nounwind { +; CHECK-LABEL: test: +; CHECK-NOT bx r9 + %tmp = load void ()** @foo, align 4 + tail call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r12}"() nounwind + tail call arm_aapcscc void %tmp() nounwind + ret void +} diff --git a/test/CodeGen/Thumb2/thumb2-adc.ll b/test/CodeGen/Thumb2/thumb2-adc.ll index 702df91c8595..7c34cfdef3f9 100644 --- a/test/CodeGen/Thumb2/thumb2-adc.ll +++ b/test/CodeGen/Thumb2/thumb2-adc.ll @@ -2,7 +2,7 @@ ; 734439407618 = 0x000000ab00000002 define i64 @f1(i64 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: adds r0, #2 %tmp = add i64 %a, 734439407618 ret i64 %tmp @@ -10,7 +10,7 @@ define i64 @f1(i64 %a) { ; 5066626890203138 = 0x0012001200000002 define i64 @f2(i64 %a) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: adds r0, #2 %tmp = add i64 %a, 5066626890203138 ret i64 %tmp @@ -18,7 +18,7 @@ define i64 @f2(i64 %a) { ; 3747052064576897026 = 0x3400340000000002 define i64 @f3(i64 %a) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: adds r0, #2 %tmp = add i64 %a, 3747052064576897026 ret i64 %tmp @@ -26,7 +26,7 @@ define i64 @f3(i64 %a) { ; 6221254862626095106 = 0x5656565600000002 define i64 @f4(i64 %a) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: adds r0, #2 %tmp = add i64 %a, 6221254862626095106 ret i64 %tmp @@ -34,14 +34,14 @@ define i64 @f4(i64 %a) { ; 287104476244869122 = 0x03fc000000000002 define i64 @f5(i64 %a) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: adds r0, #2 %tmp = add i64 %a, 287104476244869122 ret i64 %tmp } define i64 @f6(i64 %a, i64 %b) { -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: adds r0, r0, r2 %tmp = add i64 %a, %b ret i64 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-add.ll b/test/CodeGen/Thumb2/thumb2-add.ll index 66fca132f04a..c23c74a1682e 100644 --- a/test/CodeGen/Thumb2/thumb2-add.ll +++ b/test/CodeGen/Thumb2/thumb2-add.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @t2ADDrc_255(i32 %lhs) { -; CHECK: t2ADDrc_255: +; CHECK-LABEL: t2ADDrc_255: ; CHECK-NOT: bx lr ; CHECK: add{{.*}} #255 ; CHECK: bx lr @@ -11,7 +11,7 @@ define i32 @t2ADDrc_255(i32 %lhs) { } define i32 @t2ADDrc_256(i32 %lhs) { -; CHECK: t2ADDrc_256: +; CHECK-LABEL: t2ADDrc_256: ; CHECK-NOT: bx lr ; CHECK: add{{.*}} #256 ; CHECK: bx lr @@ -21,7 +21,7 @@ define i32 @t2ADDrc_256(i32 %lhs) { } define i32 @t2ADDrc_257(i32 %lhs) { -; CHECK: t2ADDrc_257: +; CHECK-LABEL: t2ADDrc_257: ; CHECK-NOT: bx lr ; CHECK: add{{.*}} #257 ; CHECK: bx lr @@ -31,7 +31,7 @@ define i32 @t2ADDrc_257(i32 %lhs) { } define i32 @t2ADDrc_4094(i32 %lhs) { -; CHECK: t2ADDrc_4094: +; CHECK-LABEL: t2ADDrc_4094: ; CHECK-NOT: bx lr ; CHECK: add{{.*}} #4094 ; CHECK: bx lr @@ -41,7 +41,7 @@ define i32 @t2ADDrc_4094(i32 %lhs) { } define i32 @t2ADDrc_4095(i32 %lhs) { -; CHECK: t2ADDrc_4095: +; CHECK-LABEL: t2ADDrc_4095: ; CHECK-NOT: bx lr ; CHECK: add{{.*}} #4095 ; CHECK: bx lr @@ -51,7 +51,7 @@ define i32 @t2ADDrc_4095(i32 %lhs) { } define i32 @t2ADDrc_4096(i32 %lhs) { -; CHECK: t2ADDrc_4096: +; CHECK-LABEL: t2ADDrc_4096: ; CHECK-NOT: bx lr ; CHECK: add{{.*}} #4096 ; CHECK: bx lr @@ -61,7 +61,7 @@ define i32 @t2ADDrc_4096(i32 %lhs) { } define i32 @t2ADDrr(i32 %lhs, i32 %rhs) { -; CHECK: t2ADDrr: +; CHECK-LABEL: t2ADDrr: ; CHECK-NOT: bx lr ; CHECK: add ; CHECK: bx lr @@ -71,7 +71,7 @@ define i32 @t2ADDrr(i32 %lhs, i32 %rhs) { } define i32 @t2ADDrs(i32 %lhs, i32 %rhs) { -; CHECK: t2ADDrs: +; CHECK-LABEL: t2ADDrs: ; CHECK-NOT: bx lr ; CHECK: add{{.*}} lsl #8 ; CHECK: bx lr diff --git a/test/CodeGen/Thumb2/thumb2-add2.ll b/test/CodeGen/Thumb2/thumb2-add2.ll index e496654706ec..3bbc3bf812ad 100644 --- a/test/CodeGen/Thumb2/thumb2-add2.ll +++ b/test/CodeGen/Thumb2/thumb2-add2.ll @@ -2,7 +2,7 @@ ; 171 = 0x000000ab define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: adds r0, #171 %tmp = add i32 %a, 171 ret i32 %tmp @@ -10,7 +10,7 @@ define i32 @f1(i32 %a) { ; 1179666 = 0x00120012 define i32 @f2(i32 %a) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: add.w r0, r0, #1179666 %tmp = add i32 %a, 1179666 ret i32 %tmp @@ -18,7 +18,7 @@ define i32 @f2(i32 %a) { ; 872428544 = 0x34003400 define i32 @f3(i32 %a) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: add.w r0, r0, #872428544 %tmp = add i32 %a, 872428544 ret i32 %tmp @@ -26,7 +26,7 @@ define i32 @f3(i32 %a) { ; 1448498774 = 0x56565656 define i32 @f4(i32 %a) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: add.w r0, r0, #1448498774 %tmp = add i32 %a, 1448498774 ret i32 %tmp @@ -34,7 +34,7 @@ define i32 @f4(i32 %a) { ; 510 = 0x000001fe define i32 @f5(i32 %a) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: add.w r0, r0, #510 %tmp = add i32 %a, 510 ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-add3.ll b/test/CodeGen/Thumb2/thumb2-add3.ll index 58fc33372cf6..6cd818c03e11 100644 --- a/test/CodeGen/Thumb2/thumb2-add3.ll +++ b/test/CodeGen/Thumb2/thumb2-add3.ll @@ -5,5 +5,5 @@ define i32 @f1(i32 %a) { ret i32 %tmp } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: addw r0, r0, #4095 diff --git a/test/CodeGen/Thumb2/thumb2-add4.ll b/test/CodeGen/Thumb2/thumb2-add4.ll index b94e84daee1b..8b957114835d 100644 --- a/test/CodeGen/Thumb2/thumb2-add4.ll +++ b/test/CodeGen/Thumb2/thumb2-add4.ll @@ -2,7 +2,7 @@ ; 171 = 0x000000ab define i64 @f1(i64 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: adds r0, #171 ; CHECK: adc r1, r1, #0 %tmp = add i64 %a, 171 @@ -11,7 +11,7 @@ define i64 @f1(i64 %a) { ; 1179666 = 0x00120012 define i64 @f2(i64 %a) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: adds.w r0, r0, #1179666 ; CHECK: adc r1, r1, #0 %tmp = add i64 %a, 1179666 @@ -20,7 +20,7 @@ define i64 @f2(i64 %a) { ; 872428544 = 0x34003400 define i64 @f3(i64 %a) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: adds.w r0, r0, #872428544 ; CHECK: adc r1, r1, #0 %tmp = add i64 %a, 872428544 @@ -29,7 +29,7 @@ define i64 @f3(i64 %a) { ; 1448498774 = 0x56565656 define i64 @f4(i64 %a) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: adds.w r0, r0, #1448498774 ; CHECK: adc r1, r1, #0 %tmp = add i64 %a, 1448498774 @@ -38,7 +38,7 @@ define i64 @f4(i64 %a) { ; 66846720 = 0x03fc0000 define i64 @f5(i64 %a) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: adds.w r0, r0, #66846720 ; CHECK: adc r1, r1, #0 %tmp = add i64 %a, 66846720 diff --git a/test/CodeGen/Thumb2/thumb2-add5.ll b/test/CodeGen/Thumb2/thumb2-add5.ll index 8b3a4f6d12a8..beaa09e1e69e 100644 --- a/test/CodeGen/Thumb2/thumb2-add5.ll +++ b/test/CodeGen/Thumb2/thumb2-add5.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a, i32 %b) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: add r0, r1 %tmp = add i32 %a, %b ret i32 %tmp } define i32 @f2(i32 %a, i32 %b) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: add.w r0, r0, r1, lsl #5 %tmp = shl i32 %b, 5 %tmp1 = add i32 %a, %tmp @@ -16,7 +16,7 @@ define i32 @f2(i32 %a, i32 %b) { } define i32 @f3(i32 %a, i32 %b) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: add.w r0, r0, r1, lsr #6 %tmp = lshr i32 %b, 6 %tmp1 = add i32 %a, %tmp @@ -24,7 +24,7 @@ define i32 @f3(i32 %a, i32 %b) { } define i32 @f4(i32 %a, i32 %b) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: add.w r0, r0, r1, asr #7 %tmp = ashr i32 %b, 7 %tmp1 = add i32 %a, %tmp @@ -32,7 +32,7 @@ define i32 @f4(i32 %a, i32 %b) { } define i32 @f5(i32 %a, i32 %b) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: add.w r0, r0, r0, ror #8 %l8 = shl i32 %a, 24 %r8 = lshr i32 %a, 8 diff --git a/test/CodeGen/Thumb2/thumb2-add6.ll b/test/CodeGen/Thumb2/thumb2-add6.ll index 0ecaa793909f..0d2f12249956 100644 --- a/test/CodeGen/Thumb2/thumb2-add6.ll +++ b/test/CodeGen/Thumb2/thumb2-add6.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i64 @f1(i64 %a, i64 %b) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: adds r0, r0, r2 ; CHECK: adcs r1, r3 %tmp = add i64 %a, %b diff --git a/test/CodeGen/Thumb2/thumb2-and.ll b/test/CodeGen/Thumb2/thumb2-and.ll index 8e2245a85926..c9578d9d7d21 100644 --- a/test/CodeGen/Thumb2/thumb2-and.ll +++ b/test/CodeGen/Thumb2/thumb2-and.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a, i32 %b) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: ands r0, r1 %tmp = and i32 %a, %b ret i32 %tmp } define i32 @f2(i32 %a, i32 %b) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: and.w r0, r0, r1, lsl #5 %tmp = shl i32 %b, 5 %tmp1 = and i32 %a, %tmp @@ -16,7 +16,7 @@ define i32 @f2(i32 %a, i32 %b) { } define i32 @f3(i32 %a, i32 %b) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: and.w r0, r0, r1, lsr #6 %tmp = lshr i32 %b, 6 %tmp1 = and i32 %a, %tmp @@ -24,7 +24,7 @@ define i32 @f3(i32 %a, i32 %b) { } define i32 @f4(i32 %a, i32 %b) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: and.w r0, r0, r1, asr #7 %tmp = ashr i32 %b, 7 %tmp1 = and i32 %a, %tmp @@ -32,7 +32,7 @@ define i32 @f4(i32 %a, i32 %b) { } define i32 @f5(i32 %a, i32 %b) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: and.w r0, r0, r0, ror #8 %l8 = shl i32 %a, 24 %r8 = lshr i32 %a, 8 diff --git a/test/CodeGen/Thumb2/thumb2-and2.ll b/test/CodeGen/Thumb2/thumb2-and2.ll index 7b0432de9bb5..c0501ab8ad37 100644 --- a/test/CodeGen/Thumb2/thumb2-and2.ll +++ b/test/CodeGen/Thumb2/thumb2-and2.ll @@ -5,7 +5,7 @@ define i32 @f1(i32 %a) { %tmp = and i32 %a, 171 ret i32 %tmp } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: and r0, r0, #171 ; 1179666 = 0x00120012 @@ -13,7 +13,7 @@ define i32 @f2(i32 %a) { %tmp = and i32 %a, 1179666 ret i32 %tmp } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: and r0, r0, #1179666 ; 872428544 = 0x34003400 @@ -21,7 +21,7 @@ define i32 @f3(i32 %a) { %tmp = and i32 %a, 872428544 ret i32 %tmp } -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: and r0, r0, #872428544 ; 1448498774 = 0x56565656 @@ -29,7 +29,7 @@ define i32 @f4(i32 %a) { %tmp = and i32 %a, 1448498774 ret i32 %tmp } -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: bic r0, r0, #-1448498775 ; 66846720 = 0x03fc0000 @@ -37,5 +37,5 @@ define i32 @f5(i32 %a) { %tmp = and i32 %a, 66846720 ret i32 %tmp } -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: and r0, r0, #66846720 diff --git a/test/CodeGen/Thumb2/thumb2-asr.ll b/test/CodeGen/Thumb2/thumb2-asr.ll index a0a60e68989f..ba782dde1034 100644 --- a/test/CodeGen/Thumb2/thumb2-asr.ll +++ b/test/CodeGen/Thumb2/thumb2-asr.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a, i32 %b) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: asrs r0, r1 %tmp = ashr i32 %a, %b ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-asr2.ll b/test/CodeGen/Thumb2/thumb2-asr2.ll index 9c8634f7097c..3685badcafdf 100644 --- a/test/CodeGen/Thumb2/thumb2-asr2.ll +++ b/test/CodeGen/Thumb2/thumb2-asr2.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: asrs r0, r0, #17 %tmp = ashr i32 %a, 17 ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-bcc.ll b/test/CodeGen/Thumb2/thumb2-bcc.ll index 4a2d6000bbc7..81f7de9ae39c 100644 --- a/test/CodeGen/Thumb2/thumb2-bcc.ll +++ b/test/CodeGen/Thumb2/thumb2-bcc.ll @@ -4,7 +4,7 @@ ; happen and we get actual branches. define i32 @t1(i32 %a, i32 %b, i32 %c) { -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: cbz %tmp2 = icmp eq i32 %a, 0 br i1 %tmp2, label %cond_false, label %cond_true diff --git a/test/CodeGen/Thumb2/thumb2-bfc.ll b/test/CodeGen/Thumb2/thumb2-bfc.ll index b486045ab501..327b6d1a503a 100644 --- a/test/CodeGen/Thumb2/thumb2-bfc.ll +++ b/test/CodeGen/Thumb2/thumb2-bfc.ll @@ -2,7 +2,7 @@ ; 4278190095 = 0xff00000f define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: bfc r %tmp = and i32 %a, 4278190095 ret i32 %tmp @@ -10,7 +10,7 @@ define i32 @f1(i32 %a) { ; 4286578688 = 0xff800000 define i32 @f2(i32 %a) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: bfc r %tmp = and i32 %a, 4286578688 ret i32 %tmp @@ -18,7 +18,7 @@ define i32 @f2(i32 %a) { ; 4095 = 0x00000fff define i32 @f3(i32 %a) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: bfc r %tmp = and i32 %a, 4095 ret i32 %tmp @@ -26,7 +26,7 @@ define i32 @f3(i32 %a) { ; 2147483646 = 0x7ffffffe not implementable w/ BFC define i32 @f4(i32 %a) { -; CHECK: f4: +; CHECK-LABEL: f4: %tmp = and i32 %a, 2147483646 ret i32 %tmp } diff --git a/test/CodeGen/Thumb2/thumb2-bic.ll b/test/CodeGen/Thumb2/thumb2-bic.ll index 4e35383997d9..5938fa19a3c4 100644 --- a/test/CodeGen/Thumb2/thumb2-bic.ll +++ b/test/CodeGen/Thumb2/thumb2-bic.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a, i32 %b) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: bics r0, r1 %tmp = xor i32 %b, 4294967295 %tmp1 = and i32 %a, %tmp @@ -9,7 +9,7 @@ define i32 @f1(i32 %a, i32 %b) { } define i32 @f2(i32 %a, i32 %b) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: bics r0, r1 %tmp = xor i32 %b, 4294967295 %tmp1 = and i32 %tmp, %a @@ -17,7 +17,7 @@ define i32 @f2(i32 %a, i32 %b) { } define i32 @f3(i32 %a, i32 %b) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: bics r0, r1 %tmp = xor i32 4294967295, %b %tmp1 = and i32 %a, %tmp @@ -25,7 +25,7 @@ define i32 @f3(i32 %a, i32 %b) { } define i32 @f4(i32 %a, i32 %b) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: bics r0, r1 %tmp = xor i32 4294967295, %b %tmp1 = and i32 %tmp, %a @@ -33,7 +33,7 @@ define i32 @f4(i32 %a, i32 %b) { } define i32 @f5(i32 %a, i32 %b) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: bic.w r0, r0, r1, lsl #5 %tmp = shl i32 %b, 5 %tmp1 = xor i32 4294967295, %tmp @@ -42,7 +42,7 @@ define i32 @f5(i32 %a, i32 %b) { } define i32 @f6(i32 %a, i32 %b) { -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: bic.w r0, r0, r1, lsr #6 %tmp = lshr i32 %b, 6 %tmp1 = xor i32 %tmp, 4294967295 @@ -51,7 +51,7 @@ define i32 @f6(i32 %a, i32 %b) { } define i32 @f7(i32 %a, i32 %b) { -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: bic.w r0, r0, r1, asr #7 %tmp = ashr i32 %b, 7 %tmp1 = xor i32 %tmp, 4294967295 @@ -60,7 +60,7 @@ define i32 @f7(i32 %a, i32 %b) { } define i32 @f8(i32 %a, i32 %b) { -; CHECK: f8: +; CHECK-LABEL: f8: ; CHECK: bic.w r0, r0, r0, ror #8 %l8 = shl i32 %a, 24 %r8 = lshr i32 %a, 8 @@ -75,7 +75,7 @@ define i32 @f9(i32 %a) { %tmp = and i32 %a, 4294967108 ret i32 %tmp -; CHECK: f9: +; CHECK-LABEL: f9: ; CHECK: bic r0, r0, #187 } @@ -84,7 +84,7 @@ define i32 @f10(i32 %a) { %tmp = and i32 %a, 4283826005 ret i32 %tmp -; CHECK: f10: +; CHECK-LABEL: f10: ; CHECK: bic r0, r0, #11141290 } @@ -92,7 +92,7 @@ define i32 @f10(i32 %a) { define i32 @f11(i32 %a) { %tmp = and i32 %a, 872363007 ret i32 %tmp -; CHECK: f11: +; CHECK-LABEL: f11: ; CHECK: bic r0, r0, #-872363008 } @@ -100,6 +100,6 @@ define i32 @f11(i32 %a) { define i32 @f12(i32 %a) { %tmp = and i32 %a, 4293853183 ret i32 %tmp -; CHECK: f12: +; CHECK-LABEL: f12: ; CHECK: bic r0, r0, #1114112 } diff --git a/test/CodeGen/Thumb2/thumb2-branch.ll b/test/CodeGen/Thumb2/thumb2-branch.ll index f1c097c1892d..a00b22d85022 100644 --- a/test/CodeGen/Thumb2/thumb2-branch.ll +++ b/test/CodeGen/Thumb2/thumb2-branch.ll @@ -1,72 +1,74 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s -; If-conversion defeats the purpose of this test, which is to check conditional -; branch generation, so use memory barrier instruction to make sure it doesn't +; If-conversion defeats the purpose of this test, which is to check +; conditional branch generation, so a call to make sure it doesn't ; happen and we get actual branches. +declare void @foo() + define i32 @f1(i32 %a, i32 %b, i32* %v) { entry: -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: bne LBB %tmp = icmp eq i32 %a, %b ; <i1> [#uses=1] br i1 %tmp, label %cond_true, label %return cond_true: ; preds = %entry - fence seq_cst + call void @foo() store i32 0, i32* %v ret i32 0 return: ; preds = %entry - fence seq_cst + call void @foo() ret i32 1 } define i32 @f2(i32 %a, i32 %b, i32* %v) { entry: -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: bge LBB %tmp = icmp slt i32 %a, %b ; <i1> [#uses=1] br i1 %tmp, label %cond_true, label %return cond_true: ; preds = %entry - fence seq_cst + call void @foo() store i32 0, i32* %v ret i32 0 return: ; preds = %entry - fence seq_cst + call void @foo() ret i32 1 } define i32 @f3(i32 %a, i32 %b, i32* %v) { entry: -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: bhs LBB %tmp = icmp ult i32 %a, %b ; <i1> [#uses=1] br i1 %tmp, label %cond_true, label %return cond_true: ; preds = %entry - fence seq_cst + call void @foo() store i32 0, i32* %v ret i32 0 return: ; preds = %entry - fence seq_cst + call void @foo() ret i32 1 } define i32 @f4(i32 %a, i32 %b, i32* %v) { entry: -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: blo LBB %tmp = icmp uge i32 %a, %b ; <i1> [#uses=1] br i1 %tmp, label %cond_true, label %return cond_true: ; preds = %entry - fence seq_cst + call void @foo() store i32 0, i32* %v ret i32 0 return: ; preds = %entry - fence seq_cst + call void @foo() ret i32 1 } diff --git a/test/CodeGen/Thumb2/thumb2-call-tc.ll b/test/CodeGen/Thumb2/thumb2-call-tc.ll index 2e4da1b289b5..2902949d9768 100644 --- a/test/CodeGen/Thumb2/thumb2-call-tc.ll +++ b/test/CodeGen/Thumb2/thumb2-call-tc.ll @@ -7,20 +7,20 @@ declare void @g(i32, i32, i32, i32) define void @f() { -; DARWIN: f: +; DARWIN-LABEL: f: ; DARWIN: blx _g -; LINUX: f: +; LINUX-LABEL: f: ; LINUX: bl g tail call void @g( i32 1, i32 2, i32 3, i32 4 ) ret void } define void @h() { -; DARWIN: h: +; DARWIN-LABEL: h: ; DARWIN: bx r0 @ TAILCALL -; LINUX: h: +; LINUX-LABEL: h: ; LINUX: bx r0 @ TAILCALL %tmp = load i32 ()** @t ; <i32 ()*> [#uses=1] %tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0] @@ -28,10 +28,10 @@ define void @h() { } define void @j() { -; DARWIN: j: +; DARWIN-LABEL: j: ; DARWIN: b.w _f @ TAILCALL -; LINUX: j: +; LINUX-LABEL: j: ; LINUX: b.w f @ TAILCALL tail call void @f() ret void diff --git a/test/CodeGen/Thumb2/thumb2-call.ll b/test/CodeGen/Thumb2/thumb2-call.ll index 8513cfb404ce..1d2eaa77c7fe 100644 --- a/test/CodeGen/Thumb2/thumb2-call.ll +++ b/test/CodeGen/Thumb2/thumb2-call.ll @@ -6,20 +6,20 @@ declare void @g(i32, i32, i32, i32) define void @f() { -; DARWIN: f: +; DARWIN-LABEL: f: ; DARWIN: blx _g -; LINUX: f: +; LINUX-LABEL: f: ; LINUX: bl g call void @g( i32 1, i32 2, i32 3, i32 4 ) ret void } define void @h() { -; DARWIN: h: +; DARWIN-LABEL: h: ; DARWIN: blx r0 -; LINUX: h: +; LINUX-LABEL: h: ; LINUX: blx r0 %tmp = load i32 ()** @t ; <i32 ()*> [#uses=1] %tmp.upgrd.2 = call i32 %tmp( ) ; <i32> [#uses=0] diff --git a/test/CodeGen/Thumb2/thumb2-clz.ll b/test/CodeGen/Thumb2/thumb2-clz.ll index f7e966535d2f..dbdaae29eaef 100644 --- a/test/CodeGen/Thumb2/thumb2-clz.ll +++ b/test/CodeGen/Thumb2/thumb2-clz.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7 | FileCheck %s define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: clz r %tmp = tail call i32 @llvm.ctlz.i32(i32 %a, i1 true) ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-cmn.ll b/test/CodeGen/Thumb2/thumb2-cmn.ll index 67b07e63fc09..8bcaa7e8209e 100644 --- a/test/CodeGen/Thumb2/thumb2-cmn.ll +++ b/test/CodeGen/Thumb2/thumb2-cmn.ll @@ -8,7 +8,7 @@ define i1 @f1(i32 %a, i32 %b) { %tmp = icmp ne i32 %a, %nb ret i1 %tmp } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: cmn {{.*}}, r1 define i1 @f2(i32 %a, i32 %b) { @@ -16,7 +16,7 @@ define i1 @f2(i32 %a, i32 %b) { %tmp = icmp ne i32 %nb, %a ret i1 %tmp } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: cmn {{.*}}, r1 define i1 @f3(i32 %a, i32 %b) { @@ -24,7 +24,7 @@ define i1 @f3(i32 %a, i32 %b) { %tmp = icmp eq i32 %a, %nb ret i1 %tmp } -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: cmn {{.*}}, r1 define i1 @f4(i32 %a, i32 %b) { @@ -32,7 +32,7 @@ define i1 @f4(i32 %a, i32 %b) { %tmp = icmp eq i32 %nb, %a ret i1 %tmp } -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: cmn {{.*}}, r1 define i1 @f5(i32 %a, i32 %b) { @@ -41,7 +41,7 @@ define i1 @f5(i32 %a, i32 %b) { %tmp1 = icmp eq i32 %nb, %a ret i1 %tmp1 } -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: cmn.w {{.*}}, r1, lsl #5 define i1 @f6(i32 %a, i32 %b) { @@ -50,7 +50,7 @@ define i1 @f6(i32 %a, i32 %b) { %tmp1 = icmp ne i32 %nb, %a ret i1 %tmp1 } -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: cmn.w {{.*}}, r1, lsr #6 define i1 @f7(i32 %a, i32 %b) { @@ -59,7 +59,7 @@ define i1 @f7(i32 %a, i32 %b) { %tmp1 = icmp eq i32 %a, %nb ret i1 %tmp1 } -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: cmn.w {{.*}}, r1, asr #7 define i1 @f8(i32 %a, i32 %b) { @@ -70,7 +70,7 @@ define i1 @f8(i32 %a, i32 %b) { %tmp1 = icmp ne i32 %a, %nb ret i1 %tmp1 } -; CHECK: f8: +; CHECK-LABEL: f8: ; CHECK: cmn.w {{.*}}, {{.*}}, ror #8 @@ -81,5 +81,5 @@ define void @f9(i32 %a, i32 %b) nounwind optsize { !0 = metadata !{i32 81} -; CHECK: f9: +; CHECK-LABEL: f9: ; CHECK: cmn.w r0, r1 diff --git a/test/CodeGen/Thumb2/thumb2-cmn2.ll b/test/CodeGen/Thumb2/thumb2-cmn2.ll index c0e19f63a309..f5db728d46a4 100644 --- a/test/CodeGen/Thumb2/thumb2-cmn2.ll +++ b/test/CodeGen/Thumb2/thumb2-cmn2.ll @@ -2,7 +2,7 @@ ; -0x000000bb = 4294967109 define i1 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: cmn.w {{r.*}}, #187 %tmp = icmp ne i32 %a, 4294967109 ret i1 %tmp @@ -10,7 +10,7 @@ define i1 @f1(i32 %a) { ; -0x00aa00aa = 4283826006 define i1 @f2(i32 %a) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: cmn.w {{r.*}}, #11141290 %tmp = icmp eq i32 %a, 4283826006 ret i1 %tmp @@ -18,7 +18,7 @@ define i1 @f2(i32 %a) { ; -0xcc00cc00 = 872363008 define i1 @f3(i32 %a) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: cmn.w {{r.*}}, #-872363008 %tmp = icmp ne i32 %a, 872363008 ret i1 %tmp @@ -26,7 +26,7 @@ define i1 @f3(i32 %a) { ; -0x00110000 = 4293853184 define i1 @f4(i32 %a) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: cmn.w {{r.*}}, #1114112 %tmp = icmp eq i32 %a, 4293853184 ret i1 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-cmp.ll b/test/CodeGen/Thumb2/thumb2-cmp.ll index 4ce7acc22e0f..87413444ca3b 100644 --- a/test/CodeGen/Thumb2/thumb2-cmp.ll +++ b/test/CodeGen/Thumb2/thumb2-cmp.ll @@ -5,7 +5,7 @@ ; 0x000000bb = 187 define i1 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: cmp {{.*}}, #187 %tmp = icmp ne i32 %a, 187 ret i1 %tmp @@ -13,7 +13,7 @@ define i1 @f1(i32 %a) { ; 0x00aa00aa = 11141290 define i1 @f2(i32 %a) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: cmp.w {{.*}}, #11141290 %tmp = icmp eq i32 %a, 11141290 ret i1 %tmp @@ -21,7 +21,7 @@ define i1 @f2(i32 %a) { ; 0xcc00cc00 = 3422604288 define i1 @f3(i32 %a) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: cmp.w {{.*}}, #-872363008 %tmp = icmp ne i32 %a, 3422604288 ret i1 %tmp @@ -29,7 +29,7 @@ define i1 @f3(i32 %a) { ; 0xdddddddd = 3722304989 define i1 @f4(i32 %a) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: cmp.w {{.*}}, #-572662307 %tmp = icmp ne i32 %a, 3722304989 ret i1 %tmp @@ -37,7 +37,7 @@ define i1 @f4(i32 %a) { ; 0x00110000 = 1114112 define i1 @f5(i32 %a) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: cmp.w {{.*}}, #1114112 %tmp = icmp eq i32 %a, 1114112 ret i1 %tmp @@ -45,7 +45,7 @@ define i1 @f5(i32 %a) { ; Check that we don't do an invalid (a > b) --> !(a < b + 1) transform. ; -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK-NOT: cmp.w {{.*}}, #-2147483648 ; CHECK: bx lr define i32 @f6(i32 %a) { diff --git a/test/CodeGen/Thumb2/thumb2-cmp2.ll b/test/CodeGen/Thumb2/thumb2-cmp2.ll index f6790deb1fc2..5b880f16deb5 100644 --- a/test/CodeGen/Thumb2/thumb2-cmp2.ll +++ b/test/CodeGen/Thumb2/thumb2-cmp2.ll @@ -4,21 +4,21 @@ ; test as 'mov.w r0, #0'. define i1 @f1(i32 %a, i32 %b) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: cmp {{.*}}, r1 %tmp = icmp ne i32 %a, %b ret i1 %tmp } define i1 @f2(i32 %a, i32 %b) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: cmp {{.*}}, r1 %tmp = icmp eq i32 %a, %b ret i1 %tmp } define i1 @f6(i32 %a, i32 %b) { -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: cmp.w {{.*}}, r1, lsl #5 %tmp = shl i32 %b, 5 %tmp1 = icmp eq i32 %tmp, %a @@ -26,7 +26,7 @@ define i1 @f6(i32 %a, i32 %b) { } define i1 @f7(i32 %a, i32 %b) { -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: cmp.w {{.*}}, r1, lsr #6 %tmp = lshr i32 %b, 6 %tmp1 = icmp ne i32 %tmp, %a @@ -34,7 +34,7 @@ define i1 @f7(i32 %a, i32 %b) { } define i1 @f8(i32 %a, i32 %b) { -; CHECK: f8: +; CHECK-LABEL: f8: ; CHECK: cmp.w {{.*}}, r1, asr #7 %tmp = ashr i32 %b, 7 %tmp1 = icmp eq i32 %a, %tmp @@ -42,7 +42,7 @@ define i1 @f8(i32 %a, i32 %b) { } define i1 @f9(i32 %a, i32 %b) { -; CHECK: f9: +; CHECK-LABEL: f9: ; CHECK: cmp.w {{.*}}, {{.*}}, ror #8 %l8 = shl i32 %a, 24 %r8 = lshr i32 %a, 8 diff --git a/test/CodeGen/Thumb2/thumb2-eor.ll b/test/CodeGen/Thumb2/thumb2-eor.ll index 116a1a3519aa..b3e323c10d2e 100644 --- a/test/CodeGen/Thumb2/thumb2-eor.ll +++ b/test/CodeGen/Thumb2/thumb2-eor.ll @@ -1,28 +1,28 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a, i32 %b) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: eors r0, r1 %tmp = xor i32 %a, %b ret i32 %tmp } define i32 @f2(i32 %a, i32 %b) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: eors r0, r1 %tmp = xor i32 %b, %a ret i32 %tmp } define i32 @f2b(i32 %a, i32 %b, i32 %c) { -; CHECK: f2b: +; CHECK-LABEL: f2b: ; CHECK: eor.w r0, r1, r2 %tmp = xor i32 %b, %c ret i32 %tmp } define i32 @f3(i32 %a, i32 %b) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: eor.w r0, r0, r1, lsl #5 %tmp = shl i32 %b, 5 %tmp1 = xor i32 %a, %tmp @@ -30,7 +30,7 @@ define i32 @f3(i32 %a, i32 %b) { } define i32 @f4(i32 %a, i32 %b) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: eor.w r0, r0, r1, lsr #6 %tmp = lshr i32 %b, 6 %tmp1 = xor i32 %tmp, %a @@ -38,7 +38,7 @@ define i32 @f4(i32 %a, i32 %b) { } define i32 @f5(i32 %a, i32 %b) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: eor.w r0, r0, r1, asr #7 %tmp = ashr i32 %b, 7 %tmp1 = xor i32 %a, %tmp @@ -46,7 +46,7 @@ define i32 @f5(i32 %a, i32 %b) { } define i32 @f6(i32 %a, i32 %b) { -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: eor.w r0, r0, r0, ror #8 %l8 = shl i32 %a, 24 %r8 = lshr i32 %a, 8 diff --git a/test/CodeGen/Thumb2/thumb2-eor2.ll b/test/CodeGen/Thumb2/thumb2-eor2.ll index 6b2e9dcf3d1f..5daa13df655d 100644 --- a/test/CodeGen/Thumb2/thumb2-eor2.ll +++ b/test/CodeGen/Thumb2/thumb2-eor2.ll @@ -2,7 +2,7 @@ ; 0x000000bb = 187 define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: eor {{.*}}#187 %tmp = xor i32 %a, 187 ret i32 %tmp @@ -10,7 +10,7 @@ define i32 @f1(i32 %a) { ; 0x00aa00aa = 11141290 define i32 @f2(i32 %a) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: eor {{.*}}#11141290 %tmp = xor i32 %a, 11141290 ret i32 %tmp @@ -18,7 +18,7 @@ define i32 @f2(i32 %a) { ; 0xcc00cc00 = 3422604288 define i32 @f3(i32 %a) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: eor {{.*}}#-872363008 %tmp = xor i32 %a, 3422604288 ret i32 %tmp @@ -26,7 +26,7 @@ define i32 @f3(i32 %a) { ; 0xdddddddd = 3722304989 define i32 @f4(i32 %a) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: eor {{.*}}#-572662307 %tmp = xor i32 %a, 3722304989 ret i32 %tmp @@ -34,7 +34,7 @@ define i32 @f4(i32 %a) { ; 0x00110000 = 1114112 define i32 @f5(i32 %a) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: eor {{.*}}#1114112 %tmp = xor i32 %a, 1114112 ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt1-tc.ll b/test/CodeGen/Thumb2/thumb2-ifcvt1-tc.ll index 5315535db045..d86a897a4a09 100644 --- a/test/CodeGen/Thumb2/thumb2-ifcvt1-tc.ll +++ b/test/CodeGen/Thumb2/thumb2-ifcvt1-tc.ll @@ -2,7 +2,7 @@ ; XFAIL: * define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: it ne ; CHECK: cmpne switch i32 %c, label %cond_next [ @@ -23,7 +23,7 @@ cond_next: ; FIXME: Check for # of unconditional branch after adding branch folding post ifcvt. define i32 @t2(i32 %a, i32 %b) nounwind { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: ite gt ; CHECK: subgt ; CHECK: suble @@ -71,7 +71,7 @@ entry: ; Tail call prevents use of ifcvt in this one. Seems like a win though. define void @t3(i32 %a, i32 %b) nounwind { entry: -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK-NOT: it lt ; CHECK-NOT: poplt ; CHECK: b.w _foo @ TAILCALL diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll index af8fcc641247..13a1ca2e26cd 100644 --- a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll +++ b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll @@ -1,7 +1,8 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s - +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-default-it | FileCheck %s +; RUN: llc < %s -mtriple=thumbv8 -arm-no-restrict-it |FileCheck %s define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: ittt ne ; CHECK: cmpne ; CHECK: addne @@ -24,7 +25,7 @@ cond_next: define i32 @t2(i32 %a, i32 %b) nounwind { entry: ; Do not if-convert when branches go to the different loops. -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK-NOT: ite gt ; CHECK-NOT: subgt ; CHECK-NOT: suble @@ -71,10 +72,10 @@ entry: define void @t3(i32 %a, i32 %b) nounwind { entry: -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK: itt ge ; CHECK: movge r0, r1 -; CHECK: blge _foo +; CHECK: blge {{_?}}foo %tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1] br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt2.ll b/test/CodeGen/Thumb2/thumb2-ifcvt2.ll index 5aa9a735f250..403cd48035b4 100644 --- a/test/CodeGen/Thumb2/thumb2-ifcvt2.ll +++ b/test/CodeGen/Thumb2/thumb2-ifcvt2.ll @@ -1,8 +1,10 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-ios | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-apple-ios -arm-default-it | FileCheck %s +; RUN: llc < %s -mtriple=thumbv8-apple-ios -arm-no-restrict-it | FileCheck %s define void @foo(i32 %X, i32 %Y) { entry: -; CHECK: foo: +; CHECK-LABEL: foo: ; CHECK: it ne ; CHECK: cmpne ; CHECK: it hi @@ -28,14 +30,14 @@ declare i32 @bar(...) define fastcc i32 @CountTree(%struct.quad_struct* %tree) { entry: -; CHECK: CountTree: -; CHECK: itt eq -; CHECK: moveq -; CHECK: popeq +; CHECK-LABEL: CountTree: ; CHECK: bne ; CHECK: cmp ; CHECK: it eq ; CHECK: cmpeq +; CHECK: itt eq +; CHECK: moveq +; CHECK: popeq br label %tailrecurse tailrecurse: ; preds = %bb, %entry @@ -65,7 +67,7 @@ declare void @abort() define fastcc void @t1(%struct.SString* %word, i8 signext %c) { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: it ne ; CHECK: popne {r7, pc} %tmp1 = icmp eq %struct.SString* %word, null ; <i1> [#uses=1] @@ -81,7 +83,7 @@ cond_false: ; preds = %entry define fastcc void @t2() nounwind { entry: -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: cmp r0, #0 ; CHECK: %growMapping.exit br i1 undef, label %bb.i.i3, label %growMapping.exit diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt3.ll b/test/CodeGen/Thumb2/thumb2-ifcvt3.ll index bcf10eff729b..a71aa3fb613a 100644 --- a/test/CodeGen/Thumb2/thumb2-ifcvt3.ll +++ b/test/CodeGen/Thumb2/thumb2-ifcvt3.ll @@ -1,4 +1,6 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-default-it | FileCheck %s +; RUN: llc < %s -mtriple=thumbv8-apple-darwin -arm-no-restrict-it | FileCheck %s ; There shouldn't be a unconditional branch at end of bb52. ; rdar://7184787 diff --git a/test/CodeGen/Thumb2/thumb2-ldm.ll b/test/CodeGen/Thumb2/thumb2-ldm.ll index b2328e780074..8716d80a2c8c 100644 --- a/test/CodeGen/Thumb2/thumb2-ldm.ll +++ b/test/CodeGen/Thumb2/thumb2-ldm.ll @@ -3,7 +3,7 @@ @X = external global [0 x i32] ; <[0 x i32]*> [#uses=5] define i32 @t1() { -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: push {r7, lr} ; CHECK: pop {r7, pc} %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 0) ; <i32> [#uses=1] @@ -13,7 +13,7 @@ define i32 @t1() { } define i32 @t2() { -; CHECK: t2: +; CHECK-LABEL: t2: ; CHECK: push {r7, lr} ; CHECK: ldm ; CHECK: pop {r7, pc} @@ -25,7 +25,7 @@ define i32 @t2() { } define i32 @t3() { -; CHECK: t3: +; CHECK-LABEL: t3: ; CHECK: push {r7, lr} ; CHECK: pop {r7, pc} %tmp = load i32* getelementptr ([0 x i32]* @X, i32 0, i32 1) ; <i32> [#uses=1] diff --git a/test/CodeGen/Thumb2/thumb2-ldr.ll b/test/CodeGen/Thumb2/thumb2-ldr.ll index 88434f1c7d80..7f68f661fa9a 100644 --- a/test/CodeGen/Thumb2/thumb2-ldr.ll +++ b/test/CodeGen/Thumb2/thumb2-ldr.ll @@ -2,7 +2,7 @@ define i32 @f1(i32* %v) { entry: -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: ldr r0, [r0] %tmp = load i32* %v ret i32 %tmp @@ -10,7 +10,7 @@ entry: define i32 @f2(i32* %v) { entry: -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: ldr.w r0, [r0, #4092] %tmp2 = getelementptr i32* %v, i32 1023 %tmp = load i32* %tmp2 @@ -19,7 +19,7 @@ entry: define i32 @f3(i32* %v) { entry: -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: mov.w r1, #4096 ; CHECK: ldr r0, [r0, r1] %tmp2 = getelementptr i32* %v, i32 1024 @@ -29,7 +29,7 @@ entry: define i32 @f4(i32 %base) { entry: -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: ldr r0, [r0, #-128] %tmp1 = sub i32 %base, 128 %tmp2 = inttoptr i32 %tmp1 to i32* @@ -39,7 +39,7 @@ entry: define i32 @f5(i32 %base, i32 %offset) { entry: -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: ldr r0, [r0, r1] %tmp1 = add i32 %base, %offset %tmp2 = inttoptr i32 %tmp1 to i32* @@ -49,7 +49,7 @@ entry: define i32 @f6(i32 %base, i32 %offset) { entry: -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: ldr.w r0, [r0, r1, lsl #2] %tmp1 = shl i32 %offset, 2 %tmp2 = add i32 %base, %tmp1 @@ -60,7 +60,7 @@ entry: define i32 @f7(i32 %base, i32 %offset) { entry: -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: lsrs r1, r1, #2 ; CHECK: ldr r0, [r0, r1] diff --git a/test/CodeGen/Thumb2/thumb2-ldrb.ll b/test/CodeGen/Thumb2/thumb2-ldrb.ll index bf1009743afc..c135effd796b 100644 --- a/test/CodeGen/Thumb2/thumb2-ldrb.ll +++ b/test/CodeGen/Thumb2/thumb2-ldrb.ll @@ -2,7 +2,7 @@ define i8 @f1(i8* %v) { entry: -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: ldrb r0, [r0] %tmp = load i8* %v ret i8 %tmp @@ -10,7 +10,7 @@ entry: define i8 @f2(i8* %v) { entry: -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: ldrb r0, [r0, #-1] %tmp2 = getelementptr i8* %v, i8 1023 %tmp = load i8* %tmp2 @@ -19,7 +19,7 @@ entry: define i8 @f3(i32 %base) { entry: -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: mov.w r1, #4096 ; CHECK: ldrb r0, [r0, r1] %tmp1 = add i32 %base, 4096 @@ -30,7 +30,7 @@ entry: define i8 @f4(i32 %base) { entry: -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: ldrb r0, [r0, #-128] %tmp1 = sub i32 %base, 128 %tmp2 = inttoptr i32 %tmp1 to i8* @@ -40,7 +40,7 @@ entry: define i8 @f5(i32 %base, i32 %offset) { entry: -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: ldrb r0, [r0, r1] %tmp1 = add i32 %base, %offset %tmp2 = inttoptr i32 %tmp1 to i8* @@ -50,7 +50,7 @@ entry: define i8 @f6(i32 %base, i32 %offset) { entry: -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: ldrb.w r0, [r0, r1, lsl #2] %tmp1 = shl i32 %offset, 2 %tmp2 = add i32 %base, %tmp1 @@ -61,7 +61,7 @@ entry: define i8 @f7(i32 %base, i32 %offset) { entry: -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: lsrs r1, r1, #2 ; CHECK: ldrb r0, [r0, r1] %tmp1 = lshr i32 %offset, 2 diff --git a/test/CodeGen/Thumb2/thumb2-ldrh.ll b/test/CodeGen/Thumb2/thumb2-ldrh.ll index fee97bf68913..99f6aba65cf0 100644 --- a/test/CodeGen/Thumb2/thumb2-ldrh.ll +++ b/test/CodeGen/Thumb2/thumb2-ldrh.ll @@ -2,7 +2,7 @@ define i16 @f1(i16* %v) { entry: -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: ldrh r0, [r0] %tmp = load i16* %v ret i16 %tmp @@ -10,7 +10,7 @@ entry: define i16 @f2(i16* %v) { entry: -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: ldrh.w r0, [r0, #2046] %tmp2 = getelementptr i16* %v, i16 1023 %tmp = load i16* %tmp2 @@ -19,7 +19,7 @@ entry: define i16 @f3(i16* %v) { entry: -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: mov.w r1, #4096 ; CHECK: ldrh r0, [r0, r1] %tmp2 = getelementptr i16* %v, i16 2048 @@ -29,7 +29,7 @@ entry: define i16 @f4(i32 %base) { entry: -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: ldrh r0, [r0, #-128] %tmp1 = sub i32 %base, 128 %tmp2 = inttoptr i32 %tmp1 to i16* @@ -39,7 +39,7 @@ entry: define i16 @f5(i32 %base, i32 %offset) { entry: -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: ldrh r0, [r0, r1] %tmp1 = add i32 %base, %offset %tmp2 = inttoptr i32 %tmp1 to i16* @@ -49,7 +49,7 @@ entry: define i16 @f6(i32 %base, i32 %offset) { entry: -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: ldrh.w r0, [r0, r1, lsl #2] %tmp1 = shl i32 %offset, 2 %tmp2 = add i32 %base, %tmp1 @@ -60,7 +60,7 @@ entry: define i16 @f7(i32 %base, i32 %offset) { entry: -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: lsrs r1, r1, #2 ; CHECK: ldrh r0, [r0, r1] %tmp1 = lshr i32 %offset, 2 diff --git a/test/CodeGen/Thumb2/thumb2-lsl.ll b/test/CodeGen/Thumb2/thumb2-lsl.ll index 6b0818a34b9b..1b4853853a4e 100644 --- a/test/CodeGen/Thumb2/thumb2-lsl.ll +++ b/test/CodeGen/Thumb2/thumb2-lsl.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: lsls r0, r0, #5 %tmp = shl i32 %a, 5 ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-lsl2.ll b/test/CodeGen/Thumb2/thumb2-lsl2.ll index f283eef89a37..bc0978e68241 100644 --- a/test/CodeGen/Thumb2/thumb2-lsl2.ll +++ b/test/CodeGen/Thumb2/thumb2-lsl2.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a, i32 %b) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: lsls r0, r1 %tmp = shl i32 %a, %b ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-lsr.ll b/test/CodeGen/Thumb2/thumb2-lsr.ll index 7cbee54f381f..a3b207c1f90b 100644 --- a/test/CodeGen/Thumb2/thumb2-lsr.ll +++ b/test/CodeGen/Thumb2/thumb2-lsr.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: lsrs r0, r0, #13 %tmp = lshr i32 %a, 13 ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-lsr2.ll b/test/CodeGen/Thumb2/thumb2-lsr2.ll index 87800f9d73fb..ae55735fabbc 100644 --- a/test/CodeGen/Thumb2/thumb2-lsr2.ll +++ b/test/CodeGen/Thumb2/thumb2-lsr2.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a, i32 %b) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: lsrs r0, r1 %tmp = lshr i32 %a, %b ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-mla.ll b/test/CodeGen/Thumb2/thumb2-mla.ll index 594d9742b0f9..709fa13dd3a1 100644 --- a/test/CodeGen/Thumb2/thumb2-mla.ll +++ b/test/CodeGen/Thumb2/thumb2-mla.ll @@ -6,9 +6,9 @@ define i32 @f1(i32 %a, i32 %b, i32 %c) { %tmp2 = add i32 %c, %tmp1 ret i32 %tmp2 } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: mla r0, r0, r1, r2 -; NO_MULOPS: f1: +; NO_MULOPS-LABEL: f1: ; NO_MULOPS: muls r0, r1, r0 ; NO_MULOPS-NEXT: add r0, r2 @@ -17,8 +17,8 @@ define i32 @f2(i32 %a, i32 %b, i32 %c) { %tmp2 = add i32 %tmp1, %c ret i32 %tmp2 } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: mla r0, r0, r1, r2 -; NO_MULOPS: f2: +; NO_MULOPS-LABEL: f2: ; NO_MULOPS: muls r0, r1, r0 ; NO_MULOPS-NEXT: add r0, r2 diff --git a/test/CodeGen/Thumb2/thumb2-mls.ll b/test/CodeGen/Thumb2/thumb2-mls.ll index 58f9add0fc60..86e147b24018 100644 --- a/test/CodeGen/Thumb2/thumb2-mls.ll +++ b/test/CodeGen/Thumb2/thumb2-mls.ll @@ -5,7 +5,7 @@ define i32 @f1(i32 %a, i32 %b, i32 %c) { %tmp2 = sub i32 %c, %tmp1 ret i32 %tmp2 } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: mls r0, r0, r1, r2 ; sub doesn't commute, so no mls for this one @@ -14,6 +14,6 @@ define i32 @f2(i32 %a, i32 %b, i32 %c) { %tmp2 = sub i32 %tmp1, %c ret i32 %tmp2 } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: muls r0, r1, r0 diff --git a/test/CodeGen/Thumb2/thumb2-mov.ll b/test/CodeGen/Thumb2/thumb2-mov.ll index adb6dde2c788..148bafec4014 100644 --- a/test/CodeGen/Thumb2/thumb2-mov.ll +++ b/test/CodeGen/Thumb2/thumb2-mov.ll @@ -4,14 +4,14 @@ ; var 2.1 - 0x00ab00ab define i32 @t2_const_var2_1_ok_1(i32 %lhs) { -;CHECK: t2_const_var2_1_ok_1: +;CHECK-LABEL: t2_const_var2_1_ok_1: ;CHECK: add.w r0, r0, #11206827 %ret = add i32 %lhs, 11206827 ; 0x00ab00ab ret i32 %ret } define i32 @t2_const_var2_1_ok_2(i32 %lhs) { -;CHECK: t2_const_var2_1_ok_2: +;CHECK-LABEL: t2_const_var2_1_ok_2: ;CHECK: add.w r0, r0, #11206656 ;CHECK: adds r0, #187 %ret = add i32 %lhs, 11206843 ; 0x00ab00bb @@ -19,7 +19,7 @@ define i32 @t2_const_var2_1_ok_2(i32 %lhs) { } define i32 @t2_const_var2_1_ok_3(i32 %lhs) { -;CHECK: t2_const_var2_1_ok_3: +;CHECK-LABEL: t2_const_var2_1_ok_3: ;CHECK: add.w r0, r0, #11206827 ;CHECK: add.w r0, r0, #16777216 %ret = add i32 %lhs, 27984043 ; 0x01ab00ab @@ -27,7 +27,7 @@ define i32 @t2_const_var2_1_ok_3(i32 %lhs) { } define i32 @t2_const_var2_1_ok_4(i32 %lhs) { -;CHECK: t2_const_var2_1_ok_4: +;CHECK-LABEL: t2_const_var2_1_ok_4: ;CHECK: add.w r0, r0, #16777472 ;CHECK: add.w r0, r0, #11206827 %ret = add i32 %lhs, 27984299 ; 0x01ab01ab @@ -35,7 +35,7 @@ define i32 @t2_const_var2_1_ok_4(i32 %lhs) { } define i32 @t2_const_var2_1_fail_1(i32 %lhs) { -;CHECK: t2_const_var2_1_fail_1: +;CHECK-LABEL: t2_const_var2_1_fail_1: ;CHECK: movw r1, #43777 ;CHECK: movt r1, #427 ;CHECK: add r0, r1 @@ -45,14 +45,14 @@ define i32 @t2_const_var2_1_fail_1(i32 %lhs) { ; var 2.2 - 0xab00ab00 define i32 @t2_const_var2_2_ok_1(i32 %lhs) { -;CHECK: t2_const_var2_2_ok_1: +;CHECK-LABEL: t2_const_var2_2_ok_1: ;CHECK: add.w r0, r0, #-1426019584 %ret = add i32 %lhs, 2868947712 ; 0xab00ab00 ret i32 %ret } define i32 @t2_const_var2_2_ok_2(i32 %lhs) { -;CHECK: t2_const_var2_2_ok_2: +;CHECK-LABEL: t2_const_var2_2_ok_2: ;CHECK: add.w r0, r0, #2868903936 ;CHECK: add.w r0, r0, #47616 %ret = add i32 %lhs, 2868951552 ; 0xab00ba00 @@ -60,7 +60,7 @@ define i32 @t2_const_var2_2_ok_2(i32 %lhs) { } define i32 @t2_const_var2_2_ok_3(i32 %lhs) { -;CHECK: t2_const_var2_2_ok_3: +;CHECK-LABEL: t2_const_var2_2_ok_3: ;CHECK: add.w r0, r0, #2868947712 ;CHECK: adds r0, #16 %ret = add i32 %lhs, 2868947728 ; 0xab00ab10 @@ -68,7 +68,7 @@ define i32 @t2_const_var2_2_ok_3(i32 %lhs) { } define i32 @t2_const_var2_2_ok_4(i32 %lhs) { -;CHECK: t2_const_var2_2_ok_4: +;CHECK-LABEL: t2_const_var2_2_ok_4: ;CHECK: add.w r0, r0, #2868947712 ;CHECK: add.w r0, r0, #1048592 %ret = add i32 %lhs, 2869996304 ; 0xab10ab10 @@ -76,7 +76,7 @@ define i32 @t2_const_var2_2_ok_4(i32 %lhs) { } define i32 @t2_const_var2_2_fail_1(i32 %lhs) { -;CHECK: t2_const_var2_2_fail_1: +;CHECK-LABEL: t2_const_var2_2_fail_1: ;CHECK: movw r1, #43792 ;CHECK: movt r1, #4267 ;CHECK: add r0, r1 @@ -86,14 +86,14 @@ define i32 @t2_const_var2_2_fail_1(i32 %lhs) { ; var 2.3 - 0xabababab define i32 @t2_const_var2_3_ok_1(i32 %lhs) { -;CHECK: t2_const_var2_3_ok_1: +;CHECK-LABEL: t2_const_var2_3_ok_1: ;CHECK: add.w r0, r0, #-1414812757 %ret = add i32 %lhs, 2880154539 ; 0xabababab ret i32 %ret } define i32 @t2_const_var2_3_fail_1(i32 %lhs) { -;CHECK: t2_const_var2_3_fail_1: +;CHECK-LABEL: t2_const_var2_3_fail_1: ;CHECK: movw r1, #43962 ;CHECK: movt r1, #43947 ;CHECK: add r0, r1 @@ -102,7 +102,7 @@ define i32 @t2_const_var2_3_fail_1(i32 %lhs) { } define i32 @t2_const_var2_3_fail_2(i32 %lhs) { -;CHECK: t2_const_var2_3_fail_2: +;CHECK-LABEL: t2_const_var2_3_fail_2: ;CHECK: movw r1, #47787 ;CHECK: movt r1, #43947 ;CHECK: add r0, r1 @@ -111,7 +111,7 @@ define i32 @t2_const_var2_3_fail_2(i32 %lhs) { } define i32 @t2_const_var2_3_fail_3(i32 %lhs) { -;CHECK: t2_const_var2_3_fail_3: +;CHECK-LABEL: t2_const_var2_3_fail_3: ;CHECK: movw r1, #43947 ;CHECK: movt r1, #43962 ;CHECK: add r0, r1 @@ -120,7 +120,7 @@ define i32 @t2_const_var2_3_fail_3(i32 %lhs) { } define i32 @t2_const_var2_3_fail_4(i32 %lhs) { -;CHECK: t2_const_var2_3_fail_4: +;CHECK-LABEL: t2_const_var2_3_fail_4: ;CHECK: movw r1, #43947 ;CHECK: movt r1, #47787 ;CHECK: add r0, r1 @@ -130,21 +130,21 @@ define i32 @t2_const_var2_3_fail_4(i32 %lhs) { ; var 3 - 0x0F000000 define i32 @t2_const_var3_1_ok_1(i32 %lhs) { -;CHECK: t2_const_var3_1_ok_1: +;CHECK-LABEL: t2_const_var3_1_ok_1: ;CHECK: add.w r0, r0, #251658240 %ret = add i32 %lhs, 251658240 ; 0x0F000000 ret i32 %ret } define i32 @t2_const_var3_2_ok_1(i32 %lhs) { -;CHECK: t2_const_var3_2_ok_1: +;CHECK-LABEL: t2_const_var3_2_ok_1: ;CHECK: add.w r0, r0, #3948544 %ret = add i32 %lhs, 3948544 ; 0b00000000001111000100000000000000 ret i32 %ret } define i32 @t2_const_var3_2_ok_2(i32 %lhs) { -;CHECK: t2_const_var3_2_ok_2: +;CHECK-LABEL: t2_const_var3_2_ok_2: ;CHECK: add.w r0, r0, #2097152 ;CHECK: add.w r0, r0, #1843200 %ret = add i32 %lhs, 3940352 ; 0b00000000001111000010000000000000 @@ -152,21 +152,21 @@ define i32 @t2_const_var3_2_ok_2(i32 %lhs) { } define i32 @t2_const_var3_3_ok_1(i32 %lhs) { -;CHECK: t2_const_var3_3_ok_1: +;CHECK-LABEL: t2_const_var3_3_ok_1: ;CHECK: add.w r0, r0, #258 %ret = add i32 %lhs, 258 ; 0b00000000000000000000000100000010 ret i32 %ret } define i32 @t2_const_var3_4_ok_1(i32 %lhs) { -;CHECK: t2_const_var3_4_ok_1: +;CHECK-LABEL: t2_const_var3_4_ok_1: ;CHECK: add.w r0, r0, #-268435456 %ret = add i32 %lhs, 4026531840 ; 0xF0000000 ret i32 %ret } define i32 @t2MOVTi16_ok_1(i32 %a) { -; CHECK: t2MOVTi16_ok_1: +; CHECK-LABEL: t2MOVTi16_ok_1: ; CHECK: movt r0, #1234 %1 = and i32 %a, 65535 %2 = shl i32 1234, 16 @@ -176,7 +176,7 @@ define i32 @t2MOVTi16_ok_1(i32 %a) { } define i32 @t2MOVTi16_test_1(i32 %a) { -; CHECK: t2MOVTi16_test_1: +; CHECK-LABEL: t2MOVTi16_test_1: ; CHECK: movt r0, #1234 %1 = shl i32 255, 8 %2 = shl i32 1234, 8 @@ -189,7 +189,7 @@ define i32 @t2MOVTi16_test_1(i32 %a) { } define i32 @t2MOVTi16_test_2(i32 %a) { -; CHECK: t2MOVTi16_test_2: +; CHECK-LABEL: t2MOVTi16_test_2: ; CHECK: movt r0, #1234 %1 = shl i32 255, 8 %2 = shl i32 1234, 8 @@ -203,7 +203,7 @@ define i32 @t2MOVTi16_test_2(i32 %a) { } define i32 @t2MOVTi16_test_3(i32 %a) { -; CHECK: t2MOVTi16_test_3: +; CHECK-LABEL: t2MOVTi16_test_3: ; CHECK: movt r0, #1234 %1 = shl i32 255, 8 %2 = shl i32 1234, 8 @@ -220,7 +220,7 @@ define i32 @t2MOVTi16_test_3(i32 %a) { ; 171 = 0x000000ab define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: movs r0, #171 %tmp = add i32 0, 171 ret i32 %tmp @@ -228,7 +228,7 @@ define i32 @f1(i32 %a) { ; 1179666 = 0x00120012 define i32 @f2(i32 %a) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: mov.w r0, #1179666 %tmp = add i32 0, 1179666 ret i32 %tmp @@ -236,7 +236,7 @@ define i32 @f2(i32 %a) { ; 872428544 = 0x34003400 define i32 @f3(i32 %a) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: mov.w r0, #872428544 %tmp = add i32 0, 872428544 ret i32 %tmp @@ -244,7 +244,7 @@ define i32 @f3(i32 %a) { ; 1448498774 = 0x56565656 define i32 @f4(i32 %a) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: mov.w r0, #1448498774 %tmp = add i32 0, 1448498774 ret i32 %tmp @@ -252,14 +252,14 @@ define i32 @f4(i32 %a) { ; 66846720 = 0x03fc0000 define i32 @f5(i32 %a) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: mov.w r0, #66846720 %tmp = add i32 0, 66846720 ret i32 %tmp } define i32 @f6(i32 %a) { -;CHECK: f6 +;CHECK-LABEL: f6: ;CHECK: movw r0, #65535 %tmp = add i32 0, 65535 ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-mul.ll b/test/CodeGen/Thumb2/thumb2-mul.ll index a8134e630821..a989989b43f7 100644 --- a/test/CodeGen/Thumb2/thumb2-mul.ll +++ b/test/CodeGen/Thumb2/thumb2-mul.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a, i32 %b, i32 %c) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: muls r0, r1, r0 %tmp = mul i32 %a, %b ret i32 %tmp @@ -12,7 +12,7 @@ define i32 @f1(i32 %a, i32 %b, i32 %c) { define %struct.CMPoint* @t1(i32 %i, i32 %j, i32 %n, %struct.CMPoint* %thePoints) nounwind readnone ssp { entry: -; CHECK: t1: +; CHECK-LABEL: t1: ; CHECK: mla r0, r2, r0, r1 ; CHECK: add.w r0, r0, r0, lsl #3 ; CHECK: add.w r0, r3, r0, lsl #2 diff --git a/test/CodeGen/Thumb2/thumb2-mvn.ll b/test/CodeGen/Thumb2/thumb2-mvn.ll index a8c8f831c75a..a5592f6b9276 100644 --- a/test/CodeGen/Thumb2/thumb2-mvn.ll +++ b/test/CodeGen/Thumb2/thumb2-mvn.ll @@ -2,7 +2,7 @@ ; 0x000000bb = 187 define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: mvn r0, #187 %tmp = xor i32 4294967295, 187 ret i32 %tmp @@ -10,7 +10,7 @@ define i32 @f1(i32 %a) { ; 0x00aa00aa = 11141290 define i32 @f2(i32 %a) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: mvn r0, #11141290 %tmp = xor i32 4294967295, 11141290 ret i32 %tmp @@ -18,7 +18,7 @@ define i32 @f2(i32 %a) { ; 0xcc00cc00 = 3422604288 define i32 @f3(i32 %a) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: mvn r0, #-872363008 %tmp = xor i32 4294967295, 3422604288 ret i32 %tmp @@ -26,7 +26,7 @@ define i32 @f3(i32 %a) { ; 0x00110000 = 1114112 define i32 @f5(i32 %a) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: mvn r0, #1114112 %tmp = xor i32 4294967295, 1114112 ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-mvn2.ll b/test/CodeGen/Thumb2/thumb2-mvn2.ll index 375d0aad5021..bce54a352e80 100644 --- a/test/CodeGen/Thumb2/thumb2-mvn2.ll +++ b/test/CodeGen/Thumb2/thumb2-mvn2.ll @@ -1,21 +1,21 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: mvns r0, r0 %tmp = xor i32 4294967295, %a ret i32 %tmp } define i32 @f2(i32 %a) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: mvns r0, r0 %tmp = xor i32 %a, 4294967295 ret i32 %tmp } define i32 @f5(i32 %a) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: mvn.w r0, r0, lsl #5 %tmp = shl i32 %a, 5 %tmp1 = xor i32 %tmp, 4294967295 @@ -23,7 +23,7 @@ define i32 @f5(i32 %a) { } define i32 @f6(i32 %a) { -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: mvn.w r0, r0, lsr #6 %tmp = lshr i32 %a, 6 %tmp1 = xor i32 %tmp, 4294967295 @@ -31,7 +31,7 @@ define i32 @f6(i32 %a) { } define i32 @f7(i32 %a) { -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: mvn.w r0, r0, asr #7 %tmp = ashr i32 %a, 7 %tmp1 = xor i32 %tmp, 4294967295 @@ -39,7 +39,7 @@ define i32 @f7(i32 %a) { } define i32 @f8(i32 %a) { -; CHECK: f8: +; CHECK-LABEL: f8: ; CHECK: mvn.w r0, r0, ror #8 %l8 = shl i32 %a, 24 %r8 = lshr i32 %a, 8 diff --git a/test/CodeGen/Thumb2/thumb2-neg.ll b/test/CodeGen/Thumb2/thumb2-neg.ll index 6bf11ec90621..40e809862140 100644 --- a/test/CodeGen/Thumb2/thumb2-neg.ll +++ b/test/CodeGen/Thumb2/thumb2-neg.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: rsbs r0, r0, #0 %tmp = sub i32 0, %a ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-orn.ll b/test/CodeGen/Thumb2/thumb2-orn.ll index 97a3fd75f068..5bbe653cd12e 100644 --- a/test/CodeGen/Thumb2/thumb2-orn.ll +++ b/test/CodeGen/Thumb2/thumb2-orn.ll @@ -6,7 +6,7 @@ define i32 @f1(i32 %a, i32 %b) { %tmp1 = or i32 %a, %tmp ret i32 %tmp1 } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: orn r0, r0, r1 define i32 @f2(i32 %a, i32 %b) { @@ -14,7 +14,7 @@ define i32 @f2(i32 %a, i32 %b) { %tmp1 = or i32 %tmp, %a ret i32 %tmp1 } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: orn r0, r0, r1 define i32 @f3(i32 %a, i32 %b) { @@ -22,7 +22,7 @@ define i32 @f3(i32 %a, i32 %b) { %tmp1 = or i32 %a, %tmp ret i32 %tmp1 } -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: orn r0, r0, r1 define i32 @f4(i32 %a, i32 %b) { @@ -30,7 +30,7 @@ define i32 @f4(i32 %a, i32 %b) { %tmp1 = or i32 %tmp, %a ret i32 %tmp1 } -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: orn r0, r0, r1 define i32 @f5(i32 %a, i32 %b) { @@ -39,7 +39,7 @@ define i32 @f5(i32 %a, i32 %b) { %tmp2 = or i32 %a, %tmp1 ret i32 %tmp2 } -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: orn r0, r0, r1, lsl #5 define i32 @f6(i32 %a, i32 %b) { @@ -48,7 +48,7 @@ define i32 @f6(i32 %a, i32 %b) { %tmp2 = or i32 %a, %tmp1 ret i32 %tmp2 } -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: orn r0, r0, r1, lsr #6 define i32 @f7(i32 %a, i32 %b) { @@ -57,7 +57,7 @@ define i32 @f7(i32 %a, i32 %b) { %tmp2 = or i32 %a, %tmp1 ret i32 %tmp2 } -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: orn r0, r0, r1, asr #7 define i32 @f8(i32 %a, i32 %b) { @@ -68,5 +68,5 @@ define i32 @f8(i32 %a, i32 %b) { %tmp2 = or i32 %a, %tmp1 ret i32 %tmp2 } -; CHECK: f8: +; CHECK-LABEL: f8: ; CHECK: orn r0, r0, r0, ror #8 diff --git a/test/CodeGen/Thumb2/thumb2-orn2.ll b/test/CodeGen/Thumb2/thumb2-orn2.ll index 34ab3a56663c..eff3ae38a056 100644 --- a/test/CodeGen/Thumb2/thumb2-orn2.ll +++ b/test/CodeGen/Thumb2/thumb2-orn2.ll @@ -7,7 +7,7 @@ define i32 @f1(i32 %a) { %tmp2 = or i32 %a, %tmp1 ret i32 %tmp2 } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: orn r0, r0, #187 ; 0x00aa00aa = 11141290 @@ -16,7 +16,7 @@ define i32 @f2(i32 %a) { %tmp2 = or i32 %a, %tmp1 ret i32 %tmp2 } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: orn r0, r0, #11141290 ; 0xcc00cc00 = 3422604288 @@ -25,7 +25,7 @@ define i32 @f3(i32 %a) { %tmp2 = or i32 %a, %tmp1 ret i32 %tmp2 } -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: orn r0, r0, #-872363008 ; 0x00110000 = 1114112 @@ -34,5 +34,5 @@ define i32 @f5(i32 %a) { %tmp2 = or i32 %a, %tmp1 ret i32 %tmp2 } -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: orn r0, r0, #1114112 diff --git a/test/CodeGen/Thumb2/thumb2-orr.ll b/test/CodeGen/Thumb2/thumb2-orr.ll index 89ab7b1edf70..13ed8620059b 100644 --- a/test/CodeGen/Thumb2/thumb2-orr.ll +++ b/test/CodeGen/Thumb2/thumb2-orr.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a, i32 %b) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: orrs r0, r1 %tmp2 = or i32 %a, %b ret i32 %tmp2 } define i32 @f5(i32 %a, i32 %b) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: orr.w r0, r0, r1, lsl #5 %tmp = shl i32 %b, 5 %tmp2 = or i32 %a, %tmp @@ -16,7 +16,7 @@ define i32 @f5(i32 %a, i32 %b) { } define i32 @f6(i32 %a, i32 %b) { -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: orr.w r0, r0, r1, lsr #6 %tmp = lshr i32 %b, 6 %tmp2 = or i32 %a, %tmp @@ -24,7 +24,7 @@ define i32 @f6(i32 %a, i32 %b) { } define i32 @f7(i32 %a, i32 %b) { -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: orr.w r0, r0, r1, asr #7 %tmp = ashr i32 %b, 7 %tmp2 = or i32 %a, %tmp @@ -32,7 +32,7 @@ define i32 @f7(i32 %a, i32 %b) { } define i32 @f8(i32 %a, i32 %b) { -; CHECK: f8: +; CHECK-LABEL: f8: ; CHECK: orr.w r0, r0, r0, ror #8 %l8 = shl i32 %a, 24 %r8 = lshr i32 %a, 8 diff --git a/test/CodeGen/Thumb2/thumb2-orr2.ll b/test/CodeGen/Thumb2/thumb2-orr2.ll index 8f7a3c2a61a9..837bb1cb07c1 100644 --- a/test/CodeGen/Thumb2/thumb2-orr2.ll +++ b/test/CodeGen/Thumb2/thumb2-orr2.ll @@ -6,7 +6,7 @@ define i32 @f1(i32 %a) { %tmp2 = or i32 %a, 187 ret i32 %tmp2 } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: orr r0, r0, #187 ; 0x00aa00aa = 11141290 @@ -14,7 +14,7 @@ define i32 @f2(i32 %a) { %tmp2 = or i32 %a, 11141290 ret i32 %tmp2 } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: orr r0, r0, #11141290 ; 0xcc00cc00 = 3422604288 @@ -22,7 +22,7 @@ define i32 @f3(i32 %a) { %tmp2 = or i32 %a, 3422604288 ret i32 %tmp2 } -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: orr r0, r0, #-872363008 ; 0x44444444 = 1145324612 @@ -30,7 +30,7 @@ define i32 @f4(i32 %a) { %tmp2 = or i32 %a, 1145324612 ret i32 %tmp2 } -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: orr r0, r0, #1145324612 ; 0x00110000 = 1114112 @@ -38,5 +38,5 @@ define i32 @f5(i32 %a) { %tmp2 = or i32 %a, 1114112 ret i32 %tmp2 } -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: orr r0, r0, #1114112 diff --git a/test/CodeGen/Thumb2/thumb2-pack.ll b/test/CodeGen/Thumb2/thumb2-pack.ll index 2e8bb1d60934..1052dd2a072e 100644 --- a/test/CodeGen/Thumb2/thumb2-pack.ll +++ b/test/CodeGen/Thumb2/thumb2-pack.ll @@ -88,10 +88,33 @@ define i32 @test7(i32 %X, i32 %Y) { } ; CHECK: test8 -; CHECK: pkhtb r0, r0, r1, asr #22 +; CHECK-NOT: pkhtb r0, r0, r1, asr #22 +; pkhtb does an arithmetic shift, not a logical shift. Make sure we don't +; use it for problematic cases when whether sign bits would be shifted in +; would matter. define i32 @test8(i32 %X, i32 %Y) { %tmp1 = and i32 %X, -65536 %tmp3 = lshr i32 %Y, 22 %tmp57 = or i32 %tmp3, %tmp1 ret i32 %tmp57 } + +; CHECK-LABEL: test9: +; CHECK: pkhtb r0, r0, r1, asr #16 +define i32 @test9(i32 %src1, i32 %src2) { +entry: + %tmp = and i32 %src1, -65536 + %tmp2 = lshr i32 %src2, 16 + %tmp3 = or i32 %tmp, %tmp2 + ret i32 %tmp3 +} + +; CHECK: test10 +; CHECK: pkhtb r0, r0, r1, asr #22 +define i32 @test10(i32 %X, i32 %Y) { + %tmp1 = and i32 %X, -65536 + %tmp3 = ashr i32 %Y, 22 + %tmp57 = or i32 %tmp3, %tmp1 + ret i32 %tmp57 +} + diff --git a/test/CodeGen/Thumb2/thumb2-rev.ll b/test/CodeGen/Thumb2/thumb2-rev.ll index b469bbd3f7b5..67cd62362fe9 100644 --- a/test/CodeGen/Thumb2/thumb2-rev.ll +++ b/test/CodeGen/Thumb2/thumb2-rev.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7,+t2xtpk | FileCheck %s define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: rev r0, r0 %tmp = tail call i32 @llvm.bswap.i32(i32 %a) ret i32 %tmp @@ -10,7 +10,7 @@ define i32 @f1(i32 %a) { declare i32 @llvm.bswap.i32(i32) nounwind readnone define i32 @f2(i32 %X) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: revsh r0, r0 %tmp1 = lshr i32 %X, 8 %tmp1.upgrd.1 = trunc i32 %tmp1 to i16 diff --git a/test/CodeGen/Thumb2/thumb2-ror.ll b/test/CodeGen/Thumb2/thumb2-ror.ll index 5ad92cd7290d..2a218eae9752 100644 --- a/test/CodeGen/Thumb2/thumb2-ror.ll +++ b/test/CodeGen/Thumb2/thumb2-ror.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s ; RUN: llc < %s -march=thumb | FileCheck %s -check-prefix=THUMB1 -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: ror.w r0, r0, #22 define i32 @f1(i32 %a) { %l8 = shl i32 %a, 10 @@ -10,7 +10,7 @@ define i32 @f1(i32 %a) { ret i32 %tmp } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK-NOT: and ; CHECK: ror ; THUMB1: f2 diff --git a/test/CodeGen/Thumb2/thumb2-rsb.ll b/test/CodeGen/Thumb2/thumb2-rsb.ll index 15185be94621..150a25f51b54 100644 --- a/test/CodeGen/Thumb2/thumb2-rsb.ll +++ b/test/CodeGen/Thumb2/thumb2-rsb.ll @@ -5,7 +5,7 @@ define i32 @f1(i32 %a, i32 %b) { %tmp1 = sub i32 %tmp, %a ret i32 %tmp1 } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: rsb r0, r0, r1, lsl #5 define i32 @f2(i32 %a, i32 %b) { @@ -13,7 +13,7 @@ define i32 @f2(i32 %a, i32 %b) { %tmp1 = sub i32 %tmp, %a ret i32 %tmp1 } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: rsb r0, r0, r1, lsr #6 define i32 @f3(i32 %a, i32 %b) { @@ -21,7 +21,7 @@ define i32 @f3(i32 %a, i32 %b) { %tmp1 = sub i32 %tmp, %a ret i32 %tmp1 } -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: rsb r0, r0, r1, asr #7 define i32 @f4(i32 %a, i32 %b) { @@ -31,5 +31,5 @@ define i32 @f4(i32 %a, i32 %b) { %tmp1 = sub i32 %tmp, %a ret i32 %tmp1 } -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: rsb r0, r0, r0, ror #8 diff --git a/test/CodeGen/Thumb2/thumb2-rsb2.ll b/test/CodeGen/Thumb2/thumb2-rsb2.ll index 61fb619c40e7..15aa8af3b83b 100644 --- a/test/CodeGen/Thumb2/thumb2-rsb2.ll +++ b/test/CodeGen/Thumb2/thumb2-rsb2.ll @@ -5,7 +5,7 @@ define i32 @f1(i32 %a) { %tmp = sub i32 171, %a ret i32 %tmp } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: rsb.w r0, r0, #171 ; 1179666 = 0x00120012 @@ -13,7 +13,7 @@ define i32 @f2(i32 %a) { %tmp = sub i32 1179666, %a ret i32 %tmp } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: rsb.w r0, r0, #1179666 ; 872428544 = 0x34003400 @@ -21,7 +21,7 @@ define i32 @f3(i32 %a) { %tmp = sub i32 872428544, %a ret i32 %tmp } -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: rsb.w r0, r0, #872428544 ; 1448498774 = 0x56565656 @@ -29,7 +29,7 @@ define i32 @f4(i32 %a) { %tmp = sub i32 1448498774, %a ret i32 %tmp } -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: rsb.w r0, r0, #1448498774 ; 66846720 = 0x03fc0000 @@ -37,5 +37,5 @@ define i32 @f5(i32 %a) { %tmp = sub i32 66846720, %a ret i32 %tmp } -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: rsb.w r0, r0, #66846720 diff --git a/test/CodeGen/Thumb2/thumb2-sbc.ll b/test/CodeGen/Thumb2/thumb2-sbc.ll index 492e5f0eacc0..0c37984ba3e7 100644 --- a/test/CodeGen/Thumb2/thumb2-sbc.ll +++ b/test/CodeGen/Thumb2/thumb2-sbc.ll @@ -54,7 +54,7 @@ define i64 @f6(i64 %a) { ; Example from numerics code that manually computes wider-than-64 values. ; -; CHECK: livecarry: +; CHECK-LABEL: livecarry: ; CHECK: adds ; CHECK: adc define i64 @livecarry(i64 %carry, i32 %digit) nounwind { diff --git a/test/CodeGen/Thumb2/thumb2-select.ll b/test/CodeGen/Thumb2/thumb2-select.ll index 2dcf8aaa24c5..5f5fa1992516 100644 --- a/test/CodeGen/Thumb2/thumb2-select.ll +++ b/test/CodeGen/Thumb2/thumb2-select.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s +; RUN: llc < %s -march=thumb -mattr=+thumb2 -show-mc-encoding | FileCheck %s define i32 @f1(i32 %a.s) { entry: -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: it eq ; CHECK: moveq @@ -13,7 +13,7 @@ entry: define i32 @f2(i32 %a.s) { entry: -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: it gt ; CHECK: movgt %tmp = icmp sgt i32 %a.s, 4 @@ -23,7 +23,7 @@ entry: define i32 @f3(i32 %a.s, i32 %b.s) { entry: -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: it lt ; CHECK: movlt %tmp = icmp slt i32 %a.s, %b.s @@ -33,7 +33,7 @@ entry: define i32 @f4(i32 %a.s, i32 %b.s) { entry: -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: it le ; CHECK: movle @@ -44,7 +44,7 @@ entry: define i32 @f5(i32 %a.u, i32 %b.u) { entry: -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: it ls ; CHECK: movls %tmp = icmp ule i32 %a.u, %b.u @@ -54,7 +54,7 @@ entry: define i32 @f6(i32 %a.u, i32 %b.u) { entry: -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: it hi ; CHECK: movhi %tmp = icmp ugt i32 %a.u, %b.u @@ -64,9 +64,9 @@ entry: define i32 @f7(i32 %a, i32 %b, i32 %c) { entry: -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: it hi -; CHECK: lsrhi.w +; CHECK: lsrhi {{r[0-9]+}} %tmp1 = icmp ugt i32 %a, %b %tmp2 = udiv i32 %c, 3 %tmp3 = select i1 %tmp1, i32 %tmp2, i32 3 @@ -75,9 +75,9 @@ entry: define i32 @f8(i32 %a, i32 %b, i32 %c) { entry: -; CHECK: f8: +; CHECK-LABEL: f8: ; CHECK: it lo -; CHECK: lsllo.w +; CHECK: lsllo {{r[0-9]+}} %tmp1 = icmp ult i32 %a, %b %tmp2 = mul i32 %c, 4 %tmp3 = select i1 %tmp1, i32 %tmp2, i32 3 @@ -86,7 +86,7 @@ entry: define i32 @f9(i32 %a, i32 %b, i32 %c) { entry: -; CHECK: f9: +; CHECK-LABEL: f9: ; CHECK: it ge ; CHECK: rorge.w %tmp1 = icmp sge i32 %a, %b @@ -96,3 +96,20 @@ entry: %tmp5 = select i1 %tmp1, i32 %tmp4, i32 3 ret i32 %tmp5 } + +define i32 @f10(i32 %a, i32 %b) { +; CHECK-LABEL: f10: +; CHECK: movwne {{r[0-9]+}}, #1234 @ encoding: [0x40,0xf2,0xd2,0x4{{[0-9a-f]+}}] + %tst = icmp ne i32 %a, %b + %val = select i1 %tst, i32 1234, i32 12345 + ret i32 %val +} + +; Make sure we pick the Thumb encoding for movw/movt +define i32 @f11(i32 %a, i32 %b) { +; CHECK-LABEL: f11: +; CHECK: movwne {{r[0-9]+}}, #50033 @ encoding: [0x4c,0xf2,0x71,0x3{{[0-9a-f]+}}] + %tst = icmp ne i32 %a, %b + %val = select i1 %tst, i32 123454321, i32 543212345 + ret i32 %val +} diff --git a/test/CodeGen/Thumb2/thumb2-spill-q.ll b/test/CodeGen/Thumb2/thumb2-spill-q.ll index 5bff268e2c3e..52c106344910 100644 --- a/test/CodeGen/Thumb2/thumb2-spill-q.ll +++ b/test/CodeGen/Thumb2/thumb2-spill-q.ll @@ -10,7 +10,7 @@ declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly define void @aaa(%quuz* %this, i8* %block) { -; CHECK: aaa: +; CHECK-LABEL: aaa: ; CHECK: bic r4, r4, #15 ; CHECK: vst1.64 {{.*}}[{{.*}}:128] ; CHECK: vld1.64 {{.*}}[{{.*}}:128] diff --git a/test/CodeGen/Thumb2/thumb2-str.ll b/test/CodeGen/Thumb2/thumb2-str.ll index 11bb936d1e64..fb5fa168e8b8 100644 --- a/test/CodeGen/Thumb2/thumb2-str.ll +++ b/test/CodeGen/Thumb2/thumb2-str.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a, i32* %v) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: str r0, [r1] store i32 %a, i32* %v ret i32 %a } define i32 @f2(i32 %a, i32* %v) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: str.w r0, [r1, #4092] %tmp2 = getelementptr i32* %v, i32 1023 store i32 %a, i32* %tmp2 @@ -16,7 +16,7 @@ define i32 @f2(i32 %a, i32* %v) { } define i32 @f2a(i32 %a, i32* %v) { -; CHECK: f2a: +; CHECK-LABEL: f2a: ; CHECK: str r0, [r1, #-128] %tmp2 = getelementptr i32* %v, i32 -32 store i32 %a, i32* %tmp2 @@ -24,7 +24,7 @@ define i32 @f2a(i32 %a, i32* %v) { } define i32 @f3(i32 %a, i32* %v) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: mov.w r2, #4096 ; CHECK: str r0, [r1, r2] %tmp2 = getelementptr i32* %v, i32 1024 @@ -34,7 +34,7 @@ define i32 @f3(i32 %a, i32* %v) { define i32 @f4(i32 %a, i32 %base) { entry: -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: str r0, [r1, #-128] %tmp1 = sub i32 %base, 128 %tmp2 = inttoptr i32 %tmp1 to i32* @@ -44,7 +44,7 @@ entry: define i32 @f5(i32 %a, i32 %base, i32 %offset) { entry: -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: str r0, [r1, r2] %tmp1 = add i32 %base, %offset %tmp2 = inttoptr i32 %tmp1 to i32* @@ -54,7 +54,7 @@ entry: define i32 @f6(i32 %a, i32 %base, i32 %offset) { entry: -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: str.w r0, [r1, r2, lsl #2] %tmp1 = shl i32 %offset, 2 %tmp2 = add i32 %base, %tmp1 @@ -65,7 +65,7 @@ entry: define i32 @f7(i32 %a, i32 %base, i32 %offset) { entry: -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: lsrs r2, r2, #2 ; CHECK: str r0, [r1, r2] %tmp1 = lshr i32 %offset, 2 diff --git a/test/CodeGen/Thumb2/thumb2-str_post.ll b/test/CodeGen/Thumb2/thumb2-str_post.ll index bbfb447ca3ef..2133d2807006 100644 --- a/test/CodeGen/Thumb2/thumb2-str_post.ll +++ b/test/CodeGen/Thumb2/thumb2-str_post.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i16 @test1(i32* %X, i16* %A) { -; CHECK: test1: +; CHECK-LABEL: test1: ; CHECK: strh {{.*}}[{{.*}}], #-4 %Y = load i32* %X ; <i32> [#uses=1] %tmp1 = trunc i32 %Y to i16 ; <i16> [#uses=1] @@ -12,7 +12,7 @@ define i16 @test1(i32* %X, i16* %A) { } define i32 @test2(i32* %X, i32* %A) { -; CHECK: test2: +; CHECK-LABEL: test2: ; CHECK: str {{.*}}[{{.*}}], %Y = load i32* %X ; <i32> [#uses=1] store i32 %Y, i32* %A diff --git a/test/CodeGen/Thumb2/thumb2-strb.ll b/test/CodeGen/Thumb2/thumb2-strb.ll index 7978e7fa918e..cc39b7d585c5 100644 --- a/test/CodeGen/Thumb2/thumb2-strb.ll +++ b/test/CodeGen/Thumb2/thumb2-strb.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i8 @f1(i8 %a, i8* %v) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: strb r0, [r1] store i8 %a, i8* %v ret i8 %a } define i8 @f2(i8 %a, i8* %v) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: strb.w r0, [r1, #4092] %tmp2 = getelementptr i8* %v, i32 4092 store i8 %a, i8* %tmp2 @@ -16,7 +16,7 @@ define i8 @f2(i8 %a, i8* %v) { } define i8 @f2a(i8 %a, i8* %v) { -; CHECK: f2a: +; CHECK-LABEL: f2a: ; CHECK: strb r0, [r1, #-128] %tmp2 = getelementptr i8* %v, i32 -128 store i8 %a, i8* %tmp2 @@ -24,7 +24,7 @@ define i8 @f2a(i8 %a, i8* %v) { } define i8 @f3(i8 %a, i8* %v) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: mov.w r2, #4096 ; CHECK: strb r0, [r1, r2] %tmp2 = getelementptr i8* %v, i32 4096 @@ -34,7 +34,7 @@ define i8 @f3(i8 %a, i8* %v) { define i8 @f4(i8 %a, i32 %base) { entry: -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: strb r0, [r1, #-128] %tmp1 = sub i32 %base, 128 %tmp2 = inttoptr i32 %tmp1 to i8* @@ -44,7 +44,7 @@ entry: define i8 @f5(i8 %a, i32 %base, i32 %offset) { entry: -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: strb r0, [r1, r2] %tmp1 = add i32 %base, %offset %tmp2 = inttoptr i32 %tmp1 to i8* @@ -54,7 +54,7 @@ entry: define i8 @f6(i8 %a, i32 %base, i32 %offset) { entry: -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: strb.w r0, [r1, r2, lsl #2] %tmp1 = shl i32 %offset, 2 %tmp2 = add i32 %base, %tmp1 @@ -65,7 +65,7 @@ entry: define i8 @f7(i8 %a, i32 %base, i32 %offset) { entry: -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: lsrs r2, r2, #2 ; CHECK: strb r0, [r1, r2] %tmp1 = lshr i32 %offset, 2 diff --git a/test/CodeGen/Thumb2/thumb2-strh.ll b/test/CodeGen/Thumb2/thumb2-strh.ll index 97110a726f47..d68693830518 100644 --- a/test/CodeGen/Thumb2/thumb2-strh.ll +++ b/test/CodeGen/Thumb2/thumb2-strh.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i16 @f1(i16 %a, i16* %v) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: strh r0, [r1] store i16 %a, i16* %v ret i16 %a } define i16 @f2(i16 %a, i16* %v) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: strh.w r0, [r1, #4092] %tmp2 = getelementptr i16* %v, i32 2046 store i16 %a, i16* %tmp2 @@ -16,7 +16,7 @@ define i16 @f2(i16 %a, i16* %v) { } define i16 @f2a(i16 %a, i16* %v) { -; CHECK: f2a: +; CHECK-LABEL: f2a: ; CHECK: strh r0, [r1, #-128] %tmp2 = getelementptr i16* %v, i32 -64 store i16 %a, i16* %tmp2 @@ -24,7 +24,7 @@ define i16 @f2a(i16 %a, i16* %v) { } define i16 @f3(i16 %a, i16* %v) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: mov.w r2, #4096 ; CHECK: strh r0, [r1, r2] %tmp2 = getelementptr i16* %v, i32 2048 @@ -34,7 +34,7 @@ define i16 @f3(i16 %a, i16* %v) { define i16 @f4(i16 %a, i32 %base) { entry: -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: strh r0, [r1, #-128] %tmp1 = sub i32 %base, 128 %tmp2 = inttoptr i32 %tmp1 to i16* @@ -44,7 +44,7 @@ entry: define i16 @f5(i16 %a, i32 %base, i32 %offset) { entry: -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: strh r0, [r1, r2] %tmp1 = add i32 %base, %offset %tmp2 = inttoptr i32 %tmp1 to i16* @@ -54,7 +54,7 @@ entry: define i16 @f6(i16 %a, i32 %base, i32 %offset) { entry: -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: strh.w r0, [r1, r2, lsl #2] %tmp1 = shl i32 %offset, 2 %tmp2 = add i32 %base, %tmp1 @@ -65,7 +65,7 @@ entry: define i16 @f7(i16 %a, i32 %base, i32 %offset) { entry: -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: lsrs r2, r2, #2 ; CHECK: strh r0, [r1, r2] %tmp1 = lshr i32 %offset, 2 diff --git a/test/CodeGen/Thumb2/thumb2-sub.ll b/test/CodeGen/Thumb2/thumb2-sub.ll index 95335a2ee2cc..f83dfe2e00a4 100644 --- a/test/CodeGen/Thumb2/thumb2-sub.ll +++ b/test/CodeGen/Thumb2/thumb2-sub.ll @@ -2,7 +2,7 @@ ; 171 = 0x000000ab define i32 @f1(i32 %a) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: subs r0, #171 %tmp = sub i32 %a, 171 ret i32 %tmp @@ -10,7 +10,7 @@ define i32 @f1(i32 %a) { ; 1179666 = 0x00120012 define i32 @f2(i32 %a) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: sub.w r0, r0, #1179666 %tmp = sub i32 %a, 1179666 ret i32 %tmp @@ -18,7 +18,7 @@ define i32 @f2(i32 %a) { ; 872428544 = 0x34003400 define i32 @f3(i32 %a) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: sub.w r0, r0, #872428544 %tmp = sub i32 %a, 872428544 ret i32 %tmp @@ -26,7 +26,7 @@ define i32 @f3(i32 %a) { ; 1448498774 = 0x56565656 define i32 @f4(i32 %a) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: sub.w r0, r0, #1448498774 %tmp = sub i32 %a, 1448498774 ret i32 %tmp @@ -34,7 +34,7 @@ define i32 @f4(i32 %a) { ; 510 = 0x000001fe define i32 @f5(i32 %a) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: sub.w r0, r0, #510 %tmp = sub i32 %a, 510 ret i32 %tmp @@ -42,7 +42,7 @@ define i32 @f5(i32 %a) { ; Don't change this to an add. define i32 @f6(i32 %a) { -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: subs r0, #1 %tmp = sub i32 %a, 1 ret i32 %tmp diff --git a/test/CodeGen/Thumb2/thumb2-sub2.ll b/test/CodeGen/Thumb2/thumb2-sub2.ll index bb99cbd67fcf..47eb1e1a36cf 100644 --- a/test/CodeGen/Thumb2/thumb2-sub2.ll +++ b/test/CodeGen/Thumb2/thumb2-sub2.ll @@ -4,5 +4,5 @@ define i32 @f1(i32 %a) { %tmp = sub i32 %a, 4095 ret i32 %tmp } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: subw r0, r0, #4095 diff --git a/test/CodeGen/Thumb2/thumb2-sub4.ll b/test/CodeGen/Thumb2/thumb2-sub4.ll index a040d170f935..ff1441ac64dd 100644 --- a/test/CodeGen/Thumb2/thumb2-sub4.ll +++ b/test/CodeGen/Thumb2/thumb2-sub4.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @f1(i32 %a, i32 %b) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: subs r0, r0, r1 %tmp = sub i32 %a, %b ret i32 %tmp } define i32 @f2(i32 %a, i32 %b) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: sub.w r0, r0, r1, lsl #5 %tmp = shl i32 %b, 5 %tmp1 = sub i32 %a, %tmp @@ -16,7 +16,7 @@ define i32 @f2(i32 %a, i32 %b) { } define i32 @f3(i32 %a, i32 %b) { -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: sub.w r0, r0, r1, lsr #6 %tmp = lshr i32 %b, 6 %tmp1 = sub i32 %a, %tmp @@ -24,7 +24,7 @@ define i32 @f3(i32 %a, i32 %b) { } define i32 @f4(i32 %a, i32 %b) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: sub.w r0, r0, r1, asr #7 %tmp = ashr i32 %b, 7 %tmp1 = sub i32 %a, %tmp @@ -32,7 +32,7 @@ define i32 @f4(i32 %a, i32 %b) { } define i32 @f5(i32 %a, i32 %b) { -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: sub.w r0, r0, r0, ror #8 %l8 = shl i32 %a, 24 %r8 = lshr i32 %a, 8 diff --git a/test/CodeGen/Thumb2/thumb2-sub5.ll b/test/CodeGen/Thumb2/thumb2-sub5.ll index 6edd789beec5..5941dd6ec89f 100644 --- a/test/CodeGen/Thumb2/thumb2-sub5.ll +++ b/test/CodeGen/Thumb2/thumb2-sub5.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 -mattr=+32bit | FileCheck %s define i64 @f1(i64 %a, i64 %b) { -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: subs.w r0, r0, r2 ; To test dead_carry, +32bit prevents sbc conveting to 16-bit sbcs ; CHECK: sbc.w r1, r1, r3 diff --git a/test/CodeGen/Thumb2/thumb2-sxt-uxt.ll b/test/CodeGen/Thumb2/thumb2-sxt-uxt.ll index ab888e694cfc..792ebef5f9bc 100644 --- a/test/CodeGen/Thumb2/thumb2-sxt-uxt.ll +++ b/test/CodeGen/Thumb2/thumb2-sxt-uxt.ll @@ -1,28 +1,28 @@ ; RUN: llc < %s -march=thumb -mcpu=cortex-m3 | FileCheck %s define i32 @test1(i16 zeroext %z) nounwind { -; CHECK: test1: +; CHECK-LABEL: test1: ; CHECK: sxth %r = sext i16 %z to i32 ret i32 %r } define i32 @test2(i8 zeroext %z) nounwind { -; CHECK: test2: +; CHECK-LABEL: test2: ; CHECK: sxtb %r = sext i8 %z to i32 ret i32 %r } define i32 @test3(i16 signext %z) nounwind { -; CHECK: test3: +; CHECK-LABEL: test3: ; CHECK: uxth %r = zext i16 %z to i32 ret i32 %r } define i32 @test4(i8 signext %z) nounwind { -; CHECK: test4: +; CHECK-LABEL: test4: ; CHECK: uxtb %r = zext i8 %z to i32 ret i32 %r diff --git a/test/CodeGen/Thumb2/thumb2-tbb.ll b/test/CodeGen/Thumb2/thumb2-tbb.ll index a9d71d6bda15..d57638bbb4f6 100644 --- a/test/CodeGen/Thumb2/thumb2-tbb.ll +++ b/test/CodeGen/Thumb2/thumb2-tbb.ll @@ -3,7 +3,7 @@ define void @bar(i32 %n.u) { entry: -; CHECK: bar: +; CHECK-LABEL: bar: ; CHECK: tbb ; CHECK: .data_region jt8 ; CHECK: .end_data_region diff --git a/test/CodeGen/Thumb2/thumb2-tbh.ll b/test/CodeGen/Thumb2/thumb2-tbh.ll index cd9c8e1015b2..bf1c7c613ab5 100644 --- a/test/CodeGen/Thumb2/thumb2-tbh.ll +++ b/test/CodeGen/Thumb2/thumb2-tbh.ll @@ -15,7 +15,7 @@ declare void @Z_fatal(i8*) noreturn nounwind declare noalias i8* @calloc(i32, i32) nounwind define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { -; CHECK: main: +; CHECK-LABEL: main: ; CHECK: tbb entry: br label %bb42.i diff --git a/test/CodeGen/Thumb2/thumb2-teq.ll b/test/CodeGen/Thumb2/thumb2-teq.ll index d453f469abc7..5acda35b4948 100644 --- a/test/CodeGen/Thumb2/thumb2-teq.ll +++ b/test/CodeGen/Thumb2/thumb2-teq.ll @@ -9,7 +9,7 @@ define i1 @f2(i32 %a) { %tmp1 = icmp eq i32 0, %tmp ret i1 %tmp1 } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: teq.w {{.*}}, #187 ; 0x00aa00aa = 11141290 @@ -18,7 +18,7 @@ define i1 @f3(i32 %a) { %tmp1 = icmp eq i32 %tmp, 0 ret i1 %tmp1 } -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: teq.w {{.*}}, #11141290 ; 0xcc00cc00 = 3422604288 @@ -27,7 +27,7 @@ define i1 @f6(i32 %a) { %tmp1 = icmp eq i32 0, %tmp ret i1 %tmp1 } -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: teq.w {{.*}}, #-872363008 ; 0xdddddddd = 3722304989 @@ -36,7 +36,7 @@ define i1 @f7(i32 %a) { %tmp1 = icmp eq i32 %tmp, 0 ret i1 %tmp1 } -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: teq.w {{.*}}, #-572662307 ; 0xdddddddd = 3722304989 @@ -52,6 +52,6 @@ define i1 @f10(i32 %a) { %tmp1 = icmp eq i32 0, %tmp ret i1 %tmp1 } -; CHECK: f10: +; CHECK-LABEL: f10: ; CHECK: teq.w {{.*}}, #1114112 diff --git a/test/CodeGen/Thumb2/thumb2-tst.ll b/test/CodeGen/Thumb2/thumb2-tst.ll index 67fe82ee5202..31eafea614de 100644 --- a/test/CodeGen/Thumb2/thumb2-tst.ll +++ b/test/CodeGen/Thumb2/thumb2-tst.ll @@ -9,7 +9,7 @@ define i1 @f2(i32 %a) { %tmp1 = icmp eq i32 0, %tmp ret i1 %tmp1 } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: tst.w {{.*}}, #187 ; 0x00aa00aa = 11141290 @@ -18,7 +18,7 @@ define i1 @f3(i32 %a) { %tmp1 = icmp eq i32 %tmp, 0 ret i1 %tmp1 } -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: tst.w {{.*}}, #11141290 ; 0xcc00cc00 = 3422604288 @@ -27,7 +27,7 @@ define i1 @f6(i32 %a) { %tmp1 = icmp eq i32 0, %tmp ret i1 %tmp1 } -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: tst.w {{.*}}, #-872363008 ; 0xdddddddd = 3722304989 @@ -36,7 +36,7 @@ define i1 @f7(i32 %a) { %tmp1 = icmp eq i32 %tmp, 0 ret i1 %tmp1 } -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: tst.w {{.*}}, #-572662307 ; 0x00110000 = 1114112 @@ -45,5 +45,5 @@ define i1 @f10(i32 %a) { %tmp1 = icmp eq i32 0, %tmp ret i1 %tmp1 } -; CHECK: f10: +; CHECK-LABEL: f10: ; CHECK: tst.w {{.*}}, #1114112 diff --git a/test/CodeGen/Thumb2/thumb2-tst2.ll b/test/CodeGen/Thumb2/thumb2-tst2.ll index e3fe792005f8..f71e91d1e9de 100644 --- a/test/CodeGen/Thumb2/thumb2-tst2.ll +++ b/test/CodeGen/Thumb2/thumb2-tst2.ll @@ -4,7 +4,7 @@ ; tst as 'mov.w r0, #0'. define i1 @f2(i32 %a, i32 %b) { -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: tst {{.*}}, r1 %tmp = and i32 %a, %b %tmp1 = icmp eq i32 %tmp, 0 @@ -12,7 +12,7 @@ define i1 @f2(i32 %a, i32 %b) { } define i1 @f4(i32 %a, i32 %b) { -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: tst {{.*}}, r1 %tmp = and i32 %a, %b %tmp1 = icmp eq i32 0, %tmp @@ -20,7 +20,7 @@ define i1 @f4(i32 %a, i32 %b) { } define i1 @f6(i32 %a, i32 %b) { -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: tst.w {{.*}}, r1, lsl #5 %tmp = shl i32 %b, 5 %tmp1 = and i32 %a, %tmp @@ -29,7 +29,7 @@ define i1 @f6(i32 %a, i32 %b) { } define i1 @f7(i32 %a, i32 %b) { -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: tst.w {{.*}}, r1, lsr #6 %tmp = lshr i32 %b, 6 %tmp1 = and i32 %a, %tmp @@ -38,7 +38,7 @@ define i1 @f7(i32 %a, i32 %b) { } define i1 @f8(i32 %a, i32 %b) { -; CHECK: f8: +; CHECK-LABEL: f8: ; CHECK: tst.w {{.*}}, r1, asr #7 %tmp = ashr i32 %b, 7 %tmp1 = and i32 %a, %tmp @@ -47,7 +47,7 @@ define i1 @f8(i32 %a, i32 %b) { } define i1 @f9(i32 %a, i32 %b) { -; CHECK: f9: +; CHECK-LABEL: f9: ; CHECK: tst.w {{.*}}, {{.*}}, ror #8 %l8 = shl i32 %a, 24 %r8 = lshr i32 %a, 8 diff --git a/test/CodeGen/Thumb2/tls2.ll b/test/CodeGen/Thumb2/tls2.ll index b8a0657c9069..6cb019ff00ec 100644 --- a/test/CodeGen/Thumb2/tls2.ll +++ b/test/CodeGen/Thumb2/tls2.ll @@ -5,12 +5,12 @@ define i32 @f() { entry: -; CHECK-NOT-PIC: f: +; CHECK-NOT-PIC-LABEL: f: ; CHECK-NOT-PIC: add r0, pc ; CHECK-NOT-PIC: ldr r1, [r0] ; CHECK-NOT-PIC: i(gottpoff) -; CHECK-PIC: f: +; CHECK-PIC-LABEL: f: ; CHECK-PIC: bl __tls_get_addr(PLT) %tmp1 = load i32* @i ; <i32> [#uses=1] ret i32 %tmp1 @@ -18,12 +18,12 @@ entry: define i32* @g() { entry: -; CHECK-NOT-PIC: g: +; CHECK-NOT-PIC-LABEL: g: ; CHECK-NOT-PIC: add r0, pc ; CHECK-NOT-PIC: ldr r1, [r0] ; CHECK-NOT-PIC: i(gottpoff) -; CHECK-PIC: g: +; CHECK-PIC-LABEL: g: ; CHECK-PIC: bl __tls_get_addr(PLT) ret i32* @i } diff --git a/test/CodeGen/Thumb2/v8_IT_1.ll b/test/CodeGen/Thumb2/v8_IT_1.ll new file mode 100644 index 000000000000..30dbb4802b6d --- /dev/null +++ b/test/CodeGen/Thumb2/v8_IT_1.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -mtriple=thumbv8 -mattr=+neon | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7 -mattr=+neon -arm-restrict-it | FileCheck %s + +;CHECK-LABEL: select_s_v_v: +;CHECK-NOT: it +;CHECK: bx +define <16 x i8> @select_s_v_v(i32 %avail, i8* %bar) { +entry: + %vld1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %bar, i32 1) + %and = and i32 %avail, 1 + %tobool = icmp eq i32 %and, 0 + %vld1. = select i1 %tobool, <16 x i8> %vld1, <16 x i8> zeroinitializer + ret <16 x i8> %vld1. +} + +declare <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* , i32 ) + diff --git a/test/CodeGen/Thumb2/v8_IT_2.ll b/test/CodeGen/Thumb2/v8_IT_2.ll new file mode 100644 index 000000000000..170b4135b536 --- /dev/null +++ b/test/CodeGen/Thumb2/v8_IT_2.ll @@ -0,0 +1,38 @@ +; RUN: llc < %s -mtriple=thumbv8 | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7 -arm-restrict-it | FileCheck %s + + %struct.quad_struct = type { i32, i32, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct*, %struct.quad_struct* } + +define fastcc i32 @CountTree(%struct.quad_struct* %tree) { +entry: +; CHECK-LABEL: CountTree: +; CHECK: bne +; CHECK: cmp +; CHECK: it eq +; CHECK: cmpeq +; CHECK: bne +; CHECK: mov +; CHECK: pop + br label %tailrecurse + +tailrecurse: ; preds = %bb, %entry + %tmp6 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1] + %tmp9 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=2] + %tmp12 = load %struct.quad_struct** null ; <%struct.quad_struct*> [#uses=1] + %tmp14 = icmp eq %struct.quad_struct* null, null ; <i1> [#uses=1] + %tmp17 = icmp eq %struct.quad_struct* %tmp6, null ; <i1> [#uses=1] + %tmp23 = icmp eq %struct.quad_struct* %tmp9, null ; <i1> [#uses=1] + %tmp29 = icmp eq %struct.quad_struct* %tmp12, null ; <i1> [#uses=1] + %bothcond = and i1 %tmp17, %tmp14 ; <i1> [#uses=1] + %bothcond1 = and i1 %bothcond, %tmp23 ; <i1> [#uses=1] + %bothcond2 = and i1 %bothcond1, %tmp29 ; <i1> [#uses=1] + br i1 %bothcond2, label %return, label %bb + +bb: ; preds = %tailrecurse + %tmp41 = tail call fastcc i32 @CountTree( %struct.quad_struct* %tmp9 ) ; <i32> [#uses=0] + br label %tailrecurse + +return: ; preds = %tailrecurse + ret i32 0 +} + diff --git a/test/CodeGen/Thumb2/v8_IT_3.ll b/test/CodeGen/Thumb2/v8_IT_3.ll new file mode 100644 index 000000000000..4dca24629b01 --- /dev/null +++ b/test/CodeGen/Thumb2/v8_IT_3.ll @@ -0,0 +1,77 @@ +; RUN: llc < %s -mtriple=thumbv8 | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7 -arm-restrict-it | FileCheck %s +; RUN: llc < %s -mtriple=thumbv8 -relocation-model=pic | FileCheck %s --check-prefix=CHECK-PIC +; RUN: llc < %s -mtriple=thumbv7 -arm-restrict-it -relocation-model=pic | FileCheck %s --check-prefix=CHECK-PIC + +%struct.FF = type { i32 (i32*)*, i32 (i32*, i32*, i32, i32, i32, i32)*, i32 (i32, i32, i8*)*, void ()*, i32 (i32, i8*, i32*)*, i32 ()* } +%struct.BD = type { %struct.BD*, i32, i32, i32, i32, i64, i32 (%struct.BD*, i8*, i64, i32)*, i32 (%struct.BD*, i8*, i32, i32)*, i32 (%struct.BD*, i8*, i64, i32)*, i32 (%struct.BD*, i8*, i32, i32)*, i32 (%struct.BD*, i64, i32)*, [16 x i8], i64, i64 } + +@FuncPtr = external hidden unnamed_addr global %struct.FF* +@.str1 = external hidden unnamed_addr constant [6 x i8], align 4 +@G = external unnamed_addr global i32 +@.str2 = external hidden unnamed_addr constant [58 x i8], align 4 +@.str3 = external hidden unnamed_addr constant [58 x i8], align 4 + +define i32 @test() nounwind optsize ssp { +entry: +; CHECK-LABEL: test: +; CHECK: push +; CHECK-NOT: push + %block_size = alloca i32, align 4 + %block_count = alloca i32, align 4 + %index_cache = alloca i32, align 4 + store i32 0, i32* %index_cache, align 4 + %tmp = load i32* @G, align 4 + %tmp1 = call i32 @bar(i32 0, i32 0, i32 %tmp) nounwind + switch i32 %tmp1, label %bb8 [ + i32 0, label %bb + i32 536870913, label %bb4 + i32 536870914, label %bb6 + ] + +bb: + %tmp2 = load i32* @G, align 4 + %tmp4 = icmp eq i32 %tmp2, 0 + br i1 %tmp4, label %bb1, label %bb8 + +bb1: +; CHECK: %bb6 +; CHECK: it eq +; CHECK-NEXT: ldreq +; CHECK-NEXT: it eq +; CHECK-NEXT: cmpeq +; CHECK: %bb1 + %tmp5 = load i32* %block_size, align 4 + %tmp6 = load i32* %block_count, align 4 + %tmp7 = call %struct.FF* @Get() nounwind + store %struct.FF* %tmp7, %struct.FF** @FuncPtr, align 4 + %tmp10 = zext i32 %tmp6 to i64 + %tmp11 = zext i32 %tmp5 to i64 + %tmp12 = mul nsw i64 %tmp10, %tmp11 + %tmp13 = call i32 @foo(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0), i64 %tmp12, i32 %tmp5) nounwind + br label %bb8 + +bb4: +; CHECK-PIC: cmp +; CHECK-PIC: cmp +; CHECK-PIC-NEXT: bne +; CHECK-PIC-NEXT: %bb4 +; CHECK-PIC-NEXT: movs +; CHECK-PIC-NEXT: add +; CHECK-PIC-NEXT: pop + ret i32 0 + +bb6: + ret i32 1 + +bb8: + ret i32 -1 +} + +declare i32 @printf(i8*, ...) + +declare %struct.FF* @Get() + +declare i32 @foo(i8*, i64, i32) + +declare i32 @bar(i32, i32, i32) diff --git a/test/CodeGen/Thumb2/v8_IT_4.ll b/test/CodeGen/Thumb2/v8_IT_4.ll new file mode 100644 index 000000000000..5a80d8cd7b4e --- /dev/null +++ b/test/CodeGen/Thumb2/v8_IT_4.ll @@ -0,0 +1,45 @@ +; RUN: llc < %s -mtriple=thumbv8-eabi -float-abi=hard | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-eabi -float-abi=hard -arm-restrict-it | FileCheck %s +; RUN: llc < %s -mtriple=thumbv8-eabi -float-abi=hard -regalloc=basic | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-eabi -float-abi=hard -regalloc=basic -arm-restrict-it | FileCheck %s + +%"struct.__gnu_cxx::__normal_iterator<char*,std::basic_string<char, std::char_traits<char>, std::allocator<char> > >" = type { i8* } +%"struct.__gnu_cxx::new_allocator<char>" = type <{ i8 }> +%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >" = type { %"struct.__gnu_cxx::__normal_iterator<char*,std::basic_string<char, std::char_traits<char>, std::allocator<char> > >" } +%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep" = type { %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep_base" } +%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >::_Rep_base" = type { i32, i32, i32 } + + +define weak arm_aapcs_vfpcc i32 @_ZNKSs7compareERKSs(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this, %"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) { +; CHECK-LABEL: _ZNKSs7compareERKSs: +; CHECK: cbnz r0, +; CHECK-NEXT: %bb +; CHECK-NEXT: sub{{(.w)?}} r0, r{{[0-9]+}}, r{{[0-9]+}} +; CHECK-NEXT: %bb1 +; CHECK-NEXT: pop.w +entry: + %0 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this) ; <i32> [#uses=3] + %1 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) ; <i32> [#uses=3] + %2 = icmp ult i32 %1, %0 ; <i1> [#uses=1] + %3 = select i1 %2, i32 %1, i32 %0 ; <i32> [#uses=1] + %4 = tail call arm_aapcs_vfpcc i8* @_ZNKSs7_M_dataEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this) ; <i8*> [#uses=1] + %5 = tail call arm_aapcs_vfpcc i8* @_ZNKSs4dataEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) ; <i8*> [#uses=1] + %6 = tail call arm_aapcs_vfpcc i32 @memcmp(i8* %4, i8* %5, i32 %3) nounwind readonly ; <i32> [#uses=2] + %7 = icmp eq i32 %6, 0 ; <i1> [#uses=1] + br i1 %7, label %bb, label %bb1 + +bb: ; preds = %entry + %8 = sub i32 %0, %1 ; <i32> [#uses=1] + ret i32 %8 + +bb1: ; preds = %entry + ret i32 %6 +} + +declare arm_aapcs_vfpcc i32 @memcmp(i8* nocapture, i8* nocapture, i32) nounwind readonly + +declare arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this) + +declare arm_aapcs_vfpcc i8* @_ZNKSs7_M_dataEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this) + +declare arm_aapcs_vfpcc i8* @_ZNKSs4dataEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this) diff --git a/test/CodeGen/Thumb2/v8_IT_5.ll b/test/CodeGen/Thumb2/v8_IT_5.ll new file mode 100644 index 000000000000..30250c8d02f0 --- /dev/null +++ b/test/CodeGen/Thumb2/v8_IT_5.ll @@ -0,0 +1,63 @@ +; RUN: llc < %s -mtriple=thumbv8 | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7 -arm-restrict-it | FileCheck %s +; CHECK: it ne +; CHECK-NEXT: cmpne +; CHECK-NEXT: beq +; CHECK: cmp +; CHECK-NEXT: beq +; CHECK-NEXT: %if.else163 +; CHECK-NEXT: mov.w +; CHECK-NEXT: b +; CHECK-NEXT: %if.else145 +; CHECK-NEXT: mov.w + +%struct.hc = type { i32, i32, i32, i32 } + +define i32 @t(i32 %type) optsize { +entry: + br i1 undef, label %if.then, label %if.else + +if.then: + unreachable + +if.else: + br i1 undef, label %if.then15, label %if.else18 + +if.then15: + unreachable + +if.else18: + switch i32 %type, label %if.else173 [ + i32 3, label %if.then115 + i32 1, label %if.then102 + ] + +if.then102: + br i1 undef, label %cond.true10.i, label %t.exit + +cond.true10.i: + br label %t.exit + +t.exit: + unreachable + +if.then115: + br i1 undef, label %if.else163, label %if.else145 + +if.else145: + %call150 = call fastcc %struct.hc* @foo(%struct.hc* undef, i32 34865152) optsize + br label %while.body172 + +if.else163: + %call168 = call fastcc %struct.hc* @foo(%struct.hc* undef, i32 34078720) optsize + br label %while.body172 + +while.body172: + br label %while.body172 + +if.else173: + ret i32 -1 +} + +declare hidden fastcc %struct.hc* @foo(%struct.hc* nocapture, i32) nounwind optsize + |