diff options
Diffstat (limited to 'test/CodeGen/Thumb2')
26 files changed, 117 insertions, 178 deletions
diff --git a/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll b/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll index 41b30291baa2..0b5610327107 100644 --- a/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll +++ b/test/CodeGen/Thumb2/2009-08-02-CoalescerBug.ll @@ -1,10 +1,10 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim - type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16)*, i32 } ; type %0 - type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16*)*, i32 } ; type %1 - type { void (%"struct.xalanc_1_8::FormatterToXML"*, %"struct.xalanc_1_8::XalanDOMString"*)*, i32 } ; type %2 - type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32, i32)*, i32 } ; type %3 - type { void (%"struct.xalanc_1_8::FormatterToXML"*)*, i32 } ; type %4 + %0 = type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16)*, i32 } ; type %0 + %1 = type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16*)*, i32 } ; type %1 + %2 = type { void (%"struct.xalanc_1_8::FormatterToXML"*, %"struct.xalanc_1_8::XalanDOMString"*)*, i32 } ; type %2 + %3 = type { void (%"struct.xalanc_1_8::FormatterToXML"*, i16*, i32, i32)*, i32 } ; type %3 + %4 = type { void (%"struct.xalanc_1_8::FormatterToXML"*)*, i32 } ; type %4 %"struct.std::CharVectorType" = type { %"struct.std::_Vector_base<char,std::allocator<char> >" } %"struct.std::_Bit_const_iterator" = type { %"struct.std::_Bit_iterator_base" } %"struct.std::_Bit_iterator_base" = type { i32*, i32 } diff --git a/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll b/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll index b8326373924f..28ac28bbc550 100644 --- a/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll +++ b/test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll @@ -1,10 +1,10 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim - type { %struct.GAP } ; type %0 - type { i16, i8, i8 } ; type %1 - type { [2 x i32], [2 x i32] } ; type %2 - type { %struct.rec* } ; type %3 - type { i8, i8, i16, i8, i8, i8, i8 } ; type %4 + %0 = type { %struct.GAP } ; type %0 + %1 = type { i16, i8, i8 } ; type %1 + %2 = type { [2 x i32], [2 x i32] } ; type %2 + %3 = type { %struct.rec* } ; type %3 + %4 = type { i8, i8, i16, i8, i8, i8, i8 } ; type %4 %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } %struct.FILE_POS = type { i8, i8, i16, i32 } %struct.FIRST_UNION = type { %struct.FILE_POS } diff --git a/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll b/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll index 02fad4b930c4..88accf8063ed 100644 --- a/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll +++ b/test/CodeGen/Thumb2/2009-08-04-ScavengerAssert.ll @@ -1,11 +1,11 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -relocation-model=pic -disable-fp-elim -O3 - type { i16, i8, i8 } ; type %0 - type { [2 x i32], [2 x i32] } ; type %1 - type { %struct.GAP } ; type %2 - type { %struct.rec* } ; type %3 - type { i8, i8, i16, i8, i8, i8, i8 } ; type %4 - type { i8, i8, i8, i8 } ; type %5 + %0 = type { i16, i8, i8 } ; type %0 + %1 = type { [2 x i32], [2 x i32] } ; type %1 + %2 = type { %struct.GAP } ; type %2 + %3 = type { %struct.rec* } ; type %3 + %4 = type { i8, i8, i16, i8, i8, i8, i8 } ; type %4 + %5 = type { i8, i8, i8, i8 } ; type %5 %struct.COMPOSITE = type { i8, i16, i16 } %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } %struct.FILE_POS = type { i8, i8, i16, i32 } diff --git a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll index bfea003fb46b..779e100d4197 100644 --- a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll +++ b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug.ll @@ -1,4 +1,3 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 | not grep fcpys ; rdar://7117307 @@ -13,7 +12,7 @@ entry: br i1 undef, label %bb, label %bb6.preheader bb6.preheader: ; preds = %entry - call void @llvm.memcpy.i32(i8* undef, i8* undef, i32 12, i32 4) + call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* undef, i32 12, i32 4, i1 false) br i1 undef, label %bb15, label %bb13 bb: ; preds = %entry @@ -31,4 +30,4 @@ bb15: ; preds = %bb13, %bb6.preheader ret void } -declare void @llvm.memcpy.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind diff --git a/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll b/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll index 9aee910829eb..18c2e0bfaec5 100644 --- a/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll +++ b/test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll @@ -13,7 +13,7 @@ define weak arm_aapcs_vfpcc i32 @_ZNKSs7compareERKSs(%"struct.std::basic_string< ; CHECK: _ZNKSs7compareERKSs: ; CHECK: it eq ; CHECK-NEXT: subeq{{(.w)?}} r0, r{{[0-9]+}}, r{{[0-9]+}} -; CHECK-NEXT: ldmia.w sp!, +; CHECK-NEXT: pop.w entry: %0 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %this) ; <i32> [#uses=3] %1 = tail call arm_aapcs_vfpcc i32 @_ZNKSs4sizeEv(%"struct.std::basic_string<char,std::char_traits<char>,std::allocator<char> >"* %__str) ; <i32> [#uses=3] diff --git a/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll b/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll index 9ed6a01255f8..01fb0a581a5b 100644 --- a/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll +++ b/test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O3 -relocation-model=pic -mattr=+thumb2 -mcpu=cortex-a8 | FileCheck %s +; RUN: llc < %s -O3 -relocation-model=pic -mattr=+thumb2 -mcpu=cortex-a8 -disable-branch-fold | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" target triple = "thumbv7-apple-darwin10" @@ -26,7 +26,7 @@ entry: ; CHECK: vldr.64 [[LDR:d.*]], ; CHECK: LPC0_0: ; CHECK: vadd.f64 [[ADD:d.*]], [[LDR]], [[LDR]] -; CHECK: vmov.f64 [[LDR]] +; CHECK-NOT: vmov.f64 [[ADD]] %5 = fadd <2 x double> %3, %3 ; <<2 x double>> [#uses=2] %6 = fadd <2 x double> %4, %4 ; <<2 x double>> [#uses=2] %tmp7 = extractelement <2 x double> %5, i32 0 ; <double> [#uses=1] diff --git a/test/CodeGen/Thumb2/2011-06-07-TwoAddrEarlyClobber.ll b/test/CodeGen/Thumb2/2011-06-07-TwoAddrEarlyClobber.ll index 9e6d78e75dc6..b1ce3bb935e3 100644 --- a/test/CodeGen/Thumb2/2011-06-07-TwoAddrEarlyClobber.ll +++ b/test/CodeGen/Thumb2/2011-06-07-TwoAddrEarlyClobber.ll @@ -1,13 +1,11 @@ -; RUN: llc < %s | FileCheck %s -target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" -target triple = "thumbv7-apple-darwin10" +; RUN: llc -mtriple=thumbv7-apple-darwin10 < %s | FileCheck %s %struct.op = type { %struct.op*, %struct.op*, %struct.op* ()*, i32, i16, i16, i8, i8 } ; CHECK: Perl_ck_sort -; CHECK: ldr -; CHECK: mov [[REGISTER:(r[0-9]+)|(lr)]] -; CHECK: str {{(r[0-9])|(lr)}}, {{\[}}[[REGISTER]]{{\]}}, #24 +; CHECK: ldreq +; CHECK: moveq [[REGISTER:(r[0-9]+)|(lr)]] +; CHECK: streq {{(r[0-9])|(lr)}}, {{\[}}[[REGISTER]]{{\]}}, #24 define void @Perl_ck_sort() nounwind optsize { entry: diff --git a/test/CodeGen/Thumb2/ldr-str-imm12.ll b/test/CodeGen/Thumb2/ldr-str-imm12.ll index e1932bd2748a..4597ba56b0d1 100644 --- a/test/CodeGen/Thumb2/ldr-str-imm12.ll +++ b/test/CodeGen/Thumb2/ldr-str-imm12.ll @@ -22,7 +22,7 @@ define %union.rec* @Manifest(%union.rec* %x, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind { entry: -; CHECK: ldr.w {{(r[0-9]+)|(lr)}}, [r7, #28] +; CHECK: ldr{{(.w)?}} {{(r[0-9]+)|(lr)}}, [r7, #28] %xgaps.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0] %ycomp.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0] br label %bb20 diff --git a/test/CodeGen/Thumb2/lsr-deficiency.ll b/test/CodeGen/Thumb2/lsr-deficiency.ll index ad957a1fcb45..9ff114e2b6f2 100644 --- a/test/CodeGen/Thumb2/lsr-deficiency.ll +++ b/test/CodeGen/Thumb2/lsr-deficiency.ll @@ -13,16 +13,16 @@ define void @t() nounwind optsize { ; CHECK: t: -; CHECK: mov.w r2, #1000 +; CHECK: mov{{.*}}, #1000 entry: %.pre = load i32* @G, align 4 ; <i32> [#uses=1] br label %bb bb: ; preds = %bb, %entry ; CHECK: LBB0_1: -; CHECK: cmp r2, #0 -; CHECK: sub{{(.w)?}} [[REGISTER:(r[0-9]+)|(lr)]], r2, #1 -; CHECK: mov r2, [[REGISTER]] +; CHECK: cmp [[R2:r[0-9]+]], #0 +; CHECK: sub{{(.w)?}} [[REGISTER:(r[0-9]+)|(lr)]], [[R2]], #1 +; CHECK: mov [[R2]], [[REGISTER]] %0 = phi i32 [ %.pre, %entry ], [ %3, %bb ] ; <i32> [#uses=1] %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2] diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll index ee054a165a01..b199d6998114 100644 --- a/test/CodeGen/Thumb2/machine-licm.ll +++ b/test/CodeGen/Thumb2/machine-licm.ll @@ -8,26 +8,25 @@ define void @t1(i32* nocapture %vals, i32 %c) nounwind { entry: ; CHECK: t1: -; CHECK: cbz +; CHECK: bxeq lr + %0 = icmp eq i32 %c, 0 ; <i1> [#uses=1] br i1 %0, label %return, label %bb.nph bb.nph: ; preds = %entry -; CHECK: BB#1 ; CHECK: movw r[[R2:[0-9]+]], :lower16:L_GV$non_lazy_ptr ; CHECK: movt r[[R2]], :upper16:L_GV$non_lazy_ptr ; CHECK: ldr{{(.w)?}} r[[R2b:[0-9]+]], [r[[R2]] ; CHECK: ldr{{.*}}, [r[[R2b]] -; CHECK: LBB0_2 +; CHECK: LBB0_ ; CHECK-NOT: LCPI0_0: -; PIC: BB#1 ; PIC: movw r[[R2:[0-9]+]], :lower16:(L_GV$non_lazy_ptr-(LPC0_0+4)) ; PIC: movt r[[R2]], :upper16:(L_GV$non_lazy_ptr-(LPC0_0+4)) ; PIC: add r[[R2]], pc ; PIC: ldr{{(.w)?}} r[[R2b:[0-9]+]], [r[[R2]] ; PIC: ldr{{.*}}, [r[[R2b]] -; PIC: LBB0_2 +; PIC: LBB0_ ; PIC-NOT: LCPI0_0: ; PIC: .section %.pre = load i32* @GV, align 4 ; <i32> [#uses=1] @@ -52,8 +51,8 @@ return: ; preds = %bb, %entry define void @t2(i8* %ptr1, i8* %ptr2) nounwind { entry: ; CHECK: t2: -; CHECK: mov.w r3, #1065353216 -; CHECK: vdup.32 q{{.*}}, r3 +; CHECK: mov.w [[R3:r[0-9]+]], #1065353216 +; CHECK: vdup.32 q{{.*}}, [[R3]] br i1 undef, label %bb1, label %bb2 bb1: diff --git a/test/CodeGen/Thumb2/thumb2-add.ll b/test/CodeGen/Thumb2/thumb2-add.ll index 5e25cf64bccb..66fca132f04a 100644 --- a/test/CodeGen/Thumb2/thumb2-add.ll +++ b/test/CodeGen/Thumb2/thumb2-add.ll @@ -1,48 +1,81 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #255 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #256 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #257 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #4094 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #4095 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep #4096 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep lsl | grep #8 +; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @t2ADDrc_255(i32 %lhs) { +; CHECK: t2ADDrc_255: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} #255 +; CHECK: bx lr + %Rd = add i32 %lhs, 255 ret i32 %Rd } define i32 @t2ADDrc_256(i32 %lhs) { +; CHECK: t2ADDrc_256: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} #256 +; CHECK: bx lr + %Rd = add i32 %lhs, 256 ret i32 %Rd } define i32 @t2ADDrc_257(i32 %lhs) { +; CHECK: t2ADDrc_257: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} #257 +; CHECK: bx lr + %Rd = add i32 %lhs, 257 ret i32 %Rd } define i32 @t2ADDrc_4094(i32 %lhs) { +; CHECK: t2ADDrc_4094: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} #4094 +; CHECK: bx lr + %Rd = add i32 %lhs, 4094 ret i32 %Rd } define i32 @t2ADDrc_4095(i32 %lhs) { +; CHECK: t2ADDrc_4095: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} #4095 +; CHECK: bx lr + %Rd = add i32 %lhs, 4095 ret i32 %Rd } define i32 @t2ADDrc_4096(i32 %lhs) { +; CHECK: t2ADDrc_4096: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} #4096 +; CHECK: bx lr + %Rd = add i32 %lhs, 4096 ret i32 %Rd } define i32 @t2ADDrr(i32 %lhs, i32 %rhs) { +; CHECK: t2ADDrr: +; CHECK-NOT: bx lr +; CHECK: add +; CHECK: bx lr + %Rd = add i32 %lhs, %rhs ret i32 %Rd } define i32 @t2ADDrs(i32 %lhs, i32 %rhs) { +; CHECK: t2ADDrs: +; CHECK-NOT: bx lr +; CHECK: add{{.*}} lsl #8 +; CHECK: bx lr + %tmp = shl i32 %rhs, 8 %Rd = add i32 %lhs, %tmp ret i32 %Rd diff --git a/test/CodeGen/Thumb2/thumb2-bcc.ll b/test/CodeGen/Thumb2/thumb2-bcc.ll index aae9f5c0af71..70febc060e8d 100644 --- a/test/CodeGen/Thumb2/thumb2-bcc.ll +++ b/test/CodeGen/Thumb2/thumb2-bcc.ll @@ -1,5 +1,8 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s ; RUN: llc < %s -march=thumb -mattr=+thumb2 | not grep it +; If-conversion defeats the purpose of this test, which is to check CBZ +; generation, so use memory barrier instruction to make sure it doesn't +; happen and we get actual branches. define i32 @t1(i32 %a, i32 %b, i32 %c) { ; CHECK: t1: @@ -8,12 +11,16 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) { br i1 %tmp2, label %cond_false, label %cond_true cond_true: + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) %tmp5 = add i32 %b, 1 %tmp6 = and i32 %tmp5, %c ret i32 %tmp6 cond_false: + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) %tmp7 = add i32 %b, -1 %tmp8 = xor i32 %tmp7, %c ret i32 %tmp8 } + +declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind diff --git a/test/CodeGen/Thumb2/thumb2-branch.ll b/test/CodeGen/Thumb2/thumb2-branch.ll index 1d2af7a54745..4d9eda062f9e 100644 --- a/test/CodeGen/Thumb2/thumb2-branch.ll +++ b/test/CodeGen/Thumb2/thumb2-branch.ll @@ -1,4 +1,7 @@ ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s +; If-conversion defeats the purpose of this test, which is to check conditional +; branch generation, so use memory barrier instruction to make sure it doesn't +; happen and we get actual branches. define i32 @f1(i32 %a, i32 %b, i32* %v) { entry: @@ -8,10 +11,12 @@ entry: br i1 %tmp, label %cond_true, label %return cond_true: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) store i32 0, i32* %v ret i32 0 return: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) ret i32 1 } @@ -23,10 +28,12 @@ entry: br i1 %tmp, label %cond_true, label %return cond_true: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) store i32 0, i32* %v ret i32 0 return: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) ret i32 1 } @@ -38,10 +45,12 @@ entry: br i1 %tmp, label %cond_true, label %return cond_true: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) store i32 0, i32* %v ret i32 0 return: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) ret i32 1 } @@ -53,9 +62,13 @@ entry: br i1 %tmp, label %return, label %cond_true cond_true: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) store i32 0, i32* %v ret i32 0 return: ; preds = %entry + call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 false) ret i32 1 } + +declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind diff --git a/test/CodeGen/Thumb2/thumb2-clz.ll b/test/CodeGen/Thumb2/thumb2-clz.ll index 74728bfcc5a9..00a54a0f1952 100644 --- a/test/CodeGen/Thumb2/thumb2-clz.ll +++ b/test/CodeGen/Thumb2/thumb2-clz.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7a | FileCheck %s +; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7 | FileCheck %s define i32 @f1(i32 %a) { ; CHECK: f1: diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll index d842d4d87995..a4035bb8ed49 100644 --- a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll +++ b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll @@ -2,8 +2,10 @@ define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { ; CHECK: t1: -; CHECK: it ne +; CHECK: ittt ne ; CHECK: cmpne +; CHECK: addne +; CHECK: bxne lr switch i32 %c, label %cond_next [ i32 1, label %cond_true i32 7, label %cond_true @@ -70,8 +72,9 @@ entry: define void @t3(i32 %a, i32 %b) nounwind { entry: ; CHECK: t3: -; CHECK: it lt -; CHECK: poplt {r7, pc} +; CHECK: itt ge +; CHECK: movge r0, r1 +; CHECK: blge _foo %tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1] br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock diff --git a/test/CodeGen/Thumb2/thumb2-mulhi.ll b/test/CodeGen/Thumb2/thumb2-mulhi.ll index 5d47770aed3e..9d4840a2deb8 100644 --- a/test/CodeGen/Thumb2/thumb2-mulhi.ll +++ b/test/CodeGen/Thumb2/thumb2-mulhi.ll @@ -1,7 +1,8 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep smmul | count 1 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep umull | count 1 +; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2dsp | FileCheck %s define i32 @smulhi(i32 %x, i32 %y) { +; CHECK: smulhi +; CHECK: smmul r0, r1, r0 %tmp = sext i32 %x to i64 ; <i64> [#uses=1] %tmp1 = sext i32 %y to i64 ; <i64> [#uses=1] %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1] @@ -11,6 +12,8 @@ define i32 @smulhi(i32 %x, i32 %y) { } define i32 @umulhi(i32 %x, i32 %y) { +; CHECK: umulhi +; CHECK: umull r1, r0, r1, r0 %tmp = zext i32 %x to i64 ; <i64> [#uses=1] %tmp1 = zext i32 %y to i64 ; <i64> [#uses=1] %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1] diff --git a/test/CodeGen/Thumb2/thumb2-rev.ll b/test/CodeGen/Thumb2/thumb2-rev.ll index 2cee2e3d6fce..b469bbd3f7b5 100644 --- a/test/CodeGen/Thumb2/thumb2-rev.ll +++ b/test/CodeGen/Thumb2/thumb2-rev.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7a,+t2xtpk | FileCheck %s +; RUN: llc < %s -march=thumb -mattr=+thumb2,+v7,+t2xtpk | FileCheck %s define i32 @f1(i32 %a) { ; CHECK: f1: diff --git a/test/CodeGen/Thumb2/thumb2-sbc.ll b/test/CodeGen/Thumb2/thumb2-sbc.ll index 53f45ea951f5..492e5f0eacc0 100644 --- a/test/CodeGen/Thumb2/thumb2-sbc.ll +++ b/test/CodeGen/Thumb2/thumb2-sbc.ll @@ -56,7 +56,6 @@ define i64 @f6(i64 %a) { ; ; CHECK: livecarry: ; CHECK: adds -; CHECK: adcs ; CHECK: adc define i64 @livecarry(i64 %carry, i32 %digit) nounwind { %ch = lshr i64 %carry, 32 diff --git a/test/CodeGen/Thumb2/thumb2-smla.ll b/test/CodeGen/Thumb2/thumb2-smla.ll index bd4dcbe622fa..c128eccd662f 100644 --- a/test/CodeGen/Thumb2/thumb2-smla.ll +++ b/test/CodeGen/Thumb2/thumb2-smla.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk | FileCheck %s +; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk,+t2dsp | FileCheck %s define i32 @f3(i32 %a, i16 %x, i32 %y) { ; CHECK: f3 diff --git a/test/CodeGen/Thumb2/thumb2-smul.ll b/test/CodeGen/Thumb2/thumb2-smul.ll index ae175355059c..7a13269615d4 100644 --- a/test/CodeGen/Thumb2/thumb2-smul.ll +++ b/test/CodeGen/Thumb2/thumb2-smul.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk | FileCheck %s +; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk,+t2dsp | FileCheck %s @x = weak global i16 0 ; <i16*> [#uses=1] @y = weak global i16 0 ; <i16*> [#uses=0] diff --git a/test/CodeGen/Thumb2/thumb2-sxt_rot.ll b/test/CodeGen/Thumb2/thumb2-sxt_rot.ll index 4b685a86fd8e..f3d0edf0c578 100644 --- a/test/CodeGen/Thumb2/thumb2-sxt_rot.ll +++ b/test/CodeGen/Thumb2/thumb2-sxt_rot.ll @@ -7,7 +7,7 @@ define i32 @test0(i8 %A) { ret i32 %B } -define i8 @test1(i32 %A) signext { +define signext i8 @test1(i32 %A) { ; CHECK: test1 ; CHECK: sxtb.w r0, r0, ror #8 %B = lshr i32 %A, 8 @@ -17,7 +17,7 @@ define i8 @test1(i32 %A) signext { ret i8 %E } -define i32 @test2(i32 %A, i32 %X) signext { +define signext i32 @test2(i32 %A, i32 %X) { ; CHECK: test2 ; CHECK: lsrs r0, r0, #8 ; CHECK: sxtab r0, r1, r0 diff --git a/test/CodeGen/Thumb2/thumb2-teq.ll b/test/CodeGen/Thumb2/thumb2-teq.ll index 566408a60483..00c928fc0782 100644 --- a/test/CodeGen/Thumb2/thumb2-teq.ll +++ b/test/CodeGen/Thumb2/thumb2-teq.ll @@ -4,15 +4,6 @@ ; test as 'mov.w r0, #0'. So far, that requires physreg joining. ; 0x000000bb = 187 -define i1 @f1(i32 %a) { - %tmp = xor i32 %a, 187 - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} -; CHECK: f1: -; CHECK: teq.w r0, #187 - -; 0x000000bb = 187 define i1 @f2(i32 %a) { %tmp = xor i32 %a, 187 %tmp1 = icmp eq i32 0, %tmp @@ -30,24 +21,6 @@ define i1 @f3(i32 %a) { ; CHECK: f3: ; CHECK: teq.w r0, #11141290 -; 0x00aa00aa = 11141290 -define i1 @f4(i32 %a) { - %tmp = xor i32 %a, 11141290 - %tmp1 = icmp ne i32 0, %tmp - ret i1 %tmp1 -} -; CHECK: f4: -; CHECK: teq.w r0, #11141290 - -; 0xcc00cc00 = 3422604288 -define i1 @f5(i32 %a) { - %tmp = xor i32 %a, 3422604288 - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} -; CHECK: f5: -; CHECK: teq.w r0, #-872363008 - ; 0xcc00cc00 = 3422604288 define i1 @f6(i32 %a) { %tmp = xor i32 %a, 3422604288 @@ -72,17 +45,6 @@ define i1 @f8(i32 %a) { %tmp1 = icmp ne i32 0, %tmp ret i1 %tmp1 } -; CHECK: f8: -; CHECK: teq.w r0, #-572662307 - -; 0x00110000 = 1114112 -define i1 @f9(i32 %a) { - %tmp = xor i32 %a, 1114112 - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} -; CHECK: f9: -; CHECK: teq.w r0, #1114112 ; 0x00110000 = 1114112 define i1 @f10(i32 %a) { diff --git a/test/CodeGen/Thumb2/thumb2-teq2.ll b/test/CodeGen/Thumb2/thumb2-teq2.ll index cdd3489c50d1..8acae9090f17 100644 --- a/test/CodeGen/Thumb2/thumb2-teq2.ll +++ b/test/CodeGen/Thumb2/thumb2-teq2.ll @@ -3,14 +3,6 @@ ; These tests implicitly depend on 'movs r0, #0' being rematerialized below the ; tst as 'mov.w r0, #0'. So far, that requires physreg joining. -define i1 @f1(i32 %a, i32 %b) { -; CHECK: f1 -; CHECK: teq.w r0, r1 - %tmp = xor i32 %a, %b - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} - define i1 @f2(i32 %a, i32 %b) { ; CHECK: f2 ; CHECK: teq.w r0, r1 @@ -19,14 +11,6 @@ define i1 @f2(i32 %a, i32 %b) { ret i1 %tmp1 } -define i1 @f3(i32 %a, i32 %b) { -; CHECK: f3 -; CHECK: teq.w r0, r1 - %tmp = xor i32 %a, %b - %tmp1 = icmp ne i32 0, %tmp - ret i1 %tmp1 -} - define i1 @f4(i32 %a, i32 %b) { ; CHECK: f4 ; CHECK: teq.w r0, r1 diff --git a/test/CodeGen/Thumb2/thumb2-tst.ll b/test/CodeGen/Thumb2/thumb2-tst.ll index 47f553f20486..43e208cc59dc 100644 --- a/test/CodeGen/Thumb2/thumb2-tst.ll +++ b/test/CodeGen/Thumb2/thumb2-tst.ll @@ -4,15 +4,6 @@ ; tst as 'mov.w r0, #0'. So far, that requires physreg joining. ; 0x000000bb = 187 -define i1 @f1(i32 %a) { - %tmp = and i32 %a, 187 - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} -; CHECK: f1: -; CHECK: tst.w r0, #187 - -; 0x000000bb = 187 define i1 @f2(i32 %a) { %tmp = and i32 %a, 187 %tmp1 = icmp eq i32 0, %tmp @@ -30,24 +21,6 @@ define i1 @f3(i32 %a) { ; CHECK: f3: ; CHECK: tst.w r0, #11141290 -; 0x00aa00aa = 11141290 -define i1 @f4(i32 %a) { - %tmp = and i32 %a, 11141290 - %tmp1 = icmp ne i32 0, %tmp - ret i1 %tmp1 -} -; CHECK: f4: -; CHECK: tst.w r0, #11141290 - -; 0xcc00cc00 = 3422604288 -define i1 @f5(i32 %a) { - %tmp = and i32 %a, 3422604288 - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} -; CHECK: f5: -; CHECK: tst.w r0, #-872363008 - ; 0xcc00cc00 = 3422604288 define i1 @f6(i32 %a) { %tmp = and i32 %a, 3422604288 @@ -66,24 +39,6 @@ define i1 @f7(i32 %a) { ; CHECK: f7: ; CHECK: tst.w r0, #-572662307 -; 0xdddddddd = 3722304989 -define i1 @f8(i32 %a) { - %tmp = and i32 %a, 3722304989 - %tmp1 = icmp ne i32 0, %tmp - ret i1 %tmp1 -} -; CHECK: f8: -; CHECK: tst.w r0, #-572662307 - -; 0x00110000 = 1114112 -define i1 @f9(i32 %a) { - %tmp = and i32 %a, 1114112 - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} -; CHECK: f9: -; CHECK: tst.w r0, #1114112 - ; 0x00110000 = 1114112 define i1 @f10(i32 %a) { %tmp = and i32 %a, 1114112 diff --git a/test/CodeGen/Thumb2/thumb2-tst2.ll b/test/CodeGen/Thumb2/thumb2-tst2.ll index 405b3bb1d385..bfe016fc8d6f 100644 --- a/test/CodeGen/Thumb2/thumb2-tst2.ll +++ b/test/CodeGen/Thumb2/thumb2-tst2.ll @@ -3,14 +3,6 @@ ; These tests implicitly depend on 'movs r0, #0' being rematerialized below the ; tst as 'mov.w r0, #0'. So far, that requires physreg joining. -define i1 @f1(i32 %a, i32 %b) { -; CHECK: f1: -; CHECK: tst r0, r1 - %tmp = and i32 %a, %b - %tmp1 = icmp ne i32 %tmp, 0 - ret i1 %tmp1 -} - define i1 @f2(i32 %a, i32 %b) { ; CHECK: f2: ; CHECK: tst r0, r1 @@ -19,14 +11,6 @@ define i1 @f2(i32 %a, i32 %b) { ret i1 %tmp1 } -define i1 @f3(i32 %a, i32 %b) { -; CHECK: f3: -; CHECK: tst r0, r1 - %tmp = and i32 %a, %b - %tmp1 = icmp ne i32 0, %tmp - ret i1 %tmp1 -} - define i1 @f4(i32 %a, i32 %b) { ; CHECK: f4: ; CHECK: tst r0, r1 diff --git a/test/CodeGen/Thumb2/thumb2-uxt_rot.ll b/test/CodeGen/Thumb2/thumb2-uxt_rot.ll index b8e43812ed99..03189aa7e15f 100644 --- a/test/CodeGen/Thumb2/thumb2-uxt_rot.ll +++ b/test/CodeGen/Thumb2/thumb2-uxt_rot.ll @@ -1,13 +1,13 @@ ; RUN: llc < %s -march=thumb -mattr=+thumb2,+t2xtpk | FileCheck %s -define i8 @test1(i32 %A.u) zeroext { +define zeroext i8 @test1(i32 %A.u) { ; CHECK: test1 ; CHECK: uxtb r0, r0 %B.u = trunc i32 %A.u to i8 ret i8 %B.u } -define i32 @test2(i32 %A.u, i32 %B.u) zeroext { +define zeroext i32 @test2(i32 %A.u, i32 %B.u) { ; CHECK: test2 ; CHECK: uxtab r0, r0, r1 %C.u = trunc i32 %B.u to i8 @@ -16,7 +16,7 @@ define i32 @test2(i32 %A.u, i32 %B.u) zeroext { ret i32 %E.u } -define i32 @test3(i32 %A.u) zeroext { +define zeroext i32 @test3(i32 %A.u) { ; CHECK: test3 ; CHECK: uxth.w r0, r0, ror #8 %B.u = lshr i32 %A.u, 8 |