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-rw-r--r--test/CodeGen/X86/wide-integer-cmp.ll156
1 files changed, 87 insertions, 69 deletions
diff --git a/test/CodeGen/X86/wide-integer-cmp.ll b/test/CodeGen/X86/wide-integer-cmp.ll
index c45a0541e6a7..fbaf500e8333 100644
--- a/test/CodeGen/X86/wide-integer-cmp.ll
+++ b/test/CodeGen/X86/wide-integer-cmp.ll
@@ -1,7 +1,22 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=i686-linux-gnu %s -o - | FileCheck %s
define i32 @branch_eq(i64 %a, i64 %b) {
+; CHECK-LABEL: branch_eq:
+; CHECK: # BB#0: # %entry
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: xorl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: xorl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: orl %ecx, %eax
+; CHECK-NEXT: jne .LBB0_2
+; CHECK-NEXT: # BB#1: # %bb1
+; CHECK-NEXT: movl $1, %eax
+; CHECK-NEXT: retl
+; CHECK-NEXT: .LBB0_2: # %bb2
+; CHECK-NEXT: movl $2, %eax
+; CHECK-NEXT: retl
entry:
%cmp = icmp eq i64 %a, %b
br i1 %cmp, label %bb1, label %bb2
@@ -9,22 +24,22 @@ bb1:
ret i32 1
bb2:
ret i32 2
-
-; CHECK-LABEL: branch_eq:
-; CHECK: movl 4(%esp), [[LHSLo:%[a-z]+]]
-; CHECK: movl 8(%esp), [[LHSHi:%[a-z]+]]
-; CHECK: xorl 16(%esp), [[LHSHi]]
-; CHECK: xorl 12(%esp), [[LHSLo]]
-; CHECK: orl [[LHSHi]], [[LHSLo]]
-; CHECK: jne [[FALSE:.LBB[0-9_]+]]
-; CHECK: movl $1, %eax
-; CHECK: retl
-; CHECK: [[FALSE]]:
-; CHECK: movl $2, %eax
-; CHECK: retl
}
define i32 @branch_slt(i64 %a, i64 %b) {
+; CHECK-LABEL: branch_slt:
+; CHECK: # BB#0: # %entry
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: jge .LBB1_2
+; CHECK-NEXT: # BB#1: # %bb1
+; CHECK-NEXT: movl $1, %eax
+; CHECK-NEXT: retl
+; CHECK-NEXT: .LBB1_2: # %bb2
+; CHECK-NEXT: movl $2, %eax
+; CHECK-NEXT: retl
entry:
%cmp = icmp slt i64 %a, %b
br i1 %cmp, label %bb1, label %bb2
@@ -32,21 +47,22 @@ bb1:
ret i32 1
bb2:
ret i32 2
-
-; CHECK-LABEL: branch_slt:
-; CHECK: movl 4(%esp), [[LHSLo:%[a-z]+]]
-; CHECK: movl 8(%esp), [[LHSHi:%[a-z]+]]
-; CHECK: cmpl 12(%esp), [[LHSLo]]
-; CHECK: sbbl 16(%esp), [[LHSHi]]
-; CHECK: jge [[FALSE:.LBB[0-9_]+]]
-; CHECK: movl $1, %eax
-; CHECK: retl
-; CHECK: [[FALSE]]:
-; CHECK: movl $2, %eax
-; CHECK: retl
}
define i32 @branch_ule(i64 %a, i64 %b) {
+; CHECK-LABEL: branch_ule:
+; CHECK: # BB#0: # %entry
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: jb .LBB2_2
+; CHECK-NEXT: # BB#1: # %bb1
+; CHECK-NEXT: movl $1, %eax
+; CHECK-NEXT: retl
+; CHECK-NEXT: .LBB2_2: # %bb2
+; CHECK-NEXT: movl $2, %eax
+; CHECK-NEXT: retl
entry:
%cmp = icmp ule i64 %a, %b
br i1 %cmp, label %bb1, label %bb2
@@ -54,36 +70,49 @@ bb1:
ret i32 1
bb2:
ret i32 2
-
-; CHECK-LABEL: branch_ule:
-; CHECK: movl 12(%esp), [[RHSLo:%[a-z]+]]
-; CHECK: movl 16(%esp), [[RHSHi:%[a-z]+]]
-; CHECK: cmpl 4(%esp), [[RHSLo]]
-; CHECK: sbbl 8(%esp), [[RHSHi]]
-; CHECK: jb [[FALSE:.LBB[0-9_]+]]
-; CHECK: movl $1, %eax
-; CHECK: retl
-; CHECK: [[FALSE]]:
-; CHECK: movl $2, %eax
-; CHECK: retl
}
define i32 @set_gt(i64 %a, i64 %b) {
+; CHECK-LABEL: set_gt:
+; CHECK: # BB#0: # %entry
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: setl %al
+; CHECK-NEXT: movzbl %al, %eax
+; CHECK-NEXT: retl
entry:
%cmp = icmp sgt i64 %a, %b
%res = select i1 %cmp, i32 1, i32 0
ret i32 %res
-
-; CHECK-LABEL: set_gt:
-; CHECK: movl 12(%esp), [[RHSLo:%[a-z]+]]
-; CHECK: movl 16(%esp), [[RHSHi:%[a-z]+]]
-; CHECK: cmpl 4(%esp), [[RHSLo]]
-; CHECK: sbbl 8(%esp), [[RHSHi]]
-; CHECK: setl %al
-; CHECK: retl
}
define i32 @test_wide(i128 %a, i128 %b) {
+; CHECK-LABEL: test_wide:
+; CHECK: # BB#0: # %entry
+; CHECK-NEXT: pushl %esi
+; CHECK-NEXT: .Lcfi0:
+; CHECK-NEXT: .cfi_def_cfa_offset 8
+; CHECK-NEXT: .Lcfi1:
+; CHECK-NEXT: .cfi_offset %esi, -8
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
+; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %esi
+; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: sbbl {{[0-9]+}}(%esp), %ecx
+; CHECK-NEXT: jge .LBB4_2
+; CHECK-NEXT: # BB#1: # %bb1
+; CHECK-NEXT: movl $1, %eax
+; CHECK-NEXT: popl %esi
+; CHECK-NEXT: retl
+; CHECK-NEXT: .LBB4_2: # %bb2
+; CHECK-NEXT: movl $2, %eax
+; CHECK-NEXT: popl %esi
+; CHECK-NEXT: retl
entry:
%cmp = icmp slt i128 %a, %b
br i1 %cmp, label %bb1, label %bb2
@@ -91,21 +120,22 @@ bb1:
ret i32 1
bb2:
ret i32 2
-
-; CHECK-LABEL: test_wide:
-; CHECK: cmpl 24(%esp)
-; CHECK: sbbl 28(%esp)
-; CHECK: sbbl 32(%esp)
-; CHECK: sbbl 36(%esp)
-; CHECK: jge [[FALSE:.LBB[0-9_]+]]
-; CHECK: movl $1, %eax
-; CHECK: retl
-; CHECK: [[FALSE]]:
-; CHECK: movl $2, %eax
-; CHECK: retl
}
+; The comparison of the low bits will be folded to a CARRY_FALSE node. Make
+; sure the code can handle that.
define i32 @test_carry_false(i64 %a, i64 %b) {
+; CHECK-LABEL: test_carry_false:
+; CHECK: # BB#0: # %entry
+; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: cmpl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: jge .LBB5_2
+; CHECK-NEXT: # BB#1: # %bb1
+; CHECK-NEXT: movl $1, %eax
+; CHECK-NEXT: retl
+; CHECK-NEXT: .LBB5_2: # %bb2
+; CHECK-NEXT: movl $2, %eax
+; CHECK-NEXT: retl
entry:
%x = and i64 %a, -4294967296 ;0xffffffff00000000
%y = and i64 %b, -4294967296
@@ -115,16 +145,4 @@ bb1:
ret i32 1
bb2:
ret i32 2
-
-; The comparison of the low bits will be folded to a CARRY_FALSE node. Make
-; sure the code can handle that.
-; CHECK-LABEL: carry_false:
-; CHECK: movl 8(%esp), [[LHSHi:%[a-z]+]]
-; CHECK: cmpl 16(%esp), [[LHSHi]]
-; CHECK: jge [[FALSE:.LBB[0-9_]+]]
-; CHECK: movl $1, %eax
-; CHECK: retl
-; CHECK: [[FALSE]]:
-; CHECK: movl $2, %eax
-; CHECK: retl
}
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-12 15:45:36 +0000