5 files changed, 86 insertions, 0 deletions
diff --git a/test/CodeGen/X86/fast-isel-constpool.ll b/test/CodeGen/X86/fast-isel-constpool.ll
new file mode 100644
index 000000000000..ac2595a7461d
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-constpool.ll
@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -fast-isel | grep {LCPI1_0(%rip)}
+; Make sure fast isel uses rip-relative addressing when required.
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin9.0"
+
+define i32 @f0(double %x) nounwind {
+entry:
+	%retval = alloca i32		; <i32*> [#uses=2]
+	%x.addr = alloca double		; <double*> [#uses=2]
+	store double %x, double* %x.addr
+	%tmp = load double* %x.addr		; <double> [#uses=1]
+	%cmp = fcmp olt double %tmp, 8.500000e-01		; <i1> [#uses=1]
+	%conv = zext i1 %cmp to i32		; <i32> [#uses=1]
+	store i32 %conv, i32* %retval
+	%0 = load i32* %retval		; <i32> [#uses=1]
+	ret i32 %0
+}
diff --git a/test/CodeGen/X86/fast-isel-gv.ll b/test/CodeGen/X86/fast-isel-gv.ll
new file mode 100644
index 000000000000..b2f885095ece
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-gv.ll
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -fast-isel | grep {_kill@GOTPCREL(%rip)}
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin10.0"
+@f = global i8 (...)* @kill		; <i8 (...)**> [#uses=1]
+
+declare signext i8 @kill(...)
+
+define i32 @main() nounwind ssp {
+entry:
+	%retval = alloca i32		; <i32*> [#uses=2]
+	%0 = alloca i32		; <i32*> [#uses=2]
+	%"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
+	%1 = load i8 (...)** @f, align 8		; <i8 (...)*> [#uses=1]
+	%2 = icmp ne i8 (...)* %1, @kill		; <i1> [#uses=1]
+	%3 = zext i1 %2 to i32		; <i32> [#uses=1]
+	store i32 %3, i32* %0, align 4
+	%4 = load i32* %0, align 4		; <i32> [#uses=1]
+	store i32 %4, i32* %retval, align 4
+	br label %return
+
+return:		; preds = %entry
+	%retval1 = load i32* %retval		; <i32> [#uses=1]
+	ret i32 %retval1
+}
diff --git a/test/CodeGen/X86/inline-asm-fpstack3.ll b/test/CodeGen/X86/inline-asm-fpstack3.ll
new file mode 100644
index 000000000000..ac89a1d9ad51
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-fpstack3.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: grep {fld	%%st(0)} %t
+; PR4459
+
+declare x86_fp80 @ceil(x86_fp80)
+
+declare void @test(x86_fp80)
+
+define void @test2(x86_fp80 %a) {
+entry:
+	%0 = call x86_fp80 @ceil(x86_fp80 %a)
+	call void asm sideeffect "fistpl $0", "{st}"( x86_fp80 %0)
+	call void @test(x86_fp80 %0 )
+        ret void
+}
diff --git a/test/CodeGen/X86/inline-asm-fpstack4.ll b/test/CodeGen/X86/inline-asm-fpstack4.ll
new file mode 100644
index 000000000000..c9122fad6cf7
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-fpstack4.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=x86
+; PR4484
+
+declare x86_fp80 @ceil()
+
+declare void @test(x86_fp80)
+
+define void @test2(x86_fp80 %a) {
+entry:
+	%0 = call x86_fp80 @ceil()
+	call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %a)
+	call void @test(x86_fp80 %0)
+	ret void
+}
+
diff --git a/test/CodeGen/X86/inline-asm-fpstack5.ll b/test/CodeGen/X86/inline-asm-fpstack5.ll
new file mode 100644
index 000000000000..64f3788f45dd
--- /dev/null
+++ b/test/CodeGen/X86/inline-asm-fpstack5.ll
@@ -0,0 +1,15 @@
+; RUN: llvm-as < %s | llc -march=x86
+; PR4485
+
+define void @test(x86_fp80* %a) {
+entry:
+	%0 = load x86_fp80* %a, align 16
+	%1 = fmul x86_fp80 %0, 0xK4006B400000000000000
+	%2 = fmul x86_fp80 %1, 0xK4012F424000000000000
+	tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %2)
+	%3 = load x86_fp80* %a, align 16
+	%4 = fmul x86_fp80 %3, 0xK4006B400000000000000
+	%5 = fmul x86_fp80 %4, 0xK4012F424000000000000
+	tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %5)
+	ret void
+}