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path: root/test/ELF/arm-gnu-ifunc-plt.s
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Diffstat (limited to 'test/ELF/arm-gnu-ifunc-plt.s')
-rw-r--r--test/ELF/arm-gnu-ifunc-plt.s30
1 files changed, 15 insertions, 15 deletions
diff --git a/test/ELF/arm-gnu-ifunc-plt.s b/test/ELF/arm-gnu-ifunc-plt.s
index 30ef66a3b775..cd1e8b740b3e 100644
--- a/test/ELF/arm-gnu-ifunc-plt.s
+++ b/test/ELF/arm-gnu-ifunc-plt.s
@@ -10,23 +10,23 @@
// Check that the IRELATIVE relocations are last in the .got
// CHECK: Relocations [
// CHECK-NEXT: Section (4) .rel.dyn {
-// CHECK-NEXT: 0x12078 R_ARM_GLOB_DAT bar2 0x0
-// CHECK-NEXT: 0x1207C R_ARM_GLOB_DAT zed2 0x0
-// CHECK-NEXT: 0x12080 R_ARM_IRELATIVE - 0x0
-// CHECK-NEXT: 0x12084 R_ARM_IRELATIVE - 0x0
+// CHECK-NEXT: 0x13078 R_ARM_GLOB_DAT bar2 0x0
+// CHECK-NEXT: 0x1307C R_ARM_GLOB_DAT zed2 0x0
+// CHECK-NEXT: 0x13080 R_ARM_IRELATIVE - 0x0
+// CHECK-NEXT: 0x13084 R_ARM_IRELATIVE - 0x0
// CHECK-NEXT: }
// CHECK-NEXT: Section (5) .rel.plt {
-// CHECK-NEXT: 0x1300C R_ARM_JUMP_SLOT bar2 0x0
-// CHECK-NEXT: 0x13010 R_ARM_JUMP_SLOT zed2 0x0
+// CHECK-NEXT: 0x1200C R_ARM_JUMP_SLOT bar2 0x0
+// CHECK-NEXT: 0x12010 R_ARM_JUMP_SLOT zed2 0x0
// CHECK-NEXT: }
// CHECK-NEXT: ]
// Check that the GOT entries refer back to the ifunc resolver
+// GOTPLT: Contents of section .got.plt:
+// GOTPLT-NEXT: 12000 00000000 00000000 00000000 20100100
+// GOTPLT-NEXT: 12010 20100100
// GOTPLT: Contents of section .got:
-// GOTPLT-NEXT: 12078 00000000 00000000 00100100 04100100
-// GOTPLT-NEXT: Contents of section .got.plt:
-// GOTPLT-NEXT: 13000 00000000 00000000 00000000 20100100
-// GOTPLT-NEXT: 13010 20100100
+// GOTPLT-NEXT: 13078 00000000 00000000 00100100 04100100
// DISASM: Disassembly of section .text:
// DISASM-NEXT: foo:
@@ -46,15 +46,15 @@
// DISASM-NEXT: 11024: 04 e0 9f e5 ldr lr, [pc, #4]
// DISASM-NEXT: 11028: 0e e0 8f e0 add lr, pc, lr
// DISASM-NEXT: 1102c: 08 f0 be e5 ldr pc, [lr, #8]!
-// DISASM-NEXT: 11030: d0 1f 00 00
+// DISASM-NEXT: 11030: d0 0f 00 00
// DISASM-NEXT: 11034: 04 c0 9f e5 ldr r12, [pc, #4]
// DISASM-NEXT: 11038: 0f c0 8c e0 add r12, r12, pc
// DISASM-NEXT: 1103c: 00 f0 9c e5 ldr pc, [r12]
-// DISASM-NEXT: 11040: cc 1f 00 00
+// DISASM-NEXT: 11040: cc 0f 00 00
// DISASM-NEXT: 11044: 04 c0 9f e5 ldr r12, [pc, #4]
// DISASM-NEXT: 11048: 0f c0 8c e0 add r12, r12, pc
// DISASM-NEXT: 1104c: 00 f0 9c e5 ldr pc, [r12]
-// DISASM-NEXT: 11050: c0 1f 00 00
+// DISASM-NEXT: 11050: c0 0f 00 00
// Alignment to 16 byte boundary not strictly necessary on ARM, but harmless
// DISASM-NEXT: 11054: 00 00 00 00 andeq r0, r0, r0
// DISASM-NEXT: 11058: 00 00 00 00 andeq r0, r0, r0
@@ -62,11 +62,11 @@
// DISASM-NEXT: 11060: 04 c0 9f e5 ldr r12, [pc, #4]
// DISASM-NEXT: 11064: 0f c0 8c e0 add r12, r12, pc
// DISASM-NEXT: 11068: 00 f0 9c e5 ldr pc, [r12]
-// DISASM-NEXT: 1106c: 14 10 00 00
+// DISASM-NEXT: 1106c: 14 20 00 00
// DISASM-NEXT: 11070: 04 c0 9f e5 ldr r12, [pc, #4]
// DISASM-NEXT: 11074: 0f c0 8c e0 add r12, r12, pc
// DISASM-NEXT: 11078: 00 f0 9c e5 ldr pc, [r12]
-// DISASM-NEXT: 1107c: 08 10 00 00
+// DISASM-NEXT: 1107c: 08 20 00 00
.syntax unified