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-rw-r--r--test/MC/Mips/eh-frame.s167
-rw-r--r--test/MC/Mips/elf-gprel-32-64.ll37
-rw-r--r--test/MC/Mips/elf-reginfo.ll31
-rw-r--r--test/MC/Mips/elf_eflags.ll66
-rw-r--r--test/MC/Mips/elf_st_other.ll13
-rw-r--r--test/MC/Mips/hilo-addressing.s11
-rw-r--r--test/MC/Mips/mips-alu-instructions.s15
-rw-r--r--test/MC/Mips/mips-coprocessor-encodings.s3
-rw-r--r--test/MC/Mips/mips-expansions.s22
-rw-r--r--test/MC/Mips/mips-jump-instructions.s48
-rw-r--r--test/MC/Mips/mips64-alu-instructions.s100
-rw-r--r--test/MC/Mips/mips_directives.s35
-rw-r--r--test/MC/Mips/mips_gprel16.ll33
-rw-r--r--test/MC/Mips/nabi-regs.s36
-rw-r--r--test/MC/Mips/set-at-directive.s132
15 files changed, 718 insertions, 31 deletions
diff --git a/test/MC/Mips/eh-frame.s b/test/MC/Mips/eh-frame.s
new file mode 100644
index 000000000000..93ff0b8bd277
--- /dev/null
+++ b/test/MC/Mips/eh-frame.s
@@ -0,0 +1,167 @@
+// Test the bits of .eh_frame on mips that are already implemented correctly.
+
+// FIXME: This test would be a lot cleaner if llvm-objdump had the
+// --dwarf=frames option.
+
+// RUN: llvm-mc -filetype=obj %s -o %t.o -arch=mips
+// RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS32 %s
+
+// RUN: llvm-mc -filetype=obj %s -o %t.o -arch=mipsel
+// RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS32EL %s
+
+// RUN: llvm-mc -filetype=obj %s -o %t.o -arch=mips64
+// RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS64 %s
+
+// RUN: llvm-mc -filetype=obj %s -o %t.o -arch=mips64el
+// RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS64EL %s
+
+func:
+ .cfi_startproc
+ .cfi_endproc
+
+// MIPS32: RELOCATION RECORDS FOR [.eh_frame]:
+// MIPS32-NEXT: R_MIPS_32
+// MIPS32: Contents of section .eh_frame:
+// MIPS32-NEXT: 0000
+
+// Length
+// MIPS32: 00000010
+
+// CIE ID
+// MIPS32: 00000000
+
+// Version
+// MIPS32: 01
+
+// Augmentation String
+// MIPS32: 7a5200
+
+// Code Alignment Factor
+// MIPS32: 01
+
+// Data Alignment Factor (-4)
+// MIPS32: 7c
+
+// Return Address Register
+// MIPS32: 1f
+
+// Augmentation Size
+// MIPS32: 01
+
+// MIPS32: .........zR..|..
+// MIPS32-NEXT: 0010
+
+// Augmentation (fde pointer encoding: DW_EH_PE_sdata4)
+// MIPS32: 0b
+// FIXME: The instructions are different from the ones produces by gas.
+
+// MIPS32EL: RELOCATION RECORDS FOR [.eh_frame]:
+// MIPS32EL-NEXT: R_MIPS_32
+// MIPS32EL: Contents of section .eh_frame:
+// MIPS32EL-NEXT: 0000
+
+// Length
+// MIPS32EL: 10000000
+
+// CIE ID
+// MIPS32EL: 00000000
+
+// Version
+// MIPS32EL: 01
+
+// Augmentation String
+// MIPS32EL: 7a5200
+
+// Code Alignment Factor
+// MIPS32EL: 01
+
+// Data Alignment Factor (-4)
+// MIPS32EL: 7c
+
+// Return Address Register
+// MIPS32EL: 1f
+
+// Augmentation Size
+// MIPS32EL: 01
+
+// MIPS32EL: .........zR..|..
+// MIPS32EL-NEXT: 0010
+
+// Augmentation (fde pointer encoding: DW_EH_PE_sdata4)
+// MIPS32EL: 0b
+// FIXME: The instructions are different from the ones produces by gas.
+
+// MIPS64: RELOCATION RECORDS FOR [.eh_frame]:
+// MIPS64-NEXT: R_MIPS_64
+// MIPS64: Contents of section .eh_frame:
+// MIPS64-NEXT: 0000
+
+// Length
+// MIPS64: 00000010
+
+// CIE ID
+// MIPS64: 00000000
+
+// Version
+// MIPS64: 01
+
+// Augmentation String
+// MIPS64: 7a5200
+
+// Code Alignment Factor
+// MIPS64: 01
+
+// Data Alignment Factor (-8). GAS uses -4. Should be ok as long as all
+// offsets we need are a multiple of 8.
+// MIPS64: 78
+
+// Return Address Register
+// MIPS64: 1f
+
+// Augmentation Size
+// MIPS64: 01
+
+// MIPS64: .........zR..x..
+// MIPS64-NEXT: 0010
+
+// Augmentation (fde pointer encoding: DW_EH_PE_sdata8)
+// MIPS64: 0c
+// FIXME: The instructions are different from the ones produces by gas.
+
+
+// MIPS64EL: RELOCATION RECORDS FOR [.eh_frame]:
+// MIPS64EL-NEXT: R_MIPS_64
+// MIPS64EL: Contents of section .eh_frame:
+// MIPS64EL-NEXT: 0000
+
+// Length
+// MIPS64EL: 10000000
+
+// CIE ID
+// MIPS64EL: 00000000
+
+// Version
+// MIPS64EL: 01
+
+// Augmentation String
+// MIPS64EL: 7a5200
+
+// Code Alignment Factor
+// MIPS64EL: 01
+
+// Data Alignment Factor (-8). GAS uses -4. Should be ok as long as all
+// offsets we need are a multiple of 8.
+// MIPS64EL: 78
+
+// Return Address Register
+// MIPS64EL: 1f
+
+// Augmentation Size
+// MIPS64EL: 01
+
+// MIPS64EL: .........zR..x..
+// MIPS64EL-NEXT: 0010
+
+// Augmentation (fde pointer encoding: DW_EH_PE_sdata8)
+// MIPS64EL: 0c
+// FIXME: The instructions are different from the ones produces by gas.
diff --git a/test/MC/Mips/elf-gprel-32-64.ll b/test/MC/Mips/elf-gprel-32-64.ll
new file mode 100644
index 000000000000..b94682214df7
--- /dev/null
+++ b/test/MC/Mips/elf-gprel-32-64.ll
@@ -0,0 +1,37 @@
+; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 %s -o - \
+; RUN: | elf-dump --dump-section-data \
+; RUN: | FileCheck %s
+
+define i32 @test(i32 %c) nounwind {
+entry:
+ switch i32 %c, label %sw.default [
+ i32 0, label %sw.bb
+ i32 1, label %sw.bb2
+ i32 2, label %sw.bb5
+ i32 3, label %sw.bb8
+ ]
+
+sw.bb:
+ br label %return
+sw.bb2:
+ br label %return
+sw.bb5:
+ br label %return
+sw.bb8:
+ br label %return
+sw.default:
+ br label %return
+
+return:
+ %retval.0 = phi i32 [ -1, %sw.default ], [ 7, %sw.bb8 ], [ 2, %sw.bb5 ], [ 3, %sw.bb2 ], [ 1, %sw.bb ]
+ ret i32 %retval.0
+}
+
+; Check that the appropriate relocations were created.
+
+; R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE
+; CHECK: (('sh_name', 0x{{[a-z0-9]+}}) # '.rela.rodata'
+; CHECK: ('r_type3', 0x00)
+; CHECK-NEXT: ('r_type2', 0x12)
+; CHECK-NEXT: ('r_type', 0x0c)
+
diff --git a/test/MC/Mips/elf-reginfo.ll b/test/MC/Mips/elf-reginfo.ll
new file mode 100644
index 000000000000..1d7a18866c50
--- /dev/null
+++ b/test/MC/Mips/elf-reginfo.ll
@@ -0,0 +1,31 @@
+ ; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 %s -o - \
+ ; RUN: | elf-dump --dump-section-data | FileCheck --check-prefix=CHECK_64 %s
+ ; RUN: llc -filetype=obj -march=mipsel -mcpu=mips32 %s -o - \
+ ; RUN: | elf-dump --dump-section-data | FileCheck --check-prefix=CHECK_32 %s
+
+; Check for register information sections.
+;
+
+@str = private unnamed_addr constant [12 x i8] c"hello world\00"
+
+define i32 @main() nounwind {
+entry:
+; Check that the appropriate relocations were created.
+
+; check for .MIPS.options
+; CHECK_64: (('sh_name', 0x{{[0-9|a-f]+}}) # '.MIPS.options'
+; CHECK_64-NEXT: ('sh_type', 0x7000000d)
+; CHECK_64-NEXT: ('sh_flags', 0x0000000008000002)
+
+; check for .reginfo
+; CHECK_32: (('sh_name', 0x{{[0-9|a-f]+}}) # '.reginfo'
+; CHECK_32-NEXT: ('sh_type', 0x70000006)
+; CHECK_32-NEXT: ('sh_flags', 0x00000002)
+
+
+ %puts = tail call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @str, i64 0, i64 0))
+ ret i32 0
+
+}
+declare i32 @puts(i8* nocapture) nounwind
+
diff --git a/test/MC/Mips/elf_eflags.ll b/test/MC/Mips/elf_eflags.ll
new file mode 100644
index 000000000000..315cb812bf77
--- /dev/null
+++ b/test/MC/Mips/elf_eflags.ll
@@ -0,0 +1,66 @@
+; This tests ELF EFLAGS setting with direct object.
+; When the assembler is ready a .s file for it will
+; be created.
+
+; Non-shared (static) is the absence of pic and or cpic.
+
+; EF_MIPS_NOREORDER (0x00000001) is always on by default currently
+; EF_MIPS_PIC (0x00000002)
+; EF_MIPS_CPIC (0x00000004) - not tested yet
+; EF_MIPS_ABI2 (0x00000020) - n32 not tested yet
+; EF_MIPS_ARCH_32 (0x50000000)
+; EF_MIPS_ARCH_64 (0x60000000)
+; EF_MIPS_ARCH_32R2 (0x70000000)
+; EF_MIPS_ARCH_64R2 (0x80000000)
+
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32 %s
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32_PIC %s
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -relocation-model=static %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32R2 %s
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32R2_PIC %s
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -relocation-model=static %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32R2-MICROMIPS %s
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32R2-MICROMIPS_PIC %s
+
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64 -relocation-model=static %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE64 %s
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64 %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE64_PIC %s
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64r2 -relocation-model=static %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE64R2 %s
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64r2 %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE64R2_PIC %s
+
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+mips16 -relocation-model=pic %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-LE32R2-MIPS16 %s
+
+; 32(R1) bit with NO_REORDER and static
+; CHECK-BE32: ('e_flags', 0x50001001)
+;
+; 32(R1) bit with NO_REORDER and PIC
+; CHECK-BE32_PIC: ('e_flags', 0x50001003)
+;
+; 32R2 bit with NO_REORDER and static
+; CHECK-BE32R2: ('e_flags', 0x70001001)
+;
+; 32R2 bit with NO_REORDER and PIC
+; CHECK-BE32R2_PIC: ('e_flags', 0x70001003)
+;
+; 32R2 bit MICROMIPS with NO_REORDER and static
+; CHECK-BE32R2-MICROMIPS: ('e_flags', 0x72001001)
+;
+; 32R2 bit MICROMIPS with NO_REORDER and PIC
+;CHECK-BE32R2-MICROMIPS_PIC: ('e_flags', 0x72001003)
+;
+; 64(R1) bit with NO_REORDER and static
+; CHECK-BE64: ('e_flags', 0x60000001)
+;
+; 64(R1) bit with NO_REORDER and PIC
+; CHECK-BE64_PIC: ('e_flags', 0x60000003)
+;
+; 64R2 bit with NO_REORDER and static
+; CHECK-BE64R2: ('e_flags', 0x80000001)
+;
+; 64R2 bit with NO_REORDER and PIC
+; CHECK-BE64R2_PIC: ('e_flags', 0x80000003)
+;
+; 32R2 bit MIPS16 with PIC
+; CHECK-LE32R2-MIPS16: ('e_flags', 0x74001002)
+
+define i32 @main() nounwind {
+entry:
+ ret i32 0
+}
diff --git a/test/MC/Mips/elf_st_other.ll b/test/MC/Mips/elf_st_other.ll
new file mode 100644
index 000000000000..f188ce7ba387
--- /dev/null
+++ b/test/MC/Mips/elf_st_other.ll
@@ -0,0 +1,13 @@
+; This tests value of ELF st_other field for function symbol table entries.
+; For microMIPS value should be equal to STO_MIPS_MICROMIPS.
+
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | elf-dump --dump-section-data | FileCheck %s
+
+define i32 @main() nounwind {
+entry:
+ ret i32 0
+}
+
+; CHECK: 'main'
+; CHECK: ('st_other', 0x80)
+
diff --git a/test/MC/Mips/hilo-addressing.s b/test/MC/Mips/hilo-addressing.s
new file mode 100644
index 000000000000..28459c206728
--- /dev/null
+++ b/test/MC/Mips/hilo-addressing.s
@@ -0,0 +1,11 @@
+# RUN: llvm-mc -show-encoding -triple mips-unknown-unknown %s | FileCheck %s
+
+ .ent hilo_test
+ .equ addr, 0xdeadbeef
+# CHECK: # encoding: [0x3c,0x04,0xde,0xae]
+ lui $4,%hi(addr)
+# CHECK: # encoding: [0x03,0xe0,0x00,0x08]
+ jr $31
+# CHECK: # encoding: [0x80,0x82,0xbe,0xef]
+ lb $2,%lo(addr)($4)
+ .end hilo_test
diff --git a/test/MC/Mips/mips-alu-instructions.s b/test/MC/Mips/mips-alu-instructions.s
index 2997782cd01b..7384d19e440f 100644
--- a/test/MC/Mips/mips-alu-instructions.s
+++ b/test/MC/Mips/mips-alu-instructions.s
@@ -13,6 +13,7 @@
# CHECK: ins $19, $9, 6, 7 # encoding: [0x84,0x61,0x33,0x7d]
# CHECK: nor $9, $6, $7 # encoding: [0x27,0x48,0xc7,0x00]
# CHECK: or $3, $3, $5 # encoding: [0x25,0x18,0x65,0x00]
+# CHECK: ori $4, $5, 17767 # encoding: [0x67,0x45,0xa4,0x34]
# CHECK: ori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x34]
# CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00]
# CHECK: rotrv $9, $6, $7 # encoding: [0x46,0x48,0xe6,0x00]
@@ -31,7 +32,7 @@
# CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x38]
# CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x38]
# CHECK: wsbh $6, $7 # encoding: [0xa0,0x30,0x07,0x7c]
-# CHECK: nor $7, $8, $zero # encoding: [0x27,0x38,0x00,0x01]
+# CHECK: not $7, $8 # encoding: [0x27,0x38,0x00,0x01]
and $9, $6, $7
and $9, $6, 17767
andi $9, $6, 17767
@@ -40,6 +41,7 @@
ins $19, $9, 6,7
nor $9, $6, $7
or $3, $3, $5
+ or $4, $5, 17767
ori $9, $6, 17767
rotr $9, $6, 7
rotrv $9, $6, $7
@@ -78,9 +80,13 @@
# CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
# CHECK: sub $9, $6, $7 # encoding: [0x22,0x48,0xc7,0x00]
# CHECK: subu $4, $3, $5 # encoding: [0x23,0x20,0x65,0x00]
-# CHECK: sub $6, $zero, $7 # encoding: [0x22,0x30,0x07,0x00]
-# CHECK: subu $6, $zero, $7 # encoding: [0x23,0x30,0x07,0x00]
-# CHECK: add $7, $8, $zero # encoding: [0x20,0x38,0x00,0x01]
+# CHECK: neg $6, $7 # encoding: [0x22,0x30,0x07,0x00]
+# CHECK: negu $6, $7 # encoding: [0x23,0x30,0x07,0x00]
+# CHECK: move $7, $8 # encoding: [0x21,0x38,0x00,0x01]
+# CHECK: .set push
+# CHECK: .set mips32r2
+# CHECK: rdhwr $5, $29
+# CHECK: .set pop # encoding: [0x3b,0xe8,0x05,0x7c]
add $9,$6,$7
add $9,$6,17767
addu $9,$6,-15001
@@ -98,3 +104,4 @@
neg $6,$7
negu $6,$7
move $7,$8
+ rdhwr $5, $29
diff --git a/test/MC/Mips/mips-coprocessor-encodings.s b/test/MC/Mips/mips-coprocessor-encodings.s
index bad9163ba9fa..3d638c3ac9ce 100644
--- a/test/MC/Mips/mips-coprocessor-encodings.s
+++ b/test/MC/Mips/mips-coprocessor-encodings.s
@@ -1,4 +1,5 @@
-# RUN: llvm-mc %s -triple=mips64-unknown-freebsd -show-encoding | FileCheck --check-prefix=MIPS64 %s
+# RUN: llvm-mc %s -triple=mips64-unknown-freebsd -show-encoding \
+# RUN:| FileCheck --check-prefix=MIPS64 %s
# MIPS64: dmtc0 $12, $16, 2 # encoding: [0x40,0xac,0x80,0x02]
# MIPS64: dmtc0 $12, $16, 0 # encoding: [0x40,0xac,0x80,0x00]
diff --git a/test/MC/Mips/mips-expansions.s b/test/MC/Mips/mips-expansions.s
index cfc15e883a95..3385fe19309f 100644
--- a/test/MC/Mips/mips-expansions.s
+++ b/test/MC/Mips/mips-expansions.s
@@ -16,6 +16,22 @@
# CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c]
# CHECK: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34]
# CHECK: addu $7, $7, $8 # encoding: [0x21,0x38,0xe8,0x00]
+# CHECK: lui $10, %hi(symbol) # encoding: [A,A,0x0a,0x3c]
+# CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16
+# CHECK: addu $10, $10, $4 # encoding: [0x21,0x50,0x44,0x01]
+# CHECK: lw $10, %lo(symbol)($10) # encoding: [A,A,0x4a,0x8d]
+# CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16
+# CHECK: lui $1, %hi(symbol) # encoding: [A,A,0x01,0x3c]
+# CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16
+# CHECK: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00]
+# CHECK: sw $10, %lo(symbol)($1) # encoding: [A,A,0x2a,0xac]
+# CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16
+# CHECK: lui $10, 10 # encoding: [0x0a,0x00,0x0a,0x3c]
+# CHECK: addu $10, $10, $4 # encoding: [0x21,0x50,0x44,0x01]
+# CHECK: lw $10, 123($10) # encoding: [0x7b,0x00,0x4a,0x8d]
+# CHECK: lui $1, 2 # encoding: [0x02,0x00,0x01,0x3c]
+# CHECK: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00]
+# CHECK: sw $10, 57920($1) # encoding: [0x40,0xe2,0x2a,0xac]
li $5,123
li $6,-2345
@@ -25,3 +41,9 @@
la $7,65538
la $a0, 20($a1)
la $7,65538($8)
+
+ lw $t2, symbol($a0)
+ sw $t2, symbol($t1)
+
+ lw $t2, 655483($a0)
+ sw $t2, 123456($t1)
diff --git a/test/MC/Mips/mips-jump-instructions.s b/test/MC/Mips/mips-jump-instructions.s
index 998be418d204..1dcb287738ce 100644
--- a/test/MC/Mips/mips-jump-instructions.s
+++ b/test/MC/Mips/mips-jump-instructions.s
@@ -1,30 +1,34 @@
-# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | \
+# RUN: FileCheck %s
# Check that the assembler can handle the documented syntax
# for jumps and branches.
# CHECK: .section __TEXT,__text,regular,pure_instructions
#------------------------------------------------------------------------------
# Branch instructions
#------------------------------------------------------------------------------
-# CHECK: b 1332 # encoding: [0x34,0x05,0x00,0x10]
+# CHECK: b 1332 # encoding: [0x4d,0x01,0x00,0x10]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
-# CHECK: bc1f 1332 # encoding: [0x34,0x05,0x00,0x45]
+# CHECK: bc1f 1332 # encoding: [0x4d,0x01,0x00,0x45]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
-# CHECK: bc1t 1332 # encoding: [0x34,0x05,0x01,0x45]
+# CHECK: bc1t 1332 # encoding: [0x4d,0x01,0x01,0x45]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
-# CHECK: beq $9, $6, 1332 # encoding: [0x34,0x05,0x26,0x11]
+# CHECK: beq $9, $6, 1332 # encoding: [0x4d,0x01,0x26,0x11]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
-# CHECK: bgez $6, 1332 # encoding: [0x34,0x05,0xc1,0x04]
+# CHECK: bgez $6, 1332 # encoding: [0x4d,0x01,0xc1,0x04]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
-# CHECK: bgezal $6, 1332 # encoding: [0x34,0x05,0xd1,0x04]
+# CHECK: bgezal $6, 1332 # encoding: [0x4d,0x01,0xd1,0x04]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
-# CHECK: bgtz $6, 1332 # encoding: [0x34,0x05,0xc0,0x1c]
+# CHECK: bgtz $6, 1332 # encoding: [0x4d,0x01,0xc0,0x1c]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
-# CHECK: blez $6, 1332 # encoding: [0x34,0x05,0xc0,0x18]
+# CHECK: blez $6, 1332 # encoding: [0x4d,0x01,0xc0,0x18]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
-# CHECK: bne $9, $6, 1332 # encoding: [0x34,0x05,0x26,0x15]
+# CHECK: bne $9, $6, 1332 # encoding: [0x4d,0x01,0x26,0x15]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
-# CHECK: bal 1332 # encoding: [0x34,0x05,0x00,0x04]
+# CHECK: bal 1332 # encoding: [0x4d,0x01,0x11,0x04]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
+
+.set noreorder
+
b 1332
nop
bc1f 1332
@@ -50,15 +54,24 @@ end_of_code:
#------------------------------------------------------------------------------
# Jump instructions
#------------------------------------------------------------------------------
-# CHECK: j 1328 # encoding: [0x30,0x05,0x00,0x08]
+# CHECK: j 1328 # encoding: [0x4c,0x01,0x00,0x08]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
-# CHECK: jal 1328 # encoding: [0x30,0x05,0x00,0x0c]
+# CHECK: jal 1328 # encoding: [0x4c,0x01,0x00,0x0c]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK: jalr $6 # encoding: [0x09,0xf8,0xc0,0x00]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
+# CHECK: jalr $25 # encoding: [0x09,0xf8,0x20,0x03]
+# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
+# CHECK: jalr $10, $11 # encoding: [0x09,0x50,0x60,0x01]
+# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK: jr $7 # encoding: [0x08,0x00,0xe0,0x00]
# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK: jr $7 # encoding: [0x08,0x00,0xe0,0x00]
+# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
+# CHECK: jalr $25 # encoding: [0x09,0xf8,0x20,0x03]
+# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
+# CHECK: jalr $4, $25 # encoding: [0x09,0x20,0x20,0x03]
+# CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
j 1328
@@ -67,6 +80,15 @@ end_of_code:
nop
jalr $6
nop
+ jalr $31, $25
+ nop
+ jalr $10, $11
+ nop
jr $7
nop
j $7
+ nop
+ jal $25
+ nop
+ jal $4,$25
+ nop
diff --git a/test/MC/Mips/mips64-alu-instructions.s b/test/MC/Mips/mips64-alu-instructions.s
new file mode 100644
index 000000000000..1b4ebdfbbd49
--- /dev/null
+++ b/test/MC/Mips/mips64-alu-instructions.s
@@ -0,0 +1,100 @@
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s
+# Check that the assembler can handle the documented syntax
+# for arithmetic and logical instructions.
+# CHECK: .section __TEXT,__text,regular,pure_instructions
+#------------------------------------------------------------------------------
+# Logical instructions
+#------------------------------------------------------------------------------
+# CHECK: and $9, $6, $7 # encoding: [0x24,0x48,0xc7,0x00]
+# CHECK: andi $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x30]
+# CHECK: andi $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x30]
+# CHECK: clo $6, $7 # encoding: [0x21,0x30,0xe6,0x70]
+# CHECK: clz $6, $7 # encoding: [0x20,0x30,0xe6,0x70]
+# CHECK: ins $19, $9, 6, 7 # encoding: [0x84,0x61,0x33,0x7d]
+# CHECK: nor $9, $6, $7 # encoding: [0x27,0x48,0xc7,0x00]
+# CHECK: or $3, $3, $5 # encoding: [0x25,0x18,0x65,0x00]
+# CHECK: ori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x34]
+# CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00]
+# CHECK: rotrv $9, $6, $7 # encoding: [0x46,0x48,0xe6,0x00]
+# CHECK: sll $4, $3, 7 # encoding: [0xc0,0x21,0x03,0x00]
+# CHECK: sllv $2, $3, $5 # encoding: [0x04,0x10,0xa3,0x00]
+# CHECK: slt $3, $3, $5 # encoding: [0x2a,0x18,0x65,0x00]
+# CHECK: slti $3, $3, 103 # encoding: [0x67,0x00,0x63,0x28]
+# CHECK: slti $3, $3, 103 # encoding: [0x67,0x00,0x63,0x28]
+# CHECK: sltiu $3, $3, 103 # encoding: [0x67,0x00,0x63,0x2c]
+# CHECK: sltu $3, $3, $5 # encoding: [0x2b,0x18,0x65,0x00]
+# CHECK: sra $4, $3, 7 # encoding: [0xc3,0x21,0x03,0x00]
+# CHECK: srav $2, $3, $5 # encoding: [0x07,0x10,0xa3,0x00]
+# CHECK: srl $4, $3, 7 # encoding: [0xc2,0x21,0x03,0x00]
+# CHECK: srlv $2, $3, $5 # encoding: [0x06,0x10,0xa3,0x00]
+# CHECK: xor $3, $3, $5 # encoding: [0x26,0x18,0x65,0x00]
+# CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x38]
+# CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x38]
+# CHECK: wsbh $6, $7 # encoding: [0xa0,0x30,0x07,0x7c]
+# CHECK: not $7, $8 # encoding: [0x27,0x38,0x00,0x01]
+ and $9, $6, $7
+ and $9, $6, 17767
+ andi $9, $6, 17767
+ clo $6, $7
+ clz $6, $7
+ ins $19, $9, 6,7
+ nor $9, $6, $7
+ or $3, $3, $5
+ ori $9, $6, 17767
+ rotr $9, $6, 7
+ rotrv $9, $6, $7
+ sll $4, $3, 7
+ sllv $2, $3, $5
+ slt $3, $3, $5
+ slt $3, $3, 103
+ slti $3, $3, 103
+ sltiu $3, $3, 103
+ sltu $3, $3, $5
+ sra $4, $3, 7
+ srav $2, $3, $5
+ srl $4, $3, 7
+ srlv $2, $3, $5
+ xor $3, $3, $5
+ xor $9, $6, 17767
+ xori $9, $6, 17767
+ wsbh $6, $7
+ not $7 ,$8
+
+#------------------------------------------------------------------------------
+# Arithmetic instructions
+#------------------------------------------------------------------------------
+
+# CHECK: dadd $9, $6, $7 # encoding: [0x2c,0x48,0xc7,0x00]
+# CHECK: daddi $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x60]
+# CHECK: daddiu $9, $6, -15001 # encoding: [0x67,0xc5,0xc9,0x64]
+# CHECK: daddi $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x60]
+# CHECK: daddiu $9, $6, -15001 # encoding: [0x67,0xc5,0xc9,0x64]
+# CHECK: daddu $9, $6, $7 # encoding: [0x2d,0x48,0xc7,0x00]
+# CHECK: madd $6, $7 # encoding: [0x00,0x00,0xc7,0x70]
+# CHECK: maddu $6, $7 # encoding: [0x01,0x00,0xc7,0x70]
+# CHECK: msub $6, $7 # encoding: [0x04,0x00,0xc7,0x70]
+# CHECK: msubu $6, $7 # encoding: [0x05,0x00,0xc7,0x70]
+# CHECK: mult $3, $5 # encoding: [0x18,0x00,0x65,0x00]
+# CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
+# CHECK: dsubu $4, $3, $5 # encoding: [0x2f,0x20,0x65,0x00]
+# CHECK: move $7, $8 # encoding: [0x2d,0x38,0x00,0x01]
+# CHECK: .set push
+# CHECK: .set mips32r2
+# CHECK: rdhwr $5, $29
+# CHECK: .set pop # encoding: [0x3b,0xe8,0x05,0x7c]
+
+ dadd $9,$6,$7
+ dadd $9,$6,17767
+ daddu $9,$6,-15001
+ daddi $9,$6,17767
+ daddiu $9,$6,-15001
+ daddu $9,$6,$7
+ madd $6,$7
+ maddu $6,$7
+ msub $6,$7
+ msubu $6,$7
+ mult $3,$5
+ multu $3,$5
+ dsubu $4,$3,$5
+ move $7,$8
+ rdhwr $5, $29
diff --git a/test/MC/Mips/mips_directives.s b/test/MC/Mips/mips_directives.s
index e2f75a827d0a..df7e64563371 100644
--- a/test/MC/Mips/mips_directives.s
+++ b/test/MC/Mips/mips_directives.s
@@ -1,16 +1,25 @@
-# RUN: llvm-mc -triple mips-unknown-unknown %s
-#this test produces no output so there isS no FileCheck call
+# RUN: llvm-mc -show-encoding -triple mips-unknown-unknown %s | FileCheck %s
+#
$BB0_2:
.ent directives_test
- .frame $sp,0,$ra
- .mask 0x00000000,0
- .fmask 0x00000000,0
- .set noreorder
- .set nomacro
- .set noat
+ .frame $sp,0,$ra
+ .mask 0x00000000,0
+ .fmask 0x00000000,0
+ .set noreorder
+ .set nomacro
+ .set noat
$JTI0_0:
- .gpword ($BB0_2)
- .set at=$12
- .set macro
- .set reorder
- .end directives_test
+ .gpword ($BB0_2)
+ .word 0x77fffffc
+# CHECK: $JTI0_0:
+# CHECK-NEXT: .4byte 2013265916
+ .set at=$12
+ .set macro
+ .set reorder
+ .set at=$a0
+ .set STORE_MASK,$t7
+ .set FPU_MASK,$f7
+#CHECK: abs.s $f6, $f7 # encoding: [0x46,0x00,0x39,0x85]
+#CHECK: and $3, $15, $15 # encoding: [0x01,0xef,0x18,0x24]
+ abs.s $f6,FPU_MASK
+ and $3,$t7,STORE_MASK
diff --git a/test/MC/Mips/mips_gprel16.ll b/test/MC/Mips/mips_gprel16.ll
new file mode 100644
index 000000000000..b5a282de560b
--- /dev/null
+++ b/test/MC/Mips/mips_gprel16.ll
@@ -0,0 +1,33 @@
+; This addresses bug 14456. We were not writing
+; out the addend to the gprel16 relocation. The
+; addend is stored in the instruction immediate
+; field.
+;llc gprel16.ll -o gprel16.o -mcpu=mips32r2 -march=mipsel -filetype=obj -relocation-model=static
+
+; RUN: llc -mcpu=mips32r2 -march=mipsel -filetype=obj -relocation-model=static %s -o - \
+; RUN: | llvm-objdump -disassemble -mattr +mips32r2 - \
+; RUN: | FileCheck %s
+
+target triple = "mipsel-sde--elf-gcc"
+
+@var1 = internal global i32 0, align 4
+@var2 = internal global i32 0, align 4
+
+define i32 @testvar1() nounwind {
+entry:
+; CHECK: lw ${{[0-9]+}}, 0($gp)
+ %0 = load i32* @var1, align 4
+ %tobool = icmp ne i32 %0, 0
+ %cond = select i1 %tobool, i32 1, i32 0
+ ret i32 %cond
+}
+
+define i32 @testvar2() nounwind {
+entry:
+; CHECK: lw ${{[0-9]+}}, 4($gp)
+ %0 = load i32* @var2, align 4
+ %tobool = icmp ne i32 %0, 0
+ %cond = select i1 %tobool, i32 1, i32 0
+ ret i32 %cond
+}
+
diff --git a/test/MC/Mips/nabi-regs.s b/test/MC/Mips/nabi-regs.s
new file mode 100644
index 000000000000..9371208a2a9e
--- /dev/null
+++ b/test/MC/Mips/nabi-regs.s
@@ -0,0 +1,36 @@
+# OABI (o32, o64) have a different symbolic register
+# set for the A and T registers because the NABI allows
+# for 4 more register parameters (A registers) offsetting
+# the T registers.
+#
+# For now just check N64
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding \
+# RUN: -mcpu=mips64r2 -arch=mips64 | \
+# RUN: FileCheck %s
+
+# CHECK: .section __TEXT,__text,regular,pure_instructions
+ .text
+foo:
+
+# CHECK: add $16, $16, $4 # encoding: [0x02,0x04,0x80,0x20]
+ add $s0,$s0,$a0
+# CHECK: add $16, $16, $6 # encoding: [0x02,0x06,0x80,0x20]
+ add $s0,$s0,$a2
+# CHECK: add $16, $16, $7 # encoding: [0x02,0x07,0x80,0x20]
+ add $s0,$s0,$a3
+# CHECK: add $16, $16, $8 # encoding: [0x02,0x08,0x80,0x20]
+ add $s0,$s0,$a4
+# CHECK: add $16, $16, $9 # encoding: [0x02,0x09,0x80,0x20]
+ add $s0,$s0,$a5
+# CHECK: add $16, $16, $10 # encoding: [0x02,0x0a,0x80,0x20]
+ add $s0,$s0,$a6
+# CHECK: add $16, $16, $11 # encoding: [0x02,0x0b,0x80,0x20]
+ add $s0,$s0,$a7
+# CHECK: add $16, $16, $12 # encoding: [0x02,0x0c,0x80,0x20]
+ add $s0,$s0,$t0
+# CHECK: add $16, $16, $13 # encoding: [0x02,0x0d,0x80,0x20]
+ add $s0,$s0,$t1
+# CHECK: add $16, $16, $14 # encoding: [0x02,0x0e,0x80,0x20]
+ add $s0,$s0,$t2
+# CHECK: add $16, $16, $15 # encoding: [0x02,0x0f,0x80,0x20]
+ add $s0,$s0,$t3
diff --git a/test/MC/Mips/set-at-directive.s b/test/MC/Mips/set-at-directive.s
new file mode 100644
index 000000000000..98a3a35b5428
--- /dev/null
+++ b/test/MC/Mips/set-at-directive.s
@@ -0,0 +1,132 @@
+# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | \
+# RUN: FileCheck %s
+# Check that the assembler can handle the documented syntax
+# for ".set at" and set the correct value.
+
+# CHECK: .section __TEXT,__text,regular,pure_instructions
+ .text
+foo:
+# CHECK: jr $1 # encoding: [0x08,0x00,0x20,0x00]
+ .set at=$1
+ jr $at
+ nop
+# CHECK: jr $2 # encoding: [0x08,0x00,0x40,0x00]
+ .set at=$2
+ jr $at
+ nop
+# CHECK: jr $3 # encoding: [0x08,0x00,0x60,0x00]
+ .set at=$3
+ jr $at
+ nop
+# CHECK: jr $4 # encoding: [0x08,0x00,0x80,0x00]
+ .set at=$a0
+ jr $at
+ nop
+# CHECK: jr $5 # encoding: [0x08,0x00,0xa0,0x00]
+ .set at=$a1
+ jr $at
+ nop
+# CHECK: jr $6 # encoding: [0x08,0x00,0xc0,0x00]
+ .set at=$a2
+ jr $at
+ nop
+# CHECK: jr $7 # encoding: [0x08,0x00,0xe0,0x00]
+ .set at=$a3
+ jr $at
+ nop
+# CHECK: jr $8 # encoding: [0x08,0x00,0x00,0x01]
+ .set at=$8
+ jr $at
+ nop
+# CHECK: jr $9 # encoding: [0x08,0x00,0x20,0x01]
+ .set at=$9
+ jr $at
+ nop
+# CHECK: jr $10 # encoding: [0x08,0x00,0x40,0x01]
+ .set at=$10
+ jr $at
+ nop
+# CHECK: jr $11 # encoding: [0x08,0x00,0x60,0x01]
+ .set at=$11
+ jr $at
+ nop
+# CHECK: jr $12 # encoding: [0x08,0x00,0x80,0x01]
+ .set at=$12
+ jr $at
+ nop
+# CHECK: jr $13 # encoding: [0x08,0x00,0xa0,0x01]
+ .set at=$13
+ jr $at
+ nop
+# CHECK: jr $14 # encoding: [0x08,0x00,0xc0,0x01]
+ .set at=$14
+ jr $at
+ nop
+# CHECK: jr $15 # encoding: [0x08,0x00,0xe0,0x01]
+ .set at=$15
+ jr $at
+ nop
+# CHECK: jr $16 # encoding: [0x08,0x00,0x00,0x02]
+ .set at=$s0
+ jr $at
+ nop
+# CHECK: jr $17 # encoding: [0x08,0x00,0x20,0x02]
+ .set at=$s1
+ jr $at
+ nop
+# CHECK: jr $18 # encoding: [0x08,0x00,0x40,0x02]
+ .set at=$s2
+ jr $at
+ nop
+# CHECK: jr $19 # encoding: [0x08,0x00,0x60,0x02]
+ .set at=$s3
+ jr $at
+ nop
+# CHECK: jr $20 # encoding: [0x08,0x00,0x80,0x02]
+ .set at=$s4
+ jr $at
+ nop
+# CHECK: jr $21 # encoding: [0x08,0x00,0xa0,0x02]
+ .set at=$s5
+ jr $at
+ nop
+# CHECK: jr $22 # encoding: [0x08,0x00,0xc0,0x02]
+ .set at=$s6
+ jr $at
+ nop
+# CHECK: jr $23 # encoding: [0x08,0x00,0xe0,0x02]
+ .set at=$s7
+ jr $at
+ nop
+# CHECK: jr $24 # encoding: [0x08,0x00,0x00,0x03]
+ .set at=$24
+ jr $at
+ nop
+# CHECK: jr $25 # encoding: [0x08,0x00,0x20,0x03]
+ .set at=$25
+ jr $at
+ nop
+# CHECK: jr $26 # encoding: [0x08,0x00,0x40,0x03]
+ .set at=$26
+ jr $at
+ nop
+# CHECK: jr $27 # encoding: [0x08,0x00,0x60,0x03]
+ .set at=$27
+ jr $at
+ nop
+# CHECK: jr $gp # encoding: [0x08,0x00,0x80,0x03]
+ .set at=$gp
+ jr $at
+ nop
+# CHECK: jr $fp # encoding: [0x08,0x00,0xc0,0x03]
+ .set at=$fp
+ jr $at
+ nop
+# CHECK: jr $sp # encoding: [0x08,0x00,0xa0,0x03]
+ .set at=$sp
+ jr $at
+ nop
+# CHECK: jr $ra # encoding: [0x08,0x00,0xe0,0x03]
+ .set at=$ra
+ jr $at
+ nop
generated by cgit v1.3 (git 2.53.0) at 2026-07-24 20:14:00 +0000