diff options
Diffstat (limited to 'test/Transforms/InstCombine/select.ll')
| -rw-r--r-- | test/Transforms/InstCombine/select.ll | 213 |
1 files changed, 209 insertions, 4 deletions
diff --git a/test/Transforms/InstCombine/select.ll b/test/Transforms/InstCombine/select.ll index 1458bde82124..d625f3b1b33d 100644 --- a/test/Transforms/InstCombine/select.ll +++ b/test/Transforms/InstCombine/select.ll @@ -281,7 +281,7 @@ define i32 @test15i(i32 %X) { ; CHECK-NEXT: %t1 = shl i32 %X, 8 ; CHECK-NEXT: %1 = and i32 %t1, 512 ; CHECK-NEXT: %2 = xor i32 %1, 512 -; CHECK-NEXT: %3 = add i32 %2, 577 +; CHECK-NEXT: %3 = add nuw nsw i32 %2, 577 ; CHECK-NEXT: ret i32 %3 } @@ -294,7 +294,7 @@ define i32 @test15j(i32 %X) { ; CHECK-LABEL: @test15j( ; CHECK-NEXT: %t1 = shl i32 %X, 8 ; CHECK-NEXT: %1 = and i32 %t1, 512 -; CHECK-NEXT: %2 = add i32 %1, 577 +; CHECK-NEXT: %2 = add nuw nsw i32 %1, 577 ; CHECK-NEXT: ret i32 %2 } @@ -521,7 +521,7 @@ define i32 @test35(i32 %x) { ; CHECK-LABEL: @test35( ; CHECK: ashr i32 %x, 31 ; CHECK: and i32 {{.*}}, 40 -; CHECK: add i32 {{.*}}, 60 +; CHECK: add nuw nsw i32 {{.*}}, 60 ; CHECK: ret } @@ -532,7 +532,7 @@ define i32 @test36(i32 %x) { ; CHECK-LABEL: @test36( ; CHECK: ashr i32 %x, 31 ; CHECK: and i32 {{.*}}, -40 -; CHECK: add i32 {{.*}}, 100 +; CHECK: add nsw i32 {{.*}}, 100 ; CHECK: ret } @@ -996,6 +996,111 @@ define <2 x i32> @select_icmp_eq_and_1_0_or_vector_of_2s(i32 %x, <2 x i32> %y) { ret <2 x i32> %select } +; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8( +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 8 +; CHECK-NEXT: ret i32 [[OR]] +define i32 @select_icmp_and_8_eq_0_or_8(i32 %x) { + %and = and i32 %x, 8 + %cmp = icmp eq i32 %and, 0 + %or = or i32 %x, 8 + %or.x = select i1 %cmp, i32 %or, i32 %x + ret i32 %or.x +} + +; CHECK-LABEL: @select_icmp_and_8_ne_0_xor_8( +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, -9 +; CHECK-NEXT: ret i32 [[AND]] +define i32 @select_icmp_and_8_ne_0_xor_8(i32 %x) { + %and = and i32 %x, 8 + %cmp = icmp eq i32 %and, 0 + %xor = xor i32 %x, 8 + %x.xor = select i1 %cmp, i32 %x, i32 %xor + ret i32 %x.xor +} + +; CHECK-LABEL: @select_icmp_and_8_eq_0_xor_8( +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 8 +; CHECK-NEXT: ret i32 [[OR]] +define i32 @select_icmp_and_8_eq_0_xor_8(i32 %x) { + %and = and i32 %x, 8 + %cmp = icmp eq i32 %and, 0 + %xor = xor i32 %x, 8 + %xor.x = select i1 %cmp, i32 %xor, i32 %x + ret i32 %xor.x +} + +; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8( +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, -9 +; CHECK-NEXT: ret i32 [[AND]] +define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) { + %and = and i32 %x, 8 + %cmp = icmp eq i32 %and, 0 + %and1 = and i32 %x, -9 + %x.and1 = select i1 %cmp, i32 %x, i32 %and1 + ret i32 %x.and1 +} + +; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8( +; CHECK-NEXT: ret i32 %x +define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) { + %and = and i32 %x, 8 + %cmp = icmp eq i32 %and, 0 + %and1 = and i32 %x, -9 + %and1.x = select i1 %cmp, i32 %and1, i32 %x + ret i32 %and1.x +} + +; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_xor_8( +; CHECK: select i1 %cmp, i64 %y, i64 %xor +define i64 @select_icmp_x_and_8_eq_0_y_xor_8(i32 %x, i64 %y) { + %and = and i32 %x, 8 + %cmp = icmp eq i32 %and, 0 + %xor = xor i64 %y, 8 + %y.xor = select i1 %cmp, i64 %y, i64 %xor + ret i64 %y.xor +} + +; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_and_not_8( +; CHECK: select i1 %cmp, i64 %y, i64 %and1 +define i64 @select_icmp_x_and_8_eq_0_y_and_not_8(i32 %x, i64 %y) { + %and = and i32 %x, 8 + %cmp = icmp eq i32 %and, 0 + %and1 = and i64 %y, -9 + %y.and1 = select i1 %cmp, i64 %y, i64 %and1 + ret i64 %y.and1 +} + +; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_xor_8( +; CHECK: select i1 %cmp, i64 %xor, i64 %y +define i64 @select_icmp_x_and_8_ne_0_y_xor_8(i32 %x, i64 %y) { + %and = and i32 %x, 8 + %cmp = icmp eq i32 %and, 0 + %xor = xor i64 %y, 8 + %xor.y = select i1 %cmp, i64 %xor, i64 %y + ret i64 %xor.y +} + +; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_and_not_8( +; CHECK: select i1 %cmp, i64 %and1, i64 %y +define i64 @select_icmp_x_and_8_ne_0_y_and_not_8(i32 %x, i64 %y) { + %and = and i32 %x, 8 + %cmp = icmp eq i32 %and, 0 + %and1 = and i64 %y, -9 + %and1.y = select i1 %cmp, i64 %and1, i64 %y + ret i64 %and1.y +} + +; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8( +; CHECK: xor i64 %1, 8 +; CHECK: or i64 %2, %y +define i64 @select_icmp_x_and_8_ne_0_y_or_8(i32 %x, i64 %y) { + %and = and i32 %x, 8 + %cmp = icmp eq i32 %and, 0 + %or = or i64 %y, 8 + %or.y = select i1 %cmp, i64 %or, i64 %y + ret i64 %or.y +} + define i32 @test65(i64 %x) { %1 = and i64 %x, 16 %2 = icmp ne i64 %1, 0 @@ -1031,3 +1136,103 @@ define i32 @test67(i16 %x) { ; CHECK: lshr exact i32 %2, 1 ; CHECK: xor i32 %3, 42 } + +; SMIN(SMIN(X, 11), 92) -> SMIN(X, 11) +define i32 @test68(i32 %x) { +entry: + %cmp = icmp slt i32 11, %x + %cond = select i1 %cmp, i32 11, i32 %x + %cmp3 = icmp slt i32 92, %cond + %retval = select i1 %cmp3, i32 92, i32 %cond + ret i32 %retval +; CHECK-LABEL: @test68( +; CHECK: ret i32 %cond +} + +; MIN(MIN(X, 24), 83) -> MIN(X, 24) +define i32 @test69(i32 %x) { +entry: + %cmp = icmp ult i32 24, %x + %cond = select i1 %cmp, i32 24, i32 %x + %cmp3 = icmp ult i32 83, %cond + %retval = select i1 %cmp3, i32 83, i32 %cond + ret i32 %retval +; CHECK-LABEL: @test69( +; CHECK: ret i32 %cond +} + +; SMAX(SMAX(X, 75), 36) -> SMAX(X, 75) +define i32 @test70(i32 %x) { +entry: + %cmp = icmp slt i32 %x, 75 + %cond = select i1 %cmp, i32 75, i32 %x + %cmp3 = icmp slt i32 %cond, 36 + %retval = select i1 %cmp3, i32 36, i32 %cond + ret i32 %retval +; CHECK-LABEL: @test70( +; CHECK: ret i32 %cond +} + +; MAX(MAX(X, 68), 47) -> MAX(X, 68) +define i32 @test71(i32 %x) { +entry: + %cmp = icmp ult i32 %x, 68 + %cond = select i1 %cmp, i32 68, i32 %x + %cmp3 = icmp ult i32 %cond, 47 + %retval = select i1 %cmp3, i32 47, i32 %cond + ret i32 %retval +; CHECK-LABEL: @test71( +; CHECK: ret i32 %cond +} + +; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11) +define i32 @test72(i32 %x) { + %cmp = icmp sgt i32 %x, 92 + %cond = select i1 %cmp, i32 92, i32 %x + %cmp3 = icmp sgt i32 %cond, 11 + %retval = select i1 %cmp3, i32 11, i32 %cond + ret i32 %retval +; CHECK-LABEL: @test72( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 11 +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 11, i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +; MIN(MIN(X, 83), 24) -> MIN(X, 24) +define i32 @test73(i32 %x) { + %cmp = icmp ugt i32 %x, 83 + %cond = select i1 %cmp, i32 83, i32 %x + %cmp3 = icmp ugt i32 %cond, 24 + %retval = select i1 %cmp3, i32 24, i32 %cond + ret i32 %retval +; CHECK-LABEL: @test73( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ugt i32 %x, 24 +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 24, i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75) +define i32 @test74(i32 %x) { + %cmp = icmp slt i32 %x, 36 + %cond = select i1 %cmp, i32 36, i32 %x + %cmp3 = icmp slt i32 %cond, 75 + %retval = select i1 %cmp3, i32 75, i32 %cond + ret i32 %retval +; CHECK-LABEL: @test74( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 75 +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 75, i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} + +; MAX(MAX(X, 47), 68) -> MAX(X, 68) +define i32 @test75(i32 %x) { + %cmp = icmp ult i32 %x, 47 + %cond = select i1 %cmp, i32 47, i32 %x + %cmp3 = icmp ult i32 %cond, 68 + %retval = select i1 %cmp3, i32 68, i32 %cond + ret i32 %retval +; CHECK-LABEL: @test75( +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ult i32 %x, 68 +; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 68, i32 %x +; CHECK-NEXT: ret i32 [[SEL]] +} |
