diff options
Diffstat (limited to 'test')
39 files changed, 1000 insertions, 482 deletions
diff --git a/test/Analysis/ScalarEvolution/nw-sub-is-not-nw-add.ll b/test/Analysis/ScalarEvolution/nw-sub-is-not-nw-add.ll new file mode 100644 index 000000000000..41b07d5cd537 --- /dev/null +++ b/test/Analysis/ScalarEvolution/nw-sub-is-not-nw-add.ll @@ -0,0 +1,41 @@ +; RUN: opt -S -indvars < %s | FileCheck %s + +; Check that SCEV does not assume sub nuw X Y == add nuw X, -Y +define void @f(i32* %loc) { +; CHECK-LABEL: @f + entry: + br label %loop + + loop: + %idx = phi i32 [ 6, %entry ], [ %idx.dec, %loop ] + store i32 %idx, i32* %loc + %idx.dec = sub nuw i32 %idx, 1 + %cond = icmp uge i32 %idx.dec, 5 + br i1 %cond, label %loop, label %exit +; CHECK-NOT: br i1 true, label %loop, label %exit + + exit: + ret void +} + +declare void @use_i1(i1) + +; Check that SCEV does not assume sub nsw X Y == add nsw X, -Y +define void @g(i32 %lim) { +; CHECK-LABEL: @g + entry: + br label %loop + + loop: + %idx = phi i32 [ -1, %entry ], [ %idx.dec, %loop ] + %t = icmp sgt i32 %idx, 0 +; CHECK-NOT: call void @use_i1(i1 false) +; CHECK: call void @use_i1(i1 %t) + call void @use_i1(i1 %t) + %idx.dec = sub nsw i32 %idx, -2147483648 + %cond = icmp eq i32 %idx.dec, %lim + br i1 %cond, label %loop, label %exit + + exit: + ret void +} diff --git a/test/Bindings/llvm-c/add_named_metadata_operand.ll b/test/Bindings/llvm-c/add_named_metadata_operand.ll new file mode 100644 index 000000000000..fcc833d6af03 --- /dev/null +++ b/test/Bindings/llvm-c/add_named_metadata_operand.ll @@ -0,0 +1,2 @@ +; RUN: llvm-c-test --add-named-metadata-operand < /dev/null +; This used to trigger an assertion diff --git a/test/Bindings/llvm-c/set_metadata.ll b/test/Bindings/llvm-c/set_metadata.ll new file mode 100644 index 000000000000..0a65b8c47dee --- /dev/null +++ b/test/Bindings/llvm-c/set_metadata.ll @@ -0,0 +1,2 @@ +; RUN: llvm-c-test --set-metadata < /dev/null +; This used to trigger an assertion diff --git a/test/CodeGen/AArch64/arm64-platform-reg.ll b/test/CodeGen/AArch64/arm64-platform-reg.ll index 651c793f73a4..b0d3ee0ff8a3 100644 --- a/test/CodeGen/AArch64/arm64-platform-reg.ll +++ b/test/CodeGen/AArch64/arm64-platform-reg.ll @@ -1,4 +1,5 @@ -; RUN: llc -mtriple=arm64-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-DARWIN +; RUN: llc -mtriple=arm64-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18 +; RUN: llc -mtriple=arm64-freebsd-gnu -aarch64-reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18 ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s ; x18 is reserved as a platform register on Darwin but not on other @@ -16,11 +17,11 @@ define void @keep_live() { ; CHECK: ldr x18 ; CHECK: str x18 -; CHECK-DARWIN-NOT: ldr fp -; CHECK-DARWIN-NOT: ldr x18 -; CHECK-DARWIN: Spill -; CHECK-DARWIN-NOT: ldr fp -; CHECK-DARWIN-NOT: ldr x18 -; CHECK-DARWIN: ret +; CHECK-RESERVE-X18-NOT: ldr fp +; CHECK-RESERVE-X18-NOT: ldr x18 +; CHECK-RESERVE-X18: Spill +; CHECK-RESERVE-X18-NOT: ldr fp +; CHECK-RESERVE-X18-NOT: ldr x18 +; CHECK-RESERVE-X18: ret ret void } diff --git a/test/CodeGen/AArch64/ghc-cc.ll b/test/CodeGen/AArch64/ghc-cc.ll new file mode 100644 index 000000000000..505bd5fca66d --- /dev/null +++ b/test/CodeGen/AArch64/ghc-cc.ll @@ -0,0 +1,89 @@ +; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s + +; Check the GHC call convention works (aarch64) + +@base = external global i64 ; assigned to register: r19 +@sp = external global i64 ; assigned to register: r20 +@hp = external global i64 ; assigned to register: r21 +@r1 = external global i64 ; assigned to register: r22 +@r2 = external global i64 ; assigned to register: r23 +@r3 = external global i64 ; assigned to register: r24 +@r4 = external global i64 ; assigned to register: r25 +@r5 = external global i64 ; assigned to register: r26 +@r6 = external global i64 ; assigned to register: r27 +@splim = external global i64 ; assigned to register: r28 + +@f1 = external global float ; assigned to register: s8 +@f2 = external global float ; assigned to register: s9 +@f3 = external global float ; assigned to register: s10 +@f4 = external global float ; assigned to register: s11 + +@d1 = external global double ; assigned to register: d12 +@d2 = external global double ; assigned to register: d13 +@d3 = external global double ; assigned to register: d14 +@d4 = external global double ; assigned to register: d15 + +define ghccc i64 @addtwo(i64 %x, i64 %y) nounwind { +entry: + ; CHECK-LABEL: addtwo + ; CHECK: add x0, x19, x20 + ; CHECK-NEXT: ret + %0 = add i64 %x, %y + ret i64 %0 +} + +define void @zap(i64 %a, i64 %b) nounwind { +entry: + ; CHECK-LABEL: zap + ; CHECK-NOT: mov {{x[0-9]+}}, sp + ; CHECK: bl addtwo + ; CHECK-NEXT: bl foo + %0 = call ghccc i64 @addtwo(i64 %a, i64 %b) + call void @foo() nounwind + ret void +} + +define ghccc void @foo_i64 () nounwind { +entry: + ; CHECK-LABEL: foo_i64 + ; CHECK: adrp {{x[0-9]+}}, base + ; CHECK-NEXT: ldr x19, [{{x[0-9]+}}, :lo12:base] + ; CHECK-NEXT: bl bar_i64 + ; CHECK-NEXT: ret + + %0 = load i64* @base + tail call ghccc void @bar_i64( i64 %0 ) nounwind + ret void +} + +define ghccc void @foo_float () nounwind { +entry: + ; CHECK-LABEL: foo_float + ; CHECK: adrp {{x[0-9]+}}, f1 + ; CHECK-NEXT: ldr s8, [{{x[0-9]+}}, :lo12:f1] + ; CHECK-NEXT: bl bar_float + ; CHECK-NEXT: ret + + %0 = load float* @f1 + tail call ghccc void @bar_float( float %0 ) nounwind + ret void +} + +define ghccc void @foo_double () nounwind { +entry: + ; CHECK-LABEL: foo_double + ; CHECK: adrp {{x[0-9]+}}, d1 + ; CHECK-NEXT: ldr d12, [{{x[0-9]+}}, :lo12:d1] + ; CHECK-NEXT: bl bar_double + ; CHECK-NEXT: ret + + %0 = load double* @d1 + tail call ghccc void @bar_double( double %0 ) nounwind + ret void +} + +declare ghccc void @foo () + +declare ghccc void @bar_i64 (i64) +declare ghccc void @bar_float (float) +declare ghccc void @bar_double (double) diff --git a/test/CodeGen/ARM/2015-01-21-thumbv4t-ldstr-opt.ll b/test/CodeGen/ARM/2015-01-21-thumbv4t-ldstr-opt.ll new file mode 100644 index 000000000000..f3cc3d82121f --- /dev/null +++ b/test/CodeGen/ARM/2015-01-21-thumbv4t-ldstr-opt.ll @@ -0,0 +1,55 @@ +; RUN: llc -mtriple=thumbv4t-none--eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V4T +; RUN: llc -mtriple=thumbv6m-none--eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V6M + +; CHECK-LABEL: foo +define i32 @foo(i32 %z, ...) #0 { +entry: + %a = alloca i32, align 4 + %b = alloca i32, align 4 + %c = alloca i32, align 4 + %d = alloca i32, align 4 + %e = alloca i32, align 4 + %f = alloca i32, align 4 + %g = alloca i32, align 4 + %h = alloca i32, align 4 + + store i32 1, i32* %a, align 4 + store i32 2, i32* %b, align 4 + store i32 3, i32* %c, align 4 + store i32 4, i32* %d, align 4 + store i32 5, i32* %e, align 4 + store i32 6, i32* %f, align 4 + store i32 7, i32* %g, align 4 + store i32 8, i32* %h, align 4 + + %0 = load i32* %a, align 4 + %1 = load i32* %b, align 4 + %2 = load i32* %c, align 4 + %3 = load i32* %d, align 4 + %4 = load i32* %e, align 4 + %5 = load i32* %f, align 4 + %6 = load i32* %g, align 4 + %7 = load i32* %h, align 4 + + %add = add nsw i32 %0, %1 + %add4 = add nsw i32 %add, %2 + %add5 = add nsw i32 %add4, %3 + %add6 = add nsw i32 %add5, %4 + %add7 = add nsw i32 %add6, %5 + %add8 = add nsw i32 %add7, %6 + %add9 = add nsw i32 %add8, %7 + + %addz = add nsw i32 %add9, %z + call void @llvm.va_start(i8* null) + ret i32 %addz + +; CHECK: sub sp, #40 +; CHECK-NEXT: add [[BASE:r[0-9]]], sp, #8 + +; CHECK-V4T: movs [[NEWBASE:r[0-9]]], [[BASE]] +; CHECK-V6M: mov [[NEWBASE:r[0-9]]], [[BASE]] +; CHECK-NEXT: adds [[NEWBASE]], #8 +; CHECK-NEXT: ldm [[NEWBASE]], +} + +declare void @llvm.va_start(i8*) nounwind diff --git a/test/CodeGen/Mips/fcmp.ll b/test/CodeGen/Mips/fcmp.ll index b7759831c5a2..8e83b0064ed9 100644 --- a/test/CodeGen/Mips/fcmp.ll +++ b/test/CodeGen/Mips/fcmp.ll @@ -781,3 +781,93 @@ define i32 @true_f64(double %a, double %b) nounwind { %2 = zext i1 %1 to i32 ret i32 %2 } + +; The optimizers sometimes produce setlt instead of setolt/setult. +define float @bug1_f32(float %angle, float %at) #0 { +entry: +; ALL-LABEL: bug1_f32: + +; 32-C-DAG: add.s $[[T0:f[0-9]+]], $f14, $f12 +; 32-C-DAG: lwc1 $[[T1:f[0-9]+]], %lo($CPI32_0)( +; 32-C-DAG: c.ole.s $[[T0]], $[[T1]] +; 32-C-DAG: bc1t + +; 32-CMP-DAG: add.s $[[T0:f[0-9]+]], $f14, $f12 +; 32-CMP-DAG: lwc1 $[[T1:f[0-9]+]], %lo($CPI32_0)( +; 32-CMP-DAG: cmp.le.s $[[T2:f[0-9]+]], $[[T0]], $[[T1]] +; 32-CMP-DAG: mfc1 $[[T3:[0-9]+]], $[[T2]] +; FIXME: This instruction is redundant. +; 32-CMP-DAG: andi $[[T4:[0-9]+]], $[[T3]], 1 +; 32-CMP-DAG: bnez $[[T4]], + +; 64-C-DAG: add.s $[[T0:f[0-9]+]], $f13, $f12 +; 64-C-DAG: lwc1 $[[T1:f[0-9]+]], %got_ofst($CPI32_0)( +; 64-C-DAG: c.ole.s $[[T0]], $[[T1]] +; 64-C-DAG: bc1t + +; 64-CMP-DAG: add.s $[[T0:f[0-9]+]], $f13, $f12 +; 64-CMP-DAG: lwc1 $[[T1:f[0-9]+]], %got_ofst($CPI32_0)( +; 64-CMP-DAG: cmp.le.s $[[T2:f[0-9]+]], $[[T0]], $[[T1]] +; 64-CMP-DAG: mfc1 $[[T3:[0-9]+]], $[[T2]] +; FIXME: This instruction is redundant. +; 64-CMP-DAG: andi $[[T4:[0-9]+]], $[[T3]], 1 +; 64-CMP-DAG: bnez $[[T4]], + + %add = fadd fast float %at, %angle + %cmp = fcmp ogt float %add, 1.000000e+00 + br i1 %cmp, label %if.then, label %if.end + +if.then: + %sub = fadd fast float %add, -1.000000e+00 + br label %if.end + +if.end: + %theta.0 = phi float [ %sub, %if.then ], [ %add, %entry ] + ret float %theta.0 +} + +; The optimizers sometimes produce setlt instead of setolt/setult. +define double @bug1_f64(double %angle, double %at) #0 { +entry: +; ALL-LABEL: bug1_f64: + +; 32-C-DAG: add.d $[[T0:f[0-9]+]], $f14, $f12 +; 32-C-DAG: ldc1 $[[T1:f[0-9]+]], %lo($CPI33_0)( +; 32-C-DAG: c.ole.d $[[T0]], $[[T1]] +; 32-C-DAG: bc1t + +; 32-CMP-DAG: add.d $[[T0:f[0-9]+]], $f14, $f12 +; 32-CMP-DAG: ldc1 $[[T1:f[0-9]+]], %lo($CPI33_0)( +; 32-CMP-DAG: cmp.le.d $[[T2:f[0-9]+]], $[[T0]], $[[T1]] +; 32-CMP-DAG: mfc1 $[[T3:[0-9]+]], $[[T2]] +; FIXME: This instruction is redundant. +; 32-CMP-DAG: andi $[[T4:[0-9]+]], $[[T3]], 1 +; 32-CMP-DAG: bnez $[[T4]], + +; 64-C-DAG: add.d $[[T0:f[0-9]+]], $f13, $f12 +; 64-C-DAG: ldc1 $[[T1:f[0-9]+]], %got_ofst($CPI33_0)( +; 64-C-DAG: c.ole.d $[[T0]], $[[T1]] +; 64-C-DAG: bc1t + +; 64-CMP-DAG: add.d $[[T0:f[0-9]+]], $f13, $f12 +; 64-CMP-DAG: ldc1 $[[T1:f[0-9]+]], %got_ofst($CPI33_0)( +; 64-CMP-DAG: cmp.le.d $[[T2:f[0-9]+]], $[[T0]], $[[T1]] +; 64-CMP-DAG: mfc1 $[[T3:[0-9]+]], $[[T2]] +; FIXME: This instruction is redundant. +; 64-CMP-DAG: andi $[[T4:[0-9]+]], $[[T3]], 1 +; 64-CMP-DAG: bnez $[[T4]], + + %add = fadd fast double %at, %angle + %cmp = fcmp ogt double %add, 1.000000e+00 + br i1 %cmp, label %if.then, label %if.end + +if.then: + %sub = fadd fast double %add, -1.000000e+00 + br label %if.end + +if.end: + %theta.0 = phi double [ %sub, %if.then ], [ %add, %entry ] + ret double %theta.0 +} + +attributes #0 = { nounwind readnone "no-nans-fp-math"="true" } diff --git a/test/CodeGen/R600/basic-loop.ll b/test/CodeGen/R600/basic-loop.ll index 72737ae273e6..9d0509b38d8a 100644 --- a/test/CodeGen/R600/basic-loop.ll +++ b/test/CodeGen/R600/basic-loop.ll @@ -1,4 +1,3 @@ -; XFAIL: * ; RUN: llc -O0 -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck %s ; CHECK-LABEL: {{^}}test_loop: diff --git a/test/CodeGen/R600/ctpop.ll b/test/CodeGen/R600/ctpop.ll index a47bc876cb96..c64f443ad697 100644 --- a/test/CodeGen/R600/ctpop.ll +++ b/test/CodeGen/R600/ctpop.ll @@ -24,8 +24,7 @@ define void @s_ctpop_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind { ; XXX - Why 0 in register? ; FUNC-LABEL: {{^}}v_ctpop_i32: ; SI: buffer_load_dword [[VAL:v[0-9]+]], -; SI: v_mov_b32_e32 [[VZERO:v[0-9]+]], 0 -; SI: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], [[VAL]], [[VZERO]] +; SI: v_bcnt_u32_b32_e64 [[RESULT:v[0-9]+]], [[VAL]], 0 ; SI: buffer_store_dword [[RESULT]], ; SI: s_endpgm @@ -40,8 +39,7 @@ define void @v_ctpop_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noali ; FUNC-LABEL: {{^}}v_ctpop_add_chain_i32: ; SI: buffer_load_dword [[VAL0:v[0-9]+]], ; SI: buffer_load_dword [[VAL1:v[0-9]+]], -; SI: v_mov_b32_e32 [[VZERO:v[0-9]+]], 0 -; SI: v_bcnt_u32_b32_e32 [[MIDRESULT:v[0-9]+]], [[VAL1]], [[VZERO]] +; SI: v_bcnt_u32_b32_e64 [[MIDRESULT:v[0-9]+]], [[VAL1]], 0 ; SI-NEXT: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], [[VAL0]], [[MIDRESULT]] ; SI: buffer_store_dword [[RESULT]], ; SI: s_endpgm @@ -73,8 +71,8 @@ define void @v_ctpop_add_sgpr_i32(i32 addrspace(1)* noalias %out, i32 addrspace( } ; FUNC-LABEL: {{^}}v_ctpop_v2i32: -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 ; SI: s_endpgm ; EG: BCNT_INT @@ -87,10 +85,10 @@ define void @v_ctpop_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrs } ; FUNC-LABEL: {{^}}v_ctpop_v4i32: -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 ; SI: s_endpgm ; EG: BCNT_INT @@ -105,14 +103,14 @@ define void @v_ctpop_v4i32(<4 x i32> addrspace(1)* noalias %out, <4 x i32> addrs } ; FUNC-LABEL: {{^}}v_ctpop_v8i32: -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 ; SI: s_endpgm ; EG: BCNT_INT @@ -131,22 +129,22 @@ define void @v_ctpop_v8i32(<8 x i32> addrspace(1)* noalias %out, <8 x i32> addrs } ; FUNC-LABEL: {{^}}v_ctpop_v16i32: -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 -; SI: v_bcnt_u32_b32_e32 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 +; SI: v_bcnt_u32_b32_e64 ; SI: s_endpgm ; EG: BCNT_INT diff --git a/test/CodeGen/R600/ctpop64.ll b/test/CodeGen/R600/ctpop64.ll index 8dfe571d3477..9758ac96ea9b 100644 --- a/test/CodeGen/R600/ctpop64.ll +++ b/test/CodeGen/R600/ctpop64.ll @@ -21,8 +21,7 @@ define void @s_ctpop_i64(i32 addrspace(1)* noalias %out, i64 %val) nounwind { ; FUNC-LABEL: {{^}}v_ctpop_i64: ; SI: buffer_load_dwordx2 v{{\[}}[[LOVAL:[0-9]+]]:[[HIVAL:[0-9]+]]{{\]}}, -; SI: v_mov_b32_e32 [[VZERO:v[0-9]+]], 0 -; SI: v_bcnt_u32_b32_e32 [[MIDRESULT:v[0-9]+]], v[[LOVAL]], [[VZERO]] +; SI: v_bcnt_u32_b32_e64 [[MIDRESULT:v[0-9]+]], v[[LOVAL]], 0 ; SI-NEXT: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], v[[HIVAL]], [[MIDRESULT]] ; SI: buffer_store_dword [[RESULT]], ; SI: s_endpgm diff --git a/test/CodeGen/R600/ds_read2st64.ll b/test/CodeGen/R600/ds_read2st64.ll index 24834af20404..efd875e93176 100644 --- a/test/CodeGen/R600/ds_read2st64.ll +++ b/test/CodeGen/R600/ds_read2st64.ll @@ -65,8 +65,8 @@ define void @simple_read2st64_f32_max_offset(float addrspace(1)* %out, float add ; SI-LABEL: @simple_read2st64_f32_over_max_offset ; SI-NOT: ds_read2st64_b32 -; SI: ds_read_b32 {{v[0-9]+}}, {{v[0-9]+}} offset:256 ; SI: v_add_i32_e32 [[BIGADD:v[0-9]+]], 0x10000, {{v[0-9]+}} +; SI: ds_read_b32 {{v[0-9]+}}, {{v[0-9]+}} offset:256 ; SI: ds_read_b32 {{v[0-9]+}}, [[BIGADD]] ; SI: s_endpgm define void @simple_read2st64_f32_over_max_offset(float addrspace(1)* %out, float addrspace(3)* %lds) #0 { @@ -197,8 +197,8 @@ define void @simple_read2st64_f64_max_offset(double addrspace(1)* %out, double a ; SI-LABEL: @simple_read2st64_f64_over_max_offset ; SI-NOT: ds_read2st64_b64 -; SI: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}} offset:512 ; SI: v_add_i32_e32 [[BIGADD:v[0-9]+]], 0x10000, {{v[0-9]+}} +; SI: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}} offset:512 ; SI: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, [[BIGADD]] ; SI: s_endpgm define void @simple_read2st64_f64_over_max_offset(double addrspace(1)* %out, double addrspace(3)* %lds) #0 { diff --git a/test/CodeGen/R600/fp_to_sint.ll b/test/CodeGen/R600/fp_to_sint.ll index 35cfb03d39b4..d76e8a341c6f 100644 --- a/test/CodeGen/R600/fp_to_sint.ll +++ b/test/CodeGen/R600/fp_to_sint.ll @@ -1,16 +1,27 @@ ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s --check-prefix=EG --check-prefix=FUNC ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s --check-prefix=SI --check-prefix=FUNC +declare float @llvm.fabs.f32(float) #0 + ; FUNC-LABEL: {{^}}fp_to_sint_i32: ; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}} ; SI: v_cvt_i32_f32_e32 ; SI: s_endpgm -define void @fp_to_sint_i32 (i32 addrspace(1)* %out, float %in) { +define void @fp_to_sint_i32(i32 addrspace(1)* %out, float %in) { %conv = fptosi float %in to i32 store i32 %conv, i32 addrspace(1)* %out ret void } +; FUNC-LABEL: {{^}}fp_to_sint_i32_fabs: +; SI: v_cvt_i32_f32_e64 v{{[0-9]+}}, |s{{[0-9]+}}|{{$}} +define void @fp_to_sint_i32_fabs(i32 addrspace(1)* %out, float %in) { + %in.fabs = call float @llvm.fabs.f32(float %in) #0 + %conv = fptosi float %in.fabs to i32 + store i32 %conv, i32 addrspace(1)* %out + ret void +} + ; FUNC-LABEL: {{^}}fp_to_sint_v2i32: ; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}} ; EG: FLT_TO_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}} @@ -214,3 +225,5 @@ define void @fp_to_sint_v4i64(<4 x i64> addrspace(1)* %out, <4 x float> %x) { store <4 x i64> %conv, <4 x i64> addrspace(1)* %out ret void } + +attributes #0 = { nounwind readnone } diff --git a/test/CodeGen/R600/hsa.ll b/test/CodeGen/R600/hsa.ll index 2e79866362ac..5ce3beaa16c0 100644 --- a/test/CodeGen/R600/hsa.ll +++ b/test/CodeGen/R600/hsa.ll @@ -1,6 +1,8 @@ ; RUN: llc < %s -mtriple=r600--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s ; HSA: {{^}}simple: +; HSA: .section .hsa.version +; HSA-NEXT: .ascii "HSA Code Unit:0.0:AMD:0.1:GFX8.1:0" ; Make sure we are setting the ATC bit: ; HSA: s_mov_b32 s[[HI:[0-9]]], 0x100f000 ; HSA: buffer_store_dword v{{[0-9]+}}, s[0:[[HI]]], 0 diff --git a/test/CodeGen/R600/misaligned-load.ll b/test/CodeGen/R600/misaligned-load.ll new file mode 100644 index 000000000000..6290ca09d502 --- /dev/null +++ b/test/CodeGen/R600/misaligned-load.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s + +; SI: @byte_aligned_load64 +; SI: ds_read_u8 +; SI: ds_read_u8 +; SI: ds_read_u8 +; SI: ds_read_u8 +; SI: ds_read_u8 +; SI: ds_read_u8 +; SI: ds_read_u8 +; SI: ds_read_u8 +; SI: s_endpgm +define void @byte_aligned_load64(i64 addrspace(1)* %out, i64 addrspace(3)* %in) { +entry: + %0 = load i64 addrspace(3)* %in, align 1 + store i64 %0, i64 addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/scratch-buffer.ll b/test/CodeGen/R600/scratch-buffer.ll new file mode 100644 index 000000000000..740328a495da --- /dev/null +++ b/test/CodeGen/R600/scratch-buffer.ll @@ -0,0 +1,86 @@ +; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck %s + +; When a frame index offset is more than 12-bits, make sure we don't store +; it in mubuf's offset field. + +; Also, make sure we use the same register for storing the scratch buffer addresss +; for both stores. This register is allocated by the register scavenger, so we +; should be able to reuse the same regiser for each scratch buffer access. + +; CHECK-LABEL: {{^}}legal_offset_fi: +; CHECK: v_mov_b32_e32 [[OFFSET:v[0-9]+]], 0{{$}} +; CHECK: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen +; CHECK: v_mov_b32_e32 [[OFFSET]], 0x8000 +; CHECK: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen{{$}} + +define void @legal_offset_fi(i32 addrspace(1)* %out, i32 %cond, i32 %if_offset, i32 %else_offset) { +entry: + %scratch0 = alloca [8192 x i32] + %scratch1 = alloca [8192 x i32] + + %scratchptr0 = getelementptr [8192 x i32]* %scratch0, i32 0, i32 0 + store i32 1, i32* %scratchptr0 + + %scratchptr1 = getelementptr [8192 x i32]* %scratch1, i32 0, i32 0 + store i32 2, i32* %scratchptr1 + + %cmp = icmp eq i32 %cond, 0 + br i1 %cmp, label %if, label %else + +if: + %if_ptr = getelementptr [8192 x i32]* %scratch0, i32 0, i32 %if_offset + %if_value = load i32* %if_ptr + br label %done + +else: + %else_ptr = getelementptr [8192 x i32]* %scratch1, i32 0, i32 %else_offset + %else_value = load i32* %else_ptr + br label %done + +done: + %value = phi i32 [%if_value, %if], [%else_value, %else] + store i32 %value, i32 addrspace(1)* %out + ret void + + ret void + +} + +; CHECK-LABEL: {{^}}legal_offset_fi_offset +; CHECK: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen +; CHECK: v_add_i32_e32 [[OFFSET:v[0-9]+]], 0x8000 +; CHECK: buffer_store_dword v{{[0-9]+}}, [[OFFSET]], s[{{[0-9]+}}:{{[0-9]+}}], s{{[0-9]+}} offen{{$}} + +define void @legal_offset_fi_offset(i32 addrspace(1)* %out, i32 %cond, i32 addrspace(1)* %offsets, i32 %if_offset, i32 %else_offset) { +entry: + %scratch0 = alloca [8192 x i32] + %scratch1 = alloca [8192 x i32] + + %offset0 = load i32 addrspace(1)* %offsets + %scratchptr0 = getelementptr [8192 x i32]* %scratch0, i32 0, i32 %offset0 + store i32 %offset0, i32* %scratchptr0 + + %offsetptr1 = getelementptr i32 addrspace(1)* %offsets, i32 1 + %offset1 = load i32 addrspace(1)* %offsetptr1 + %scratchptr1 = getelementptr [8192 x i32]* %scratch1, i32 0, i32 %offset1 + store i32 %offset1, i32* %scratchptr1 + + %cmp = icmp eq i32 %cond, 0 + br i1 %cmp, label %if, label %else + +if: + %if_ptr = getelementptr [8192 x i32]* %scratch0, i32 0, i32 %if_offset + %if_value = load i32* %if_ptr + br label %done + +else: + %else_ptr = getelementptr [8192 x i32]* %scratch1, i32 0, i32 %else_offset + %else_value = load i32* %else_ptr + br label %done + +done: + %value = phi i32 [%if_value, %if], [%else_value, %else] + store i32 %value, i32 addrspace(1)* %out + ret void +} + diff --git a/test/CodeGen/R600/si-triv-disjoint-mem-access.ll b/test/CodeGen/R600/si-triv-disjoint-mem-access.ll index b2f4a9ff05e1..f6dcb388248a 100644 --- a/test/CodeGen/R600/si-triv-disjoint-mem-access.ll +++ b/test/CodeGen/R600/si-triv-disjoint-mem-access.ll @@ -51,8 +51,8 @@ define void @no_reorder_local_load_volatile_global_store_local_load(i32 addrspac ; FUNC-LABEL: @no_reorder_barrier_local_load_global_store_local_load ; CI: ds_read_b32 {{v[0-9]+}}, {{v[0-9]+}} offset:4 -; CI: buffer_store_dword ; CI: ds_read_b32 {{v[0-9]+}}, {{v[0-9]+}} offset:8 +; CI: buffer_store_dword define void @no_reorder_barrier_local_load_global_store_local_load(i32 addrspace(1)* %out, i32 addrspace(1)* %gptr) #0 { %ptr0 = load i32 addrspace(3)* addrspace(3)* @stored_lds_ptr, align 4 diff --git a/test/CodeGen/SPARC/2008-10-10-InlineAsmMemoryOperand.ll b/test/CodeGen/SPARC/2008-10-10-InlineAsmMemoryOperand.ll index 373a1967307a..e8315f17ebb6 100644 --- a/test/CodeGen/SPARC/2008-10-10-InlineAsmMemoryOperand.ll +++ b/test/CodeGen/SPARC/2008-10-10-InlineAsmMemoryOperand.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=sparc -no-integrated-as +; RUN: llc < %s -march=sparc ; PR 1557 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128" diff --git a/test/CodeGen/SPARC/inlineasm.ll b/test/CodeGen/SPARC/inlineasm.ll index 526cde8de8b4..2650533b7fec 100644 --- a/test/CodeGen/SPARC/inlineasm.ll +++ b/test/CodeGen/SPARC/inlineasm.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=sparc -no-integrated-as <%s | FileCheck %s +; RUN: llc -march=sparc <%s | FileCheck %s ; CHECK-LABEL: test_constraint_r ; CHECK: add %o1, %o0, %o0 diff --git a/test/CodeGen/SPARC/mult-alt-generic-sparc.ll b/test/CodeGen/SPARC/mult-alt-generic-sparc.ll index 6a67616d53be..6013b17d9372 100644 --- a/test/CodeGen/SPARC/mult-alt-generic-sparc.ll +++ b/test/CodeGen/SPARC/mult-alt-generic-sparc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=sparc -no-integrated-as +; RUN: llc < %s -march=sparc ; ModuleID = 'mult-alt-generic.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32" target triple = "sparc" diff --git a/test/DebugInfo/Mips/fn-call-line.ll b/test/DebugInfo/Mips/fn-call-line.ll new file mode 100644 index 000000000000..14cd8c9d987f --- /dev/null +++ b/test/DebugInfo/Mips/fn-call-line.ll @@ -0,0 +1,84 @@ +; RUN: llc -mtriple=mips-linux-gnu -filetype=asm -asm-verbose=0 -O0 < %s | FileCheck %s +; RUN: llc -mtriple=mips-linux-gnu -filetype=obj -O0 < %s | llvm-dwarfdump -debug-dump=line - | FileCheck %s --check-prefix=INT + +; Mips used to generate 'jumpy' debug line info around calls. The address +; calculation for each call to f1() would share the same line info so it would +; emit output of the form: +; .loc $first_call_location +; .. address calculation .. +; .. function call .. +; .. address calculation .. +; .loc $second_call_location +; .. function call .. +; .loc $first_call_location +; .. address calculation .. +; .loc $third_call_location +; .. function call .. +; ... +; which would cause confusing stepping behaviour for the end user. +; +; This test checks that we emit more user friendly debug line info of the form: +; .loc $first_call_location +; .. address calculation .. +; .. function call .. +; .loc $second_call_location +; .. address calculation .. +; .. function call .. +; .loc $third_call_location +; .. address calculation .. +; .. function call .. +; ... +; +; Generated with clang from fn-call-line.c: +; void f1(); +; void f2() { +; f1(); +; f1(); +; } + +; CHECK: .loc 1 3 3 +; CHECK-NOT: .loc +; CHECK: %call16(f1) +; CHECK-NOT: .loc +; CHECK: .loc 1 4 3 +; CHECK-NOT: .loc +; CHECK: %call16(f1) + +; INT: {{^}}Address +; INT: ----- +; INT-NEXT: 2 0 1 0 0 is_stmt{{$}} +; INT-NEXT: 3 3 1 0 0 is_stmt prologue_end{{$}} +; INT-NEXT: 4 3 1 0 0 is_stmt{{$}} + + +; Function Attrs: nounwind uwtable +define void @f2() #0 { +entry: + call void (...)* @f1(), !dbg !11 + call void (...)* @f1(), !dbg !12 + ret void, !dbg !13 +} + +declare void @f1(...) #1 + +attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } + +!llvm.dbg.cu = !{!0} +!llvm.module.flags = !{!8, !9} +!llvm.ident = !{!10} + +!0 = !{!"0x11\0012\00clang version 3.7.0 (trunk 226641)\000\00\000\00\001", !1, !2, !2, !3, !2, !2} ; [ DW_TAG_compile_unit ] [/tmp/dbginfo/fn-call-line.c] [DW_LANG_C99] +!1 = !{!"fn-call-line.c", !"/tmp/dbginfo"} +!2 = !{} +!3 = !{!4} +!4 = !{!"0x2e\00f2\00f2\00\002\000\001\000\000\000\000\002", !1, !5, !6, null, void ()* @f2, null, null, !2} ; [ DW_TAG_subprogram ] [line 2] [def] [f2] +!5 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [/tmp/dbginfo/fn-call-line.c] +!6 = !{!"0x15\00\000\000\000\000\000\000", null, null, null, !7, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!7 = !{null} +!8 = !{i32 2, !"Dwarf Version", i32 4} +!9 = !{i32 2, !"Debug Info Version", i32 2} +!10 = !{!"clang version 3.7.0 (trunk 226641)"} +!11 = !MDLocation(line: 3, column: 3, scope: !4) +!12 = !MDLocation(line: 4, column: 3, scope: !4) +!13 = !MDLocation(line: 5, column: 1, scope: !4) diff --git a/test/DebugInfo/X86/decl-derived-member.ll b/test/DebugInfo/X86/decl-derived-member.ll index 8c15c53e8141..c4f3dd90ffd5 100644 --- a/test/DebugInfo/X86/decl-derived-member.ll +++ b/test/DebugInfo/X86/decl-derived-member.ll @@ -7,8 +7,9 @@ ; struct base { ; virtual ~base(); ; }; +; typedef base base_type; ; struct foo { -; base b; +; base_type b; ; }; ; foo f; @@ -20,40 +21,47 @@ %struct.foo = type { %struct.base } %struct.base = type { i32 (...)** } + +$_ZN3fooC2Ev = comdat any + +$_ZN3fooD2Ev = comdat any + +$_ZN4baseC2Ev = comdat any + @f = global %struct.foo zeroinitializer, align 8 @__dso_handle = external global i8 @_ZTV4base = external unnamed_addr constant [4 x i8*] -@llvm.global_ctors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @_GLOBAL__I_a }] +@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I_decl_derived_member.cpp, i8* null }] define internal void @__cxx_global_var_init() section ".text.startup" { entry: - call void @_ZN3fooC2Ev(%struct.foo* @f) #2, !dbg !35 - %0 = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.foo*)* @_ZN3fooD2Ev to void (i8*)*), i8* bitcast (%struct.foo* @f to i8*), i8* @__dso_handle) #2, !dbg !35 - ret void, !dbg !35 + call void @_ZN3fooC2Ev(%struct.foo* @f) #2, !dbg !33 + %0 = call i32 @__cxa_atexit(void (i8*)* bitcast (void (%struct.foo*)* @_ZN3fooD2Ev to void (i8*)*), i8* bitcast (%struct.foo* @f to i8*), i8* @__dso_handle) #2, !dbg !33 + ret void, !dbg !33 } ; Function Attrs: inlinehint nounwind uwtable -define linkonce_odr void @_ZN3fooC2Ev(%struct.foo* %this) unnamed_addr #0 align 2 { +define linkonce_odr void @_ZN3fooC2Ev(%struct.foo* %this) unnamed_addr #0 comdat align 2 { entry: %this.addr = alloca %struct.foo*, align 8 store %struct.foo* %this, %struct.foo** %this.addr, align 8 - call void @llvm.dbg.declare(metadata %struct.foo** %this.addr, metadata !36, metadata !{!"0x102"}), !dbg !38 + call void @llvm.dbg.declare(metadata %struct.foo** %this.addr, metadata !34, metadata !36), !dbg !37 %this1 = load %struct.foo** %this.addr - %b = getelementptr inbounds %struct.foo* %this1, i32 0, i32 0, !dbg !39 - call void @_ZN4baseC2Ev(%struct.base* %b) #2, !dbg !39 - ret void, !dbg !39 + %b = getelementptr inbounds %struct.foo* %this1, i32 0, i32 0, !dbg !38 + call void @_ZN4baseC2Ev(%struct.base* %b) #2, !dbg !38 + ret void, !dbg !38 } ; Function Attrs: inlinehint uwtable -define linkonce_odr void @_ZN3fooD2Ev(%struct.foo* %this) unnamed_addr #1 align 2 { +define linkonce_odr void @_ZN3fooD2Ev(%struct.foo* %this) unnamed_addr #1 comdat align 2 { entry: %this.addr = alloca %struct.foo*, align 8 store %struct.foo* %this, %struct.foo** %this.addr, align 8 - call void @llvm.dbg.declare(metadata %struct.foo** %this.addr, metadata !40, metadata !{!"0x102"}), !dbg !41 + call void @llvm.dbg.declare(metadata %struct.foo** %this.addr, metadata !39, metadata !36), !dbg !40 %this1 = load %struct.foo** %this.addr - %b = getelementptr inbounds %struct.foo* %this1, i32 0, i32 0, !dbg !42 - call void @_ZN4baseD1Ev(%struct.base* %b), !dbg !42 - ret void, !dbg !44 + %b = getelementptr inbounds %struct.foo* %this1, i32 0, i32 0, !dbg !41 + call void @_ZN4baseD1Ev(%struct.base* %b), !dbg !41 + ret void, !dbg !43 } ; Function Attrs: nounwind @@ -62,24 +70,24 @@ declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) #2 ; Function Attrs: nounwind readnone declare void @llvm.dbg.declare(metadata, metadata, metadata) #3 -declare void @_ZN4baseD1Ev(%struct.base*) #4 - ; Function Attrs: inlinehint nounwind uwtable -define linkonce_odr void @_ZN4baseC2Ev(%struct.base* %this) unnamed_addr #0 align 2 { +define linkonce_odr void @_ZN4baseC2Ev(%struct.base* %this) unnamed_addr #0 comdat align 2 { entry: %this.addr = alloca %struct.base*, align 8 store %struct.base* %this, %struct.base** %this.addr, align 8 - call void @llvm.dbg.declare(metadata %struct.base** %this.addr, metadata !45, metadata !{!"0x102"}), !dbg !47 + call void @llvm.dbg.declare(metadata %struct.base** %this.addr, metadata !44, metadata !36), !dbg !46 %this1 = load %struct.base** %this.addr - %0 = bitcast %struct.base* %this1 to i8***, !dbg !48 - store i8** getelementptr inbounds ([4 x i8*]* @_ZTV4base, i64 0, i64 2), i8*** %0, !dbg !48 - ret void, !dbg !48 + %0 = bitcast %struct.base* %this1 to i32 (...)***, !dbg !47 + store i32 (...)** bitcast (i8** getelementptr inbounds ([4 x i8*]* @_ZTV4base, i64 0, i64 2) to i32 (...)**), i32 (...)*** %0, !dbg !47 + ret void, !dbg !47 } -define internal void @_GLOBAL__I_a() section ".text.startup" { +declare void @_ZN4baseD1Ev(%struct.base*) #4 + +define internal void @_GLOBAL__sub_I_decl_derived_member.cpp() section ".text.startup" { entry: - call void @__cxx_global_var_init(), !dbg !49 - ret void, !dbg !49 + call void @__cxx_global_var_init(), !dbg !48 + ret void } attributes #0 = { inlinehint nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } @@ -89,56 +97,55 @@ attributes #3 = { nounwind readnone } attributes #4 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } !llvm.dbg.cu = !{!0} -!llvm.module.flags = !{!32, !33} -!llvm.ident = !{!34} +!llvm.module.flags = !{!30, !31} +!llvm.ident = !{!32} -!0 = !{!"0x11\004\00clang version 3.5.0 (trunk 203673) (llvm/trunk 203681)\000\00\000\00\001", !1, !2, !3, !8, !30, !2} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/echristo/foo.cc] [DW_LANG_C_plus_plus] -!1 = !{!"foo.cc", !"/usr/local/google/home/echristo"} +!0 = !{!"0x11\004\00clang version 3.7.0 (trunk 227104) (llvm/trunk 227103)\000\00\000\00\001", !1, !2, !3, !9, !28, !2} ; [ DW_TAG_compile_unit ] [/tmp/dbginfo/decl-derived-member.cpp] [DW_LANG_C_plus_plus] +!1 = !{!"decl-derived-member.cpp", !"/tmp/dbginfo"} !2 = !{} -!3 = !{!4, !7} +!3 = !{!4, !8} !4 = !{!"0x13\00foo\005\0064\0064\000\000\000", !1, null, null, !5, null, null, !"_ZTS3foo"} ; [ DW_TAG_structure_type ] [foo] [line 5, size 64, align 64, offset 0] [def] [from ] !5 = !{!6} -!6 = !{!"0xd\00b\006\0064\0064\000\000", !1, !"_ZTS3foo", !"_ZTS4base"} ; [ DW_TAG_member ] [b] [line 6, size 64, align 64, offset 0] [from _ZTS4base] -!7 = !{!"0x13\00base\001\000\000\000\004\000", !1, null, null, null, null, null, !"_ZTS4base"} ; [ DW_TAG_structure_type ] [base] [line 1, size 0, align 0, offset 0] [decl] [from ] -!8 = !{!9, !13, !19, !22, !28} -!9 = !{!"0x2e\00__cxx_global_var_init\00__cxx_global_var_init\00\009\001\001\000\006\00256\000\009", !1, !10, !11, null, void ()* @__cxx_global_var_init, null, null, !2} ; [ DW_TAG_subprogram ] [line 9] [local] [def] [__cxx_global_var_init] -!10 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [/usr/local/google/home/echristo/foo.cc] -!11 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !12, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] -!12 = !{null} -!13 = !{!"0x2e\00~foo\00~foo\00_ZN3fooD2Ev\005\000\001\000\006\00320\000\005", !1, !"_ZTS3foo", !14, null, void (%struct.foo*)* @_ZN3fooD2Ev, null, !17, !2} ; [ DW_TAG_subprogram ] [line 5] [def] [~foo] -!14 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !15, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] -!15 = !{null, !16} -!16 = !{!"0xf\00\000\0064\0064\000\001088", null, null, !"_ZTS3foo"} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [artificial] [from _ZTS3foo] -!17 = !{!"0x2e\00~foo\00~foo\00\000\000\000\000\006\00320\000\000", null, !"_ZTS3foo", !14, null, null, null, i32 0, !18} ; [ DW_TAG_subprogram ] [line 0] [~foo] -!18 = !{i32 786468} -!19 = !{!"0x2e\00foo\00foo\00_ZN3fooC2Ev\005\000\001\000\006\00320\000\005", !1, !"_ZTS3foo", !14, null, void (%struct.foo*)* @_ZN3fooC2Ev, null, !20, !2} ; [ DW_TAG_subprogram ] [line 5] [def] [foo] -!20 = !{!"0x2e\00foo\00foo\00\000\000\000\000\006\00320\000\000", null, !"_ZTS3foo", !14, null, null, null, i32 0, !21} ; [ DW_TAG_subprogram ] [line 0] [foo] -!21 = !{i32 786468} -!22 = !{!"0x2e\00base\00base\00_ZN4baseC2Ev\001\000\001\000\006\00320\000\001", !1, !"_ZTS4base", !23, null, void (%struct.base*)* @_ZN4baseC2Ev, null, !26, !2} ; [ DW_TAG_subprogram ] [line 1] [def] [base] -!23 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !24, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] -!24 = !{null, !25} -!25 = !{!"0xf\00\000\0064\0064\000\001088", null, null, !"_ZTS4base"} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [artificial] [from _ZTS4base] -!26 = !{!"0x2e\00base\00base\00\000\000\000\000\006\00320\000\000", null, !"_ZTS4base", !23, null, null, null, i32 0, !27} ; [ DW_TAG_subprogram ] [line 0] [base] -!27 = !{i32 786468} -!28 = !{!"0x2e\00\00\00_GLOBAL__I_a\001\001\001\000\006\0064\000\001", !1, !10, !29, null, void ()* @_GLOBAL__I_a, null, null, !2} ; [ DW_TAG_subprogram ] [line 1] [local] [def] -!29 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !2, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] -!30 = !{!31} -!31 = !{!"0x34\00f\00f\00\009\000\001", null, !10, !4, %struct.foo* @f, null} ; [ DW_TAG_variable ] [f] [line 9] [def] -!32 = !{i32 2, !"Dwarf Version", i32 4} -!33 = !{i32 1, !"Debug Info Version", i32 2} -!34 = !{!"clang version 3.5.0 (trunk 203673) (llvm/trunk 203681)"} -!35 = !MDLocation(line: 9, scope: !9) -!36 = !{!"0x101\00this\0016777216\001088", !19, null, !37} ; [ DW_TAG_arg_variable ] [this] [line 0] -!37 = !{!"0xf\00\000\0064\0064\000\000", null, null, !"_ZTS3foo"} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from _ZTS3foo] -!38 = !MDLocation(line: 0, scope: !19) -!39 = !MDLocation(line: 5, scope: !19) -!40 = !{!"0x101\00this\0016777216\001088", !13, null, !37} ; [ DW_TAG_arg_variable ] [this] [line 0] -!41 = !MDLocation(line: 0, scope: !13) -!42 = !MDLocation(line: 5, scope: !43) -!43 = !{!"0xb\005\000\000", !1, !13} ; [ DW_TAG_lexical_block ] [/usr/local/google/home/echristo/foo.cc] -!44 = !MDLocation(line: 5, scope: !13) -!45 = !{!"0x101\00this\0016777216\001088", !22, null, !46} ; [ DW_TAG_arg_variable ] [this] [line 0] -!46 = !{!"0xf\00\000\0064\0064\000\000", null, null, !"_ZTS4base"} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from _ZTS4base] -!47 = !MDLocation(line: 0, scope: !22) -!48 = !MDLocation(line: 1, scope: !22) -!49 = !MDLocation(line: 1, scope: !28) +!6 = !{!"0xd\00b\006\0064\0064\000\000", !1, !"_ZTS3foo", !7} ; [ DW_TAG_member ] [b] [line 6, size 64, align 64, offset 0] [from base_type] +!7 = !{!"0x16\00base_type\004\000\000\000\000", !1, null, !"_ZTS4base"} ; [ DW_TAG_typedef ] [base_type] [line 4, size 0, align 0, offset 0] [from _ZTS4base] +!8 = !{!"0x13\00base\001\000\000\000\004\000", !1, null, null, null, null, null, !"_ZTS4base"} ; [ DW_TAG_structure_type ] [base] [line 1, size 0, align 0, offset 0] [decl] [from ] +!9 = !{!10, !14, !19, !24, !26} +!10 = !{!"0x2e\00__cxx_global_var_init\00__cxx_global_var_init\00\008\001\001\000\000\00256\000\008", !1, !11, !12, null, void ()* @__cxx_global_var_init, null, null, !2} ; [ DW_TAG_subprogram ] [line 8] [local] [def] [__cxx_global_var_init] +!11 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [/tmp/dbginfo/decl-derived-member.cpp] +!12 = !{!"0x15\00\000\000\000\000\000\000", null, null, null, !13, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!13 = !{null} +!14 = !{!"0x2e\00foo\00foo\00_ZN3fooC2Ev\005\000\001\000\000\00320\000\005", !1, !"_ZTS3foo", !15, null, void (%struct.foo*)* @_ZN3fooC2Ev, null, !18, !2} ; [ DW_TAG_subprogram ] [line 5] [def] [foo] +!15 = !{!"0x15\00\000\000\000\000\000\000", null, null, null, !16, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!16 = !{null, !17} +!17 = !{!"0xf\00\000\0064\0064\000\001088\00", null, null, !"_ZTS3foo"} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [artificial] [from _ZTS3foo] +!18 = !{!"0x2e\00foo\00foo\00\000\000\000\000\000\00320\000\000", null, !"_ZTS3foo", !15, null, null, null, null, null} ; [ DW_TAG_subprogram ] [line 0] [foo] +!19 = !{!"0x2e\00base\00base\00_ZN4baseC2Ev\001\000\001\000\000\00320\000\001", !1, !"_ZTS4base", !20, null, void (%struct.base*)* @_ZN4baseC2Ev, null, !23, !2} ; [ DW_TAG_subprogram ] [line 1] [def] [base] +!20 = !{!"0x15\00\000\000\000\000\000\000", null, null, null, !21, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!21 = !{null, !22} +!22 = !{!"0xf\00\000\0064\0064\000\001088\00", null, null, !"_ZTS4base"} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [artificial] [from _ZTS4base] +!23 = !{!"0x2e\00base\00base\00\000\000\000\000\000\00320\000\000", null, !"_ZTS4base", !20, null, null, null, null, null} ; [ DW_TAG_subprogram ] [line 0] [base] +!24 = !{!"0x2e\00~foo\00~foo\00_ZN3fooD2Ev\005\000\001\000\000\00320\000\005", !1, !"_ZTS3foo", !15, null, void (%struct.foo*)* @_ZN3fooD2Ev, null, !25, !2} ; [ DW_TAG_subprogram ] [line 5] [def] [~foo] +!25 = !{!"0x2e\00~foo\00~foo\00\000\000\000\000\000\00320\000\000", null, !"_ZTS3foo", !15, null, null, null, null, null} ; [ DW_TAG_subprogram ] [line 0] [~foo] +!26 = !{!"0x2e\00\00\00_GLOBAL__sub_I_decl_derived_member.cpp\000\001\001\000\000\0064\000\000", !1, !11, !27, null, void ()* @_GLOBAL__sub_I_decl_derived_member.cpp, null, null, !2} ; [ DW_TAG_subprogram ] [line 0] [local] [def] +!27 = !{!"0x15\00\000\000\000\000\000\000", null, null, null, !2, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!28 = !{!29} +!29 = !{!"0x34\00f\00f\00\008\000\001", null, !11, !"_ZTS3foo", %struct.foo* @f, null} ; [ DW_TAG_variable ] [f] [line 8] [def] +!30 = !{i32 2, !"Dwarf Version", i32 4} +!31 = !{i32 2, !"Debug Info Version", i32 2} +!32 = !{!"clang version 3.7.0 (trunk 227104) (llvm/trunk 227103)"} +!33 = !MDLocation(line: 8, column: 5, scope: !10) +!34 = !{!"0x101\00this\0016777216\001088", !14, null, !35} ; [ DW_TAG_arg_variable ] [this] [line 0] +!35 = !{!"0xf\00\000\0064\0064\000\000", null, null, !"_ZTS3foo"} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from _ZTS3foo] +!36 = !{!"0x102"} ; [ DW_TAG_expression ] +!37 = !MDLocation(line: 0, scope: !14) +!38 = !MDLocation(line: 5, column: 8, scope: !14) +!39 = !{!"0x101\00this\0016777216\001088", !24, null, !35} ; [ DW_TAG_arg_variable ] [this] [line 0] +!40 = !MDLocation(line: 0, scope: !24) +!41 = !MDLocation(line: 5, column: 8, scope: !42) +!42 = !{!"0xb\005\008\002", !1, !24} ; [ DW_TAG_lexical_block ] [/tmp/dbginfo/decl-derived-member.cpp] +!43 = !MDLocation(line: 5, column: 8, scope: !24) +!44 = !{!"0x101\00this\0016777216\001088", !19, null, !45} ; [ DW_TAG_arg_variable ] [this] [line 0] +!45 = !{!"0xf\00\000\0064\0064\000\000", null, null, !"_ZTS4base"} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from _ZTS4base] +!46 = !MDLocation(line: 0, scope: !19) +!47 = !MDLocation(line: 1, column: 8, scope: !19) +!48 = !MDLocation(line: 0, scope: !26) diff --git a/test/MC/ARM/pr22395.s b/test/MC/ARM/pr22395.s new file mode 100644 index 000000000000..5da5d964298c --- /dev/null +++ b/test/MC/ARM/pr22395.s @@ -0,0 +1,63 @@ +@ RUN: llvm-mc -triple armv4t-eabi -filetype asm -o - %s 2>&1 | FileCheck %s + + .text + .thumb + + .p2align 2 + + .fpu neon + vldmia r0, {d16-d31} + +@ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31} +@ CHECK-NOT: error: instruction requires: VFP2 + + .fpu vfpv3 + vadd.f32 s1, s2, s3 +@ CHECK: vadd.f32 s1, s2, s3 +@ CHECK-NOT: error: instruction requires: VPF2 + + .fpu vfpv3-d16 + vadd.f32 s1, s2, s3 +@ CHECK: vadd.f32 s1, s2, s3 +@ CHECK-NOT: error: instruction requires: VPF2 + + .fpu vfpv4 + vadd.f32 s1, s2, s3 +@ CHECK: vadd.f32 s1, s2, s3 +@ CHECK-NOT: error: instruction requires: VPF2 + + .fpu vfpv4-d16 + vadd.f32 s1, s2, s3 +@ CHECK: vadd.f32 s1, s2, s3 +@ CHECK-NOT: error: instruction requires: VPF2 + + .fpu fpv5-d16 + vadd.f32 s1, s2, s3 +@ CHECK: vadd.f32 s1, s2, s3 +@ CHECK-NOT: error: instruction requires: VPF2 + + .fpu fp-armv8 + vadd.f32 s1, s2, s3 +@ CHECK: vadd.f32 s1, s2, s3 +@ CHECK-NOT: error: instruction requires: VPF2 + + .fpu fp-armv8 + vadd.f32 s1, s2, s3 +@ CHECK: vadd.f32 s1, s2, s3 +@ CHECK-NOT: error: instruction requires: VPF2 + + .fpu neon + vadd.f32 s1, s2, s3 +@ CHECK: vadd.f32 s1, s2, s3 +@ CHECK-NOT: error: instruction requires: VPF2 + + .fpu neon-vfpv4 + vadd.f32 s1, s2, s3 +@ CHECK: vadd.f32 s1, s2, s3 +@ CHECK-NOT: error: instruction requires: VPF2 + + .fpu crypto-neon-fp-armv8 + vadd.f32 s1, s2, s3 +@ CHECK: vadd.f32 s1, s2, s3 +@ CHECK-NOT: error: instruction requires: VPF2 + diff --git a/test/MC/ELF/relocation-386.s b/test/MC/ELF/relocation-386.s index ba12df0d3b63..83c524b9d07b 100644 --- a/test/MC/ELF/relocation-386.s +++ b/test/MC/ELF/relocation-386.s @@ -63,6 +63,8 @@ // Relocation 28 (und_symbol-bar2) is of type R_386_PC8 // CHECK-NEXT: 0xA0 R_386_PC8 und_symbol 0x0 // CHECK-NEXT: 0xA3 R_386_GOTOFF und_symbol 0x0 +// Relocation 29 (zed@PLT) is of type R_386_PLT32 and uses the symbol +// CHECK-NEXT: 0xA9 R_386_PLT32 zed 0x0 // CHECK-NEXT: } // CHECK-NEXT: ] @@ -129,6 +131,7 @@ bar2: .byte und_symbol-bar2 leal 1 + und_symbol@GOTOFF, %edi + movl zed@PLT(%eax), %eax .section zedsec,"awT",@progbits zed: diff --git a/test/MC/MachO/AArch64/mergeable.s b/test/MC/MachO/AArch64/mergeable.s deleted file mode 100644 index fc6ec04f37bf..000000000000 --- a/test/MC/MachO/AArch64/mergeable.s +++ /dev/null @@ -1,59 +0,0 @@ -// RUN: llvm-mc -triple aarch64-apple-darwin14 %s -filetype=obj -o - | llvm-readobj -r --expand-relocs | FileCheck %s - -// Test that we "S + K" produce a relocation with a symbol, but just S produces -// a relocation with the section. - - .section __TEXT,__literal4,4byte_literals -L0: - .long 42 - - .section __TEXT,__cstring,cstring_literals -L1: - .asciz "42" - - .section __DATA,__data - .quad L0 - .quad L0 + 1 - .quad L1 - .quad L1 + 1 - -// CHECK: Relocations [ -// CHECK-NEXT: Section __data { -// CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x18 -// CHECK-NEXT: PCRel: 0 -// CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 -// CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: L1 -// CHECK-NEXT: Scattered: 0 -// CHECK-NEXT: } -// CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x10 -// CHECK-NEXT: PCRel: 0 -// CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 -// CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: L1 -// CHECK-NEXT: Scattered: 0 -// CHECK-NEXT: } -// CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x8 -// CHECK-NEXT: PCRel: 0 -// CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 -// CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: L0 -// CHECK-NEXT: Scattered: 0 -// CHECK-NEXT: } -// CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x0 -// CHECK-NEXT: PCRel: 0 -// CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 0 -// CHECK-NEXT: Type: ARM64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: 0x2 -// CHECK-NEXT: Scattered: 0 -// CHECK-NEXT: } -// CHECK-NEXT: } -// CHECK-NEXT: ] diff --git a/test/MC/MachO/x86_64-mergeable.s b/test/MC/MachO/x86_64-mergeable.s deleted file mode 100644 index 972477693ed2..000000000000 --- a/test/MC/MachO/x86_64-mergeable.s +++ /dev/null @@ -1,59 +0,0 @@ -// RUN: llvm-mc -triple x86_64-apple-darwin14 %s -filetype=obj -o - | llvm-readobj -r --expand-relocs | FileCheck %s - -// Test that we "S + K" produce a relocation with a symbol, but just S produces -// a relocation with the section. - - .section __TEXT,__literal4,4byte_literals -L0: - .long 42 - - .section __TEXT,__cstring,cstring_literals -L1: - .asciz "42" - - .section __DATA,__data - .quad L0 - .quad L0 + 1 - .quad L1 - .quad L1 + 1 - -// CHECK: Relocations [ -// CHECK-NEXT: Section __data { -// CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x18 -// CHECK-NEXT: PCRel: 0 -// CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 -// CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: L1 -// CHECK-NEXT: Scattered: 0 -// CHECK-NEXT: } -// CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x10 -// CHECK-NEXT: PCRel: 0 -// CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 0 -// CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: 0x3 -// CHECK-NEXT: Scattered: 0 -// CHECK-NEXT: } -// CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x8 -// CHECK-NEXT: PCRel: 0 -// CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 1 -// CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: L0 -// CHECK-NEXT: Scattered: 0 -// CHECK-NEXT: } -// CHECK-NEXT: Relocation { -// CHECK-NEXT: Offset: 0x0 -// CHECK-NEXT: PCRel: 0 -// CHECK-NEXT: Length: 3 -// CHECK-NEXT: Extern: 0 -// CHECK-NEXT: Type: X86_64_RELOC_UNSIGNED (0) -// CHECK-NEXT: Symbol: 0x2 -// CHECK-NEXT: Scattered: 0 -// CHECK-NEXT: } -// CHECK-NEXT: } -// CHECK-NEXT: ] diff --git a/test/MC/MachO/x86_64-symbols.s b/test/MC/MachO/x86_64-symbols.s index f40183df853c..e2dcc440fb5f 100644 --- a/test/MC/MachO/x86_64-symbols.s +++ b/test/MC/MachO/x86_64-symbols.s @@ -121,12 +121,6 @@ D38: //L39: //D39: - .section foo, bar - .long L4 + 1 - .long L35 + 1 - .long L36 + 1 - .long L37 + 1 - .long L38 + 1 // CHECK: Symbols [ // CHECK-NEXT: Symbol { diff --git a/test/SymbolRewriter/rewrite.ll b/test/SymbolRewriter/rewrite.ll index 716fff9f284c..e8a0db6d606c 100644 --- a/test/SymbolRewriter/rewrite.ll +++ b/test/SymbolRewriter/rewrite.ll @@ -28,12 +28,40 @@ entry: ret void } +$source_comdat_function = comdat any +define dllexport void @source_comdat_function() comdat($source_comdat_function) { +entry: + ret void +} + +$source_comdat_function_1 = comdat exactmatch +define dllexport void @source_comdat_function_1() comdat($source_comdat_function_1) { +entry: + ret void +} + +$source_comdat_variable = comdat largest +@source_comdat_variable = global i32 32, comdat($source_comdat_variable) + +$source_comdat_variable_1 = comdat noduplicates +@source_comdat_variable_1 = global i32 64, comdat($source_comdat_variable_1) + +; CHECK: $target_comdat_function = comdat any +; CHECK: $target_comdat_function_1 = comdat exactmatch +; CHECK: $target_comdat_variable = comdat largest +; CHECK: $target_comdat_variable_1 = comdat noduplicates + ; CHECK: @target_variable = external global i32 ; CHECK-NOT: @source_variable = external global i32 ; CHECK: @target_pattern_variable = external global i32 ; CHECK-NOT: @source_pattern_variable = external global i32 ; CHECK: @target_pattern_multiple_variable_matches = external global i32 ; CHECK-NOT: @source_pattern_multiple_variable_matches = external global i32 +; CHECK: @target_comdat_variable = global i32 32, comdat +; CHECK-NOT: @source_comdat_variable = global i32 32, comdat +; CHECK: @target_comdat_variable_1 = global i32 64, comdat +; CHECK-NOT: @source_comdat_variable_1 = global i32 64, comdat + ; CHECK: declare void @target_function() ; CHECK-NOT: declare void @source_function() ; CHECK: declare void @target_pattern_function() @@ -57,3 +85,8 @@ entry: ; CHECK: ret i32 %res ; CHECK: } +; CHECK: define dllexport void @target_comdat_function() comdat +; CHECK-NOT: define dllexport void @source_comdat_function() comdat +; CHECK: define dllexport void @target_comdat_function_1() comdat +; CHECK-NOT: define dllexport void @source_comdat_function_1() comdat + diff --git a/test/SymbolRewriter/rewrite.map b/test/SymbolRewriter/rewrite.map index ef6dfc8ca2b9..8094939d088d 100644 --- a/test/SymbolRewriter/rewrite.map +++ b/test/SymbolRewriter/rewrite.map @@ -44,3 +44,23 @@ global alias: { target: _ZN1SD1Ev, } +function: { + source: source_comdat_function, + target: target_comdat_function, +} + +function: { + source: source_comdat_function_(.*), + transform: target_comdat_function_\1, +} + +global variable: { + source: source_comdat_variable, + target: target_comdat_variable, +} + +global variable: { + source: source_comdat_variable_(.*), + transform: target_comdat_variable_\1, +} + diff --git a/test/Transforms/GVN/edge.ll b/test/Transforms/GVN/edge.ll index 1dc285ec3d7c..f28a76bb42d6 100644 --- a/test/Transforms/GVN/edge.ll +++ b/test/Transforms/GVN/edge.ll @@ -69,11 +69,11 @@ if: br label %return return: - %retval.0 = phi double [ %div, %if ], [ %x, %entry ] - ret double %retval.0 + %retval = phi double [ %div, %if ], [ %x, %entry ] + ret double %retval ; CHECK-LABEL: define double @fcmp_oeq( -; CHECK: %div = fdiv double %x, 2.000000e+00 +; CHECK: %div = fdiv double %x, 2.0 } define double @fcmp_une(double %x, double %y) { @@ -86,10 +86,46 @@ else: br label %return return: - %retval.0 = phi double [ %div, %else ], [ %x, %entry ] - ret double %retval.0 + %retval = phi double [ %div, %else ], [ %x, %entry ] + ret double %retval ; CHECK-LABEL: define double @fcmp_une( -; CHECK: %div = fdiv double %x, 2.000000e+00 +; CHECK: %div = fdiv double %x, 2.0 } +; PR22376 - We can't propagate zero constants because -0.0 +; compares equal to 0.0. If %y is -0.0 in this test case, +; we would produce the wrong sign on the infinity return value. +define double @fcmp_oeq_zero(double %x, double %y) { +entry: + %cmp = fcmp oeq double %y, 0.0 + br i1 %cmp, label %if, label %return + +if: + %div = fdiv double %x, %y + br label %return + +return: + %retval = phi double [ %div, %if ], [ %x, %entry ] + ret double %retval + +; CHECK-LABEL: define double @fcmp_oeq_zero( +; CHECK: %div = fdiv double %x, %y +} + +define double @fcmp_une_zero(double %x, double %y) { +entry: + %cmp = fcmp une double %y, -0.0 + br i1 %cmp, label %return, label %else + +else: + %div = fdiv double %x, %y + br label %return + +return: + %retval = phi double [ %div, %else ], [ %x, %entry ] + ret double %retval + +; CHECK-LABEL: define double @fcmp_une_zero( +; CHECK: %div = fdiv double %x, %y +} diff --git a/test/Transforms/IndVarSimplify/pr22222.ll b/test/Transforms/IndVarSimplify/pr22222.ll new file mode 100644 index 000000000000..ccdfe538dfa5 --- /dev/null +++ b/test/Transforms/IndVarSimplify/pr22222.ll @@ -0,0 +1,46 @@ +; RUN: opt -indvars -S < %s | FileCheck %s + +@b = common global i32 0, align 4 +@c = common global i32 0, align 4 +@a = common global i32 0, align 4 + +declare void @abort() #1 + +; Function Attrs: nounwind ssp uwtable +define i32 @main() { +entry: + %a.promoted13 = load i32* @a, align 4 + br label %for.cond1.preheader + +for.cond1.preheader: ; preds = %entry, %for.end + %or.lcssa14 = phi i32 [ %a.promoted13, %entry ], [ %or.lcssa, %for.end ] + %d.010 = phi i32 [ 1, %entry ], [ 0, %for.end ] + br label %for.body3 + +for.body3: ; preds = %for.cond1.preheader, %for.body3 + %inc12 = phi i32 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ] + %or11 = phi i32 [ %or.lcssa14, %for.cond1.preheader ], [ %or, %for.body3 ] +; CHECK-NOT: sub nuw i32 %inc12, %d.010 +; CHECK: sub i32 %inc12, %d.010 + %add = sub i32 %inc12, %d.010 + %or = or i32 %or11, %add + %inc = add i32 %inc12, 1 + br i1 false, label %for.body3, label %for.end + +for.end: ; preds = %for.body3 + %or.lcssa = phi i32 [ %or, %for.body3 ] + br i1 false, label %for.cond1.preheader, label %for.end6 + +for.end6: ; preds = %for.end + %or.lcssa.lcssa = phi i32 [ %or.lcssa, %for.end ] + store i32 %or.lcssa.lcssa, i32* @a, align 4 + %cmp7 = icmp eq i32 %or.lcssa.lcssa, -1 + br i1 %cmp7, label %if.end, label %if.then + +if.then: ; preds = %for.end6 + tail call void @abort() #2 + unreachable + +if.end: ; preds = %for.end6 + ret i32 0 +} diff --git a/test/Transforms/IndVarSimplify/strengthen-overflow.ll b/test/Transforms/IndVarSimplify/strengthen-overflow.ll index 07e489e03382..2bafe96e1ccc 100644 --- a/test/Transforms/IndVarSimplify/strengthen-overflow.ll +++ b/test/Transforms/IndVarSimplify/strengthen-overflow.ll @@ -52,58 +52,6 @@ define i32 @test.signed.add.1(i32* %array, i32 %length, i32 %init) { ret i32 42 } -define i32 @test.signed.sub.0(i32* %array, i32 %length, i32 %init) { -; CHECK-LABEL: @test.signed.sub.0 - entry: - %upper = icmp sgt i32 %init, %length - br i1 %upper, label %loop, label %exit - - loop: -; CHECK-LABEL: loop - %civ = phi i32 [ %init, %entry ], [ %civ.inc, %latch ] - %civ.inc = sub i32 %civ, 1 -; CHECK: %civ.inc = sub nsw i32 %civ, 1 - %cmp = icmp slt i32 %civ.inc, %length - br i1 %cmp, label %latch, label %break - - latch: - store i32 0, i32* %array - %check = icmp sgt i32 %civ.inc, %length - br i1 %check, label %loop, label %break - - break: - ret i32 %civ.inc - - exit: - ret i32 42 -} - -define i32 @test.signed.sub.1(i32* %array, i32 %length, i32 %init) { -; CHECK-LABEL: @test.signed.sub.1 - entry: - %upper = icmp sgt i32 %init, %length - br i1 %upper, label %loop, label %exit - - loop: -; CHECK-LABEL: loop - %civ = phi i32 [ %init, %entry ], [ %civ.inc, %latch ] - %civ.inc = sub i32 %civ, 1 -; CHECK: %civ.inc = sub i32 %civ, 1 - %cmp = icmp slt i32 %civ.inc, %length - br i1 %cmp, label %latch, label %break - - latch: - store i32 0, i32* %array - %check = icmp sge i32 %civ.inc, %length - br i1 %check, label %loop, label %break - - break: - ret i32 %civ.inc - - exit: - ret i32 42 -} - define i32 @test.unsigned.add.0(i32* %array, i32 %length, i32 %init) { ; CHECK-LABEL: @test.unsigned.add.0 entry: @@ -156,59 +104,5 @@ define i32 @test.unsigned.add.1(i32* %array, i32 %length, i32 %init) { ret i32 42 } -define i32 @test.unsigned.sub.0(i32* %array, i32* %length_ptr, i32 %init) { -; CHECK-LABEL: @test.unsigned.sub.0 - entry: - %length = load i32* %length_ptr, !range !0 - %upper = icmp ult i32 %init, %length - br i1 %upper, label %loop, label %exit - - loop: -; CHECK-LABEL: loop - %civ = phi i32 [ %init, %entry ], [ %civ.inc, %latch ] - %civ.inc = sub i32 %civ, 2 -; CHECK: %civ.inc = sub nuw i32 %civ, 2 - %cmp = icmp slt i32 %civ.inc, %length - br i1 %cmp, label %latch, label %break - - latch: - store i32 0, i32* %array - %check = icmp ult i32 %civ.inc, %length - br i1 %check, label %loop, label %break - - break: - ret i32 %civ.inc - - exit: - ret i32 42 -} - -define i32 @test.unsigned.sub.1(i32* %array, i32* %length_ptr, i32 %init) { -; CHECK-LABEL: @test.unsigned.sub.1 - entry: - %length = load i32* %length_ptr, !range !1 - %upper = icmp ult i32 %init, %length - br i1 %upper, label %loop, label %exit - - loop: -; CHECK-LABEL: loop - %civ = phi i32 [ %init, %entry ], [ %civ.inc, %latch ] - %civ.inc = sub i32 %civ, 2 -; CHECK: %civ.inc = sub i32 %civ, 2 - %cmp = icmp slt i32 %civ.inc, %length - br i1 %cmp, label %latch, label %break - - latch: - store i32 0, i32* %array - %check = icmp ult i32 %civ.inc, %length - br i1 %check, label %loop, label %break - - break: - ret i32 %civ.inc - - exit: - ret i32 42 -} - !0 = !{i32 0, i32 2} !1 = !{i32 0, i32 42} diff --git a/test/Transforms/InstCombine/call-cast-target.ll b/test/Transforms/InstCombine/call-cast-target.ll index b82dd99db36f..4a5c94961e29 100644 --- a/test/Transforms/InstCombine/call-cast-target.ll +++ b/test/Transforms/InstCombine/call-cast-target.ll @@ -61,3 +61,14 @@ entry: %call = tail call i32 bitcast (i32 (i64)* @fn3 to i32 (i32*)*)(i32* %a) ret i32 %call } + +declare i32 @fn4(i32) "thunk" + +define i32 @test4(i32* %a) { +; CHECK-LABEL: @test4 +; CHECK: %[[call:.*]] = tail call i32 bitcast (i32 (i32)* @fn4 to i32 (i32*)*)(i32* %a) +; CHECK-NEXT: ret i32 %[[call]] +entry: + %call = tail call i32 bitcast (i32 (i32)* @fn4 to i32 (i32*)*)(i32* %a) + ret i32 %call +} diff --git a/test/Transforms/InstCombine/memcpy_chk-1.ll b/test/Transforms/InstCombine/memcpy_chk-1.ll index 008b838201ed..ddaaf82a8e2d 100644 --- a/test/Transforms/InstCombine/memcpy_chk-1.ll +++ b/test/Transforms/InstCombine/memcpy_chk-1.ll @@ -15,46 +15,50 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 ; Check cases where dstlen >= len. -define void @test_simplify1() { +define i8* @test_simplify1() { ; CHECK-LABEL: @test_simplify1( %dst = bitcast %struct.T1* @t1 to i8* %src = bitcast %struct.T2* @t2 to i8* -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64 - call i8* @__memcpy_chk(i8* %dst, i8* %src, i64 1824, i64 1824) - ret void +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* bitcast (%struct.T1* @t1 to i8*), i8* bitcast (%struct.T2* @t2 to i8*), i64 1824, i32 4, i1 false) +; CHECK-NEXT: ret i8* bitcast (%struct.T1* @t1 to i8*) + %ret = call i8* @__memcpy_chk(i8* %dst, i8* %src, i64 1824, i64 1824) + ret i8* %ret } -define void @test_simplify2() { +define i8* @test_simplify2() { ; CHECK-LABEL: @test_simplify2( %dst = bitcast %struct.T1* @t1 to i8* %src = bitcast %struct.T3* @t3 to i8* -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64 - call i8* @__memcpy_chk(i8* %dst, i8* %src, i64 1824, i64 2848) - ret void +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* bitcast (%struct.T1* @t1 to i8*), i8* bitcast (%struct.T3* @t3 to i8*), i64 1824, i32 4, i1 false) +; CHECK-NEXT: ret i8* bitcast (%struct.T1* @t1 to i8*) + %ret = call i8* @__memcpy_chk(i8* %dst, i8* %src, i64 1824, i64 2848) + ret i8* %ret } ; Check cases where dstlen < len. -define void @test_no_simplify1() { +define i8* @test_no_simplify1() { ; CHECK-LABEL: @test_no_simplify1( %dst = bitcast %struct.T3* @t3 to i8* %src = bitcast %struct.T1* @t1 to i8* -; CHECK-NEXT: call i8* @__memcpy_chk - call i8* @__memcpy_chk(i8* %dst, i8* %src, i64 2848, i64 1824) - ret void +; CHECK-NEXT: %ret = call i8* @__memcpy_chk(i8* bitcast (%struct.T3* @t3 to i8*), i8* bitcast (%struct.T1* @t1 to i8*), i64 2848, i64 1824) +; CHECK-NEXT: ret i8* %ret + %ret = call i8* @__memcpy_chk(i8* %dst, i8* %src, i64 2848, i64 1824) + ret i8* %ret } -define void @test_no_simplify2() { +define i8* @test_no_simplify2() { ; CHECK-LABEL: @test_no_simplify2( %dst = bitcast %struct.T1* @t1 to i8* %src = bitcast %struct.T2* @t2 to i8* -; CHECK-NEXT: call i8* @__memcpy_chk - call i8* @__memcpy_chk(i8* %dst, i8* %src, i64 1024, i64 0) - ret void +; CHECK-NEXT: %ret = call i8* @__memcpy_chk(i8* bitcast (%struct.T1* @t1 to i8*), i8* bitcast (%struct.T2* @t2 to i8*), i64 1024, i64 0) +; CHECK-NEXT: ret i8* %ret + %ret = call i8* @__memcpy_chk(i8* %dst, i8* %src, i64 1024, i64 0) + ret i8* %ret } define i8* @test_simplify_return_indcall(i8* ()* %alloc) { diff --git a/test/Transforms/InstCombine/memmove_chk-1.ll b/test/Transforms/InstCombine/memmove_chk-1.ll index 6d93bbbf959e..e4e1f6eedf39 100644 --- a/test/Transforms/InstCombine/memmove_chk-1.ll +++ b/test/Transforms/InstCombine/memmove_chk-1.ll @@ -15,46 +15,50 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 ; Check cases where dstlen >= len. -define void @test_simplify1() { +define i8* @test_simplify1() { ; CHECK-LABEL: @test_simplify1( %dst = bitcast %struct.T1* @t1 to i8* %src = bitcast %struct.T2* @t2 to i8* -; CHECK-NEXT: call void @llvm.memmove.p0i8.p0i8.i64 - call i8* @__memmove_chk(i8* %dst, i8* %src, i64 1824, i64 1824) - ret void +; CHECK-NEXT: call void @llvm.memmove.p0i8.p0i8.i64(i8* bitcast (%struct.T1* @t1 to i8*), i8* bitcast (%struct.T2* @t2 to i8*), i64 1824, i32 4, i1 false) +; CHECK-NEXT: ret i8* bitcast (%struct.T1* @t1 to i8*) + %ret = call i8* @__memmove_chk(i8* %dst, i8* %src, i64 1824, i64 1824) + ret i8* %ret } -define void @test_simplify2() { +define i8* @test_simplify2() { ; CHECK-LABEL: @test_simplify2( %dst = bitcast %struct.T1* @t1 to i8* %src = bitcast %struct.T3* @t3 to i8* -; CHECK-NEXT: call void @llvm.memmove.p0i8.p0i8.i64 - call i8* @__memmove_chk(i8* %dst, i8* %src, i64 1824, i64 2848) - ret void +; CHECK-NEXT: call void @llvm.memmove.p0i8.p0i8.i64(i8* bitcast (%struct.T1* @t1 to i8*), i8* bitcast (%struct.T3* @t3 to i8*), i64 1824, i32 4, i1 false) +; CHECK-NEXT: ret i8* bitcast (%struct.T1* @t1 to i8*) + %ret = call i8* @__memmove_chk(i8* %dst, i8* %src, i64 1824, i64 2848) + ret i8* %ret } ; Check cases where dstlen < len. -define void @test_no_simplify1() { +define i8* @test_no_simplify1() { ; CHECK-LABEL: @test_no_simplify1( %dst = bitcast %struct.T3* @t3 to i8* %src = bitcast %struct.T1* @t1 to i8* -; CHECK-NEXT: call i8* @__memmove_chk - call i8* @__memmove_chk(i8* %dst, i8* %src, i64 2848, i64 1824) - ret void +; CHECK-NEXT: %ret = call i8* @__memmove_chk(i8* bitcast (%struct.T3* @t3 to i8*), i8* bitcast (%struct.T1* @t1 to i8*), i64 2848, i64 1824) +; CHECK-NEXT: ret i8* %ret + %ret = call i8* @__memmove_chk(i8* %dst, i8* %src, i64 2848, i64 1824) + ret i8* %ret } -define void @test_no_simplify2() { +define i8* @test_no_simplify2() { ; CHECK-LABEL: @test_no_simplify2( %dst = bitcast %struct.T1* @t1 to i8* %src = bitcast %struct.T2* @t2 to i8* -; CHECK-NEXT: call i8* @__memmove_chk - call i8* @__memmove_chk(i8* %dst, i8* %src, i64 1024, i64 0) - ret void +; CHECK-NEXT: %ret = call i8* @__memmove_chk(i8* bitcast (%struct.T1* @t1 to i8*), i8* bitcast (%struct.T2* @t2 to i8*), i64 1024, i64 0) +; CHECK-NEXT: ret i8* %ret + %ret = call i8* @__memmove_chk(i8* %dst, i8* %src, i64 1024, i64 0) + ret i8* %ret } declare i8* @__memmove_chk(i8*, i8*, i64, i64) diff --git a/test/Transforms/InstCombine/memset_chk-1.ll b/test/Transforms/InstCombine/memset_chk-1.ll index 47cc7db998e4..27f7293a6bce 100644 --- a/test/Transforms/InstCombine/memset_chk-1.ll +++ b/test/Transforms/InstCombine/memset_chk-1.ll @@ -11,51 +11,56 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 ; Check cases where dstlen >= len. -define void @test_simplify1() { +define i8* @test_simplify1() { ; CHECK-LABEL: @test_simplify1( %dst = bitcast %struct.T* @t to i8* -; CHECK-NEXT: call void @llvm.memset.p0i8.i64 - call i8* @__memset_chk(i8* %dst, i32 0, i64 1824, i64 1824) - ret void +; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* bitcast (%struct.T* @t to i8*), i8 0, i64 1824, i32 4, i1 false) +; CHECK-NEXT: ret i8* bitcast (%struct.T* @t to i8*) + %ret = call i8* @__memset_chk(i8* %dst, i32 0, i64 1824, i64 1824) + ret i8* %ret } -define void @test_simplify2() { +define i8* @test_simplify2() { ; CHECK-LABEL: @test_simplify2( %dst = bitcast %struct.T* @t to i8* -; CHECK-NEXT: call void @llvm.memset.p0i8.i64 - call i8* @__memset_chk(i8* %dst, i32 0, i64 1824, i64 3648) - ret void +; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* bitcast (%struct.T* @t to i8*), i8 0, i64 1824, i32 4, i1 false) +; CHECK-NEXT: ret i8* bitcast (%struct.T* @t to i8*) + %ret = call i8* @__memset_chk(i8* %dst, i32 0, i64 1824, i64 3648) + ret i8* %ret } -define void @test_simplify3() { +define i8* @test_simplify3() { ; CHECK-LABEL: @test_simplify3( %dst = bitcast %struct.T* @t to i8* -; CHECK-NEXT: call void @llvm.memset.p0i8.i64 - call i8* @__memset_chk(i8* %dst, i32 0, i64 1824, i64 -1) - ret void +; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* bitcast (%struct.T* @t to i8*), i8 0, i64 1824, i32 4, i1 false) +; CHECK-NEXT: ret i8* bitcast (%struct.T* @t to i8*) + %ret = call i8* @__memset_chk(i8* %dst, i32 0, i64 1824, i64 -1) + ret i8* %ret } ; Check cases where dstlen < len. -define void @test_no_simplify1() { +define i8* @test_no_simplify1() { ; CHECK-LABEL: @test_no_simplify1( %dst = bitcast %struct.T* @t to i8* -; CHECK-NEXT: call i8* @__memset_chk - call i8* @__memset_chk(i8* %dst, i32 0, i64 1824, i64 400) - ret void +; CHECK-NEXT: %ret = call i8* @__memset_chk(i8* bitcast (%struct.T* @t to i8*), i32 0, i64 1824, i64 400) +; CHECK-NEXT: ret i8* %ret + %ret = call i8* @__memset_chk(i8* %dst, i32 0, i64 1824, i64 400) + ret i8* %ret } -define void @test_no_simplify2() { +define i8* @test_no_simplify2() { ; CHECK-LABEL: @test_no_simplify2( %dst = bitcast %struct.T* @t to i8* -; CHECK-NEXT: call i8* @__memset_chk - call i8* @__memset_chk(i8* %dst, i32 0, i64 1824, i64 0) - ret void +; CHECK-NEXT: %ret = call i8* @__memset_chk(i8* bitcast (%struct.T* @t to i8*), i32 0, i64 1824, i64 0) +; CHECK-NEXT: ret i8* %ret + %ret = call i8* @__memset_chk(i8* %dst, i32 0, i64 1824, i64 0) + ret i8* %ret } declare i8* @__memset_chk(i8*, i32, i64, i64) diff --git a/test/Transforms/InstCombine/stpcpy_chk-1.ll b/test/Transforms/InstCombine/stpcpy_chk-1.ll index 8a02529c61ca..393c5d96d10b 100644 --- a/test/Transforms/InstCombine/stpcpy_chk-1.ll +++ b/test/Transforms/InstCombine/stpcpy_chk-1.ll @@ -11,46 +11,50 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3 ; Check cases where slen >= strlen (src). -define void @test_simplify1() { +define i8* @test_simplify1() { ; CHECK-LABEL: @test_simplify1( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [12 x i8]* @.str, i32 0, i32 0 -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32 - call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 60) - ret void +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 12, i32 1, i1 false) +; CHECK-NEXT: ret i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 11) + %ret = call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 60) + ret i8* %ret } -define void @test_simplify2() { +define i8* @test_simplify2() { ; CHECK-LABEL: @test_simplify2( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [12 x i8]* @.str, i32 0, i32 0 -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32 - call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 12) - ret void +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 12, i32 1, i1 false) +; CHECK-NEXT: ret i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 11) + %ret = call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 12) + ret i8* %ret } -define void @test_simplify3() { +define i8* @test_simplify3() { ; CHECK-LABEL: @test_simplify3( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [12 x i8]* @.str, i32 0, i32 0 -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32 - call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 -1) - ret void +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 12, i32 1, i1 false) +; CHECK-NEXT: ret i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 11) + %ret = call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 -1) + ret i8* %ret } ; Check cases where there are no string constants. -define void @test_simplify4() { +define i8* @test_simplify4() { ; CHECK-LABEL: @test_simplify4( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [60 x i8]* @b, i32 0, i32 0 -; CHECK-NEXT: call i8* @stpcpy - call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 -1) - ret void +; CHECK-NEXT: %stpcpy = call i8* @stpcpy(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8]* @b, i32 0, i32 0)) +; CHECK-NEXT: ret i8* %stpcpy + %ret = call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 -1) + ret i8* %ret } ; Check case where the string length is not constant. @@ -60,10 +64,11 @@ define i8* @test_simplify5() { %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [12 x i8]* @.str, i32 0, i32 0 -; CHECK: @__memcpy_chk +; CHECK-NEXT: %len = call i32 @llvm.objectsize.i32.p0i8(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i1 false) +; CHECK-NEXT: %1 = call i8* @__memcpy_chk(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 12, i32 %len) +; CHECK-NEXT: ret i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 11) %len = call i32 @llvm.objectsize.i32.p0i8(i8* %dst, i1 false) %ret = call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 %len) -; CHECK: ret i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 11) ret i8* %ret } @@ -73,8 +78,9 @@ define i8* @test_simplify6() { ; CHECK-LABEL: @test_simplify6( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 -; CHECK: [[LEN:%[a-z]+]] = call i32 @strlen -; CHECK-NEXT: getelementptr inbounds [60 x i8]* @a, i32 0, i32 [[LEN]] +; CHECK-NEXT: %strlen = call i32 @strlen(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0)) +; CHECK-NEXT: %1 = getelementptr inbounds [60 x i8]* @a, i32 0, i32 %strlen +; CHECK-NEXT: ret i8* %1 %len = call i32 @llvm.objectsize.i32.p0i8(i8* %dst, i1 false) %ret = call i8* @__stpcpy_chk(i8* %dst, i8* %dst, i32 %len) ret i8* %ret @@ -82,14 +88,15 @@ define i8* @test_simplify6() { ; Check case where slen < strlen (src). -define void @test_no_simplify1() { +define i8* @test_no_simplify1() { ; CHECK-LABEL: @test_no_simplify1( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [60 x i8]* @b, i32 0, i32 0 -; CHECK-NEXT: call i8* @__stpcpy_chk - call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 8) - ret void +; CHECK-NEXT: %ret = call i8* @__stpcpy_chk(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8]* @b, i32 0, i32 0), i32 8) +; CHECK-NEXT: ret i8* %ret + %ret = call i8* @__stpcpy_chk(i8* %dst, i8* %src, i32 8) + ret i8* %ret } declare i8* @__stpcpy_chk(i8*, i8*, i32) nounwind diff --git a/test/Transforms/InstCombine/strcpy_chk-1.ll b/test/Transforms/InstCombine/strcpy_chk-1.ll index 8e7fec76ef5c..e3f163fd087d 100644 --- a/test/Transforms/InstCombine/strcpy_chk-1.ll +++ b/test/Transforms/InstCombine/strcpy_chk-1.ll @@ -11,59 +11,65 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3 ; Check cases where slen >= strlen (src). -define void @test_simplify1() { +define i8* @test_simplify1() { ; CHECK-LABEL: @test_simplify1( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [12 x i8]* @.str, i32 0, i32 0 -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32 - call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 60) - ret void +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 12, i32 1, i1 false) +; CHECK-NEXT: ret i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0) + %ret = call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 60) + ret i8* %ret } -define void @test_simplify2() { +define i8* @test_simplify2() { ; CHECK-LABEL: @test_simplify2( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [12 x i8]* @.str, i32 0, i32 0 -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32 - call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 12) - ret void +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 12, i32 1, i1 false) +; CHECK-NEXT: ret i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0) + %ret = call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 12) + ret i8* %ret } -define void @test_simplify3() { +define i8* @test_simplify3() { ; CHECK-LABEL: @test_simplify3( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [12 x i8]* @.str, i32 0, i32 0 -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32 - call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 -1) - ret void +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 12, i32 1, i1 false) +; CHECK-NEXT: ret i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0) + %ret = call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 -1) + ret i8* %ret } ; Check cases where there are no string constants. -define void @test_simplify4() { +define i8* @test_simplify4() { ; CHECK-LABEL: @test_simplify4( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [60 x i8]* @b, i32 0, i32 0 -; CHECK-NEXT: call i8* @strcpy - call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 -1) - ret void +; CHECK-NEXT: %strcpy = call i8* @strcpy(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8]* @b, i32 0, i32 0)) +; CHECK-NEXT: ret i8* %strcpy + %ret = call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 -1) + ret i8* %ret } ; Check case where the string length is not constant. -define void @test_simplify5() { +define i8* @test_simplify5() { ; CHECK-LABEL: @test_simplify5( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [12 x i8]* @.str, i32 0, i32 0 -; CHECK: @__memcpy_chk +; CHECK-NEXT: %len = call i32 @llvm.objectsize.i32.p0i8(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i1 false) +; CHECK-NEXT: %1 = call i8* @__memcpy_chk(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 12, i32 %len) +; CHECK-NEXT: ret i8* %1 %len = call i32 @llvm.objectsize.i32.p0i8(i8* %dst, i1 false) - call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 %len) - ret void + %ret = call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 %len) + ret i8* %ret } ; Check case where the source and destination are the same. @@ -72,7 +78,9 @@ define i8* @test_simplify6() { ; CHECK-LABEL: @test_simplify6( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 -; CHECK: getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0) +; CHECK-NEXT: %len = call i32 @llvm.objectsize.i32.p0i8(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i1 false) +; CHECK-NEXT: %ret = call i8* @__strcpy_chk(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i32 %len) +; CHECK-NEXT: ret i8* %ret %len = call i32 @llvm.objectsize.i32.p0i8(i8* %dst, i1 false) %ret = call i8* @__strcpy_chk(i8* %dst, i8* %dst, i32 %len) ret i8* %ret @@ -80,14 +88,15 @@ define i8* @test_simplify6() { ; Check case where slen < strlen (src). -define void @test_no_simplify1() { +define i8* @test_no_simplify1() { ; CHECK-LABEL: @test_no_simplify1( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [60 x i8]* @b, i32 0, i32 0 -; CHECK-NEXT: call i8* @__strcpy_chk - call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 8) - ret void +; CHECK-NEXT: %ret = call i8* @__strcpy_chk(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8]* @b, i32 0, i32 0), i32 8) +; CHECK-NEXT: ret i8* %ret + %ret = call i8* @__strcpy_chk(i8* %dst, i8* %src, i32 8) + ret i8* %ret } declare i8* @__strcpy_chk(i8*, i8*, i32) nounwind diff --git a/test/Transforms/InstCombine/strncpy_chk-1.ll b/test/Transforms/InstCombine/strncpy_chk-1.ll index 90b4173ced77..9242a8acdbbe 100644 --- a/test/Transforms/InstCombine/strncpy_chk-1.ll +++ b/test/Transforms/InstCombine/strncpy_chk-1.ll @@ -11,56 +11,61 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3 ; Check cases where dstlen >= len -define void @test_simplify1() { +define i8* @test_simplify1() { ; CHECK-LABEL: @test_simplify1( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [12 x i8]* @.str, i32 0, i32 0 -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32 - call i8* @__strncpy_chk(i8* %dst, i8* %src, i32 12, i32 60) - ret void +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 12, i32 1, i1 false) +; CHECK-NEXT: ret i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0) + %ret = call i8* @__strncpy_chk(i8* %dst, i8* %src, i32 12, i32 60) + ret i8* %ret } -define void @test_simplify2() { +define i8* @test_simplify2() { ; CHECK-LABEL: @test_simplify2( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [12 x i8]* @.str, i32 0, i32 0 -; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32 - call i8* @__strncpy_chk(i8* %dst, i8* %src, i32 12, i32 12) - ret void +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 12, i32 1, i1 false) +; CHECK-NEXT: ret i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0) + %ret = call i8* @__strncpy_chk(i8* %dst, i8* %src, i32 12, i32 12) + ret i8* %ret } -define void @test_simplify3() { +define i8* @test_simplify3() { ; CHECK-LABEL: @test_simplify3( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [60 x i8]* @b, i32 0, i32 0 -; CHECK-NEXT: call i8* @strncpy - call i8* @__strncpy_chk(i8* %dst, i8* %src, i32 12, i32 60) - ret void +; CHECK-NEXT: %strncpy = call i8* @strncpy(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8]* @b, i32 0, i32 0), i32 12) +; CHECK-NEXT: ret i8* %strncpy + %ret = call i8* @__strncpy_chk(i8* %dst, i8* %src, i32 12, i32 60) + ret i8* %ret } ; Check cases where dstlen < len -define void @test_no_simplify1() { +define i8* @test_no_simplify1() { ; CHECK-LABEL: @test_no_simplify1( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [12 x i8]* @.str, i32 0, i32 0 -; CHECK-NEXT: call i8* @__strncpy_chk - call i8* @__strncpy_chk(i8* %dst, i8* %src, i32 8, i32 4) - ret void +; CHECK-NEXT: %ret = call i8* @__strncpy_chk(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), i32 8, i32 4) +; CHECK-NEXT: ret i8* %ret + %ret = call i8* @__strncpy_chk(i8* %dst, i8* %src, i32 8, i32 4) + ret i8* %ret } -define void @test_no_simplify2() { +define i8* @test_no_simplify2() { ; CHECK-LABEL: @test_no_simplify2( %dst = getelementptr inbounds [60 x i8]* @a, i32 0, i32 0 %src = getelementptr inbounds [60 x i8]* @b, i32 0, i32 0 -; CHECK-NEXT: call i8* @__strncpy_chk - call i8* @__strncpy_chk(i8* %dst, i8* %src, i32 8, i32 0) - ret void +; CHECK-NEXT: %ret = call i8* @__strncpy_chk(i8* getelementptr inbounds ([60 x i8]* @a, i32 0, i32 0), i8* getelementptr inbounds ([60 x i8]* @b, i32 0, i32 0), i32 8, i32 0) +; CHECK-NEXT: ret i8* %ret + %ret = call i8* @__strncpy_chk(i8* %dst, i8* %src, i32 8, i32 0) + ret i8* %ret } declare i8* @__strncpy_chk(i8*, i8*, i32, i32) diff --git a/test/tools/gold/emit-llvm.ll b/test/tools/gold/emit-llvm.ll index cfdc55108c0b..2c43147a2eab 100644 --- a/test/tools/gold/emit-llvm.ll +++ b/test/tools/gold/emit-llvm.ll @@ -21,6 +21,11 @@ target triple = "x86_64-unknown-linux-gnu" +@g7 = extern_weak global i32 +; CHECK-DAG: @g7 = extern_weak global i32 + +@g8 = external global i32 + ; CHECK: define internal void @f1() ; OPT-NOT: @f1 define hidden void @f1() { @@ -62,6 +67,13 @@ define linkonce_odr void @f6() unnamed_addr { } @g6 = global void()* @f6 +define i32* @f7() { + ret i32* @g7 +} + +define i32* @f8() { + ret i32* @g8 +} ; API: f1 PREVAILING_DEF_IRONLY ; API: f2 PREVAILING_DEF_IRONLY @@ -69,5 +81,9 @@ define linkonce_odr void @f6() unnamed_addr { ; API: f4 PREVAILING_DEF_IRONLY_EXP ; API: f5 PREVAILING_DEF_IRONLY_EXP ; API: f6 PREVAILING_DEF_IRONLY_EXP +; API: f7 PREVAILING_DEF_IRONLY_EXP +; API: f8 PREVAILING_DEF_IRONLY_EXP +; API: g7 UNDEF +; API: g8 UNDEF ; API: g5 PREVAILING_DEF_IRONLY_EXP ; API: g6 PREVAILING_DEF_IRONLY_EXP |