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* - splhigh()/splx() -> critical_enter()/critical_exit()Andrew Gallatin2001-10-202-5/+5
| | | | | | | | | - fix KV macro in t2_pci.c to include the sable_lynx_base variable so that the T2 CSRs can be found on lynxes. Current should be bootable on lynxes now. Notes: svn path=/head/; revision=85263
* Remove unneeded sys/mutex.h includes.John Baldwin2001-10-196-6/+0
| | | | Notes: svn path=/head/; revision=85185
* Fix Assembler buglet: Warning: .end directive names different symbol than .entMatt Jacob2001-06-141-1/+1
| | | | | | | MFC after: 2 weeks Notes: svn path=/head/; revision=78223
* Supply the intpin to the platform.pci_intr_map() function. It turnsAndrew Gallatin2001-06-103-0/+6
| | | | | | | | | | out nearly every platform but the one I tested on requires the intpin to swizzle out the correct intline. tested by: Martijn Pronk <mpkisbkl@xs4all.nl> (lca_pci) Notes: svn path=/head/; revision=78007
* Resurrect platform.pci_intr_map() and essentially undo the effects ofAndrew Gallatin2001-06-015-106/+45
| | | | | | | | | | | | | | | | | | | | the interface conversion to platform.pci_intr_route(). I've left the platform.pci_intr_route() function pointer in place, as well as alpha_pci_route_interrupt(), but no platform currently implements it. To work around the removal of alpha_platform_assign_pciintr(cfg); from the pci probe code, I've hooked in calls to platform.pci_intr_map() in pcib_read_config (similar to the x86 APIC_IO ifdef in pci_cfgregread) for every chipset that has a platform which needs it. While here, I've removed the interupt mapping/routing code from the AS2x00 platform because its not required (it has never been present in -stable). Tested on: UP1000, Miata(GL), XP1000, AS2100, AS500 Notes: svn path=/head/; revision=77593
* Backout previous revision. While it fixed many platforms, it brokeAndrew Gallatin2001-05-311-7/+2
| | | | | | | | | | all alphas with devices behind ppb's. I'm working on a better solution now. Note that all alphas that use per-platform interrupt mapping are broken again (as they have been for several months) Notes: svn path=/head/; revision=77543
* finally fix intr routing on alphas such as the as500 after months ofAndrew Gallatin2001-05-271-2/+7
| | | | | | | | | | | | | | | | | | | | | | breakage: - call PCIB_ROUTE_INTERRUPT() regardless of how valid the intline looks. Some alphas leave garbage in the intline and leave the intr mapping to OS platform support routines that map slots/buses to intlines - Down in the alpha pci code, first try platform.pci_intr_route() and if it doesn't exist or returns garbage, just read the intline out of config space. tested on AS500 (garbage in intline) and UP1000 (PC-like, intline is valid) Note that a nice little hack like the APIC_IO section of pci_cfgregread() is not workable. This is because the calling interface for alpha_pci_route_interrupt() requires us to figure out the bus/slot/etc from a device_t. At pci_read_device() time, we don't have a device_t for the bus/slot/func in question. Notes: svn path=/head/; revision=77280
* Make sure that all resource allocation is handled in the pcib device, notDoug Rabson2001-05-2312-119/+90
| | | | | | | | | | | the chipset. This is already how the multi-hose systems handle resource allocation and it fixes a bug where dense and bwx memory allocations were not handled properly. Reviewed by: gallatin Notes: svn path=/head/; revision=77060
* fix alpha-MD compile errors after the vm_mtx commitAndrew Gallatin2001-05-206-0/+6
| | | | Notes: svn path=/head/; revision=76901
* Switch from save/disable/restore_intr() to critical_enter/exit().John Baldwin2001-03-281-7/+8
| | | | Notes: svn path=/head/; revision=74903
* Use the MI ithread helper functions in the alpha hardware interrupt code.John Baldwin2001-02-094-9/+5
| | | | Notes: svn path=/head/; revision=72241
* Send "#if NISA > 0" to the bit-bucket and replace it with an option.Peter Wemm2001-01-291-5/+6
| | | | | | | | These were compile-time "is the isa code present?" tests and not 'how many isa busses' tests. Notes: svn path=/head/; revision=71785
* Next phase in the PCI subsystem cleanup.Mike Smith2000-12-089-36/+54
| | | | | | | | | | | | | | | | | | | | | | | - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes. Notes: svn path=/head/; revision=69783
* Partially re-write T2 chipset support based on Tru64 platform supportAndrew Gallatin2000-12-074-84/+448
| | | | | | | | | | | | | | | | | | | | | | files which Compaq open-sourced (with a BSD license). This commit adds support for proper PCI interrupt mapping and much better support for swizzling between "standard" isa IRQs and the stdio irqs used by the t2. This also adds enabling/disabling/eoi support for AlphaServer 2100A machines. The 2100A (or lynx) interrupt hardware is is very different (and much nicer) than the 2100. Previously, only AS2100 and AS2000 machines worked. This commits also lays the groundwork for supporting ExtIO modules. These modules are essentially a second hose. This work is left unfinished pending testing on real hardware. Wilko tells me that ExtIO modules are quite rare, and may not actually exist in the wild. Obtained from: Tru64 Tested by: wilko Notes: svn path=/head/; revision=69688
* Fix for vanilla PC164 systems to use a slightly different PALcode magicMatt Jacob2000-12-041-0/+30
| | | | | | | | | | | tweak to enable/disable interrupt sources. Seems to work. It is unclear how many of the PC164 models actually might needs this, and whether or not there are other hidden issues. Obtained from:Bernd Walter <ticso@cicely8.cicely.de> Notes: svn path=/head/; revision=69574
* Convert the pcib_{read,write}_config args from signed to unsigned,Andrew Gallatin2000-12-018-29/+29
| | | | | | | | | | | | | | like the args to the config space accessors these functions replaced. This reduces the likelyhood of overflow when the args are used in macros on the alpha. This prevents memory management faults when probing the pci bus on sables, multias and nonames. Approved by: dfr Tested by: Bernd Walter <ticso@cicely8.cicely.de> Notes: svn path=/head/; revision=69480
* fix isa DMA on pyxis based machines:Andrew Gallatin2000-11-211-7/+8
| | | | | | | | | | | | | | | - move the call to cia_init_sgmap() to after we've determined if we're a pyxis - convert needed splhigh() in cia_sgmap_invalidate_pyxis() to disable_intr() Previously, any isa DMA on a pyxis based machine would cause a panic in cia_sgmap_invalidate_pyxis() because the pyxis workaround was never setup. - while i'm at it, convert needed splhigh() in cia_swiz_set_hae_mem to disable_intr() Notes: svn path=/head/; revision=68984
* Fix typo in END macro (END'ed enable twice)Matt Jacob2000-11-091-1/+1
| | | | | | | | PR: 22713 Submitted by: Bernd Walter <ticso@cicely5.cicely.de> Notes: svn path=/head/; revision=68529
* Pass in the new-bus flags to alpha_setup_intr().John Baldwin2000-11-014-5/+5
| | | | Notes: svn path=/head/; revision=68192
* - Heavyweight interrupt threads on the alpha for device I/O interrupts.John Baldwin2000-10-055-18/+110
| | | | | | | | | | | | | | - Make softinterrupts (SWI's) almost completely MI, and divorce them completely from the x86 hardware interrupt code. - The ihandlers array is now gone. Instead, there is a MI shandlers array that just contains SWI handlers. - Most of the former machine/ipl.h files have moved to a new sys/ipl.h. - Stub out all the spl*() functions on all architectures. Submitted by: dfr Notes: svn path=/head/; revision=66698
* Well, this works for me and I can now boot my PC164 again.Matt Jacob2000-09-111-34/+41
| | | | | | | Nobody said it broke their system. Notes: svn path=/head/; revision=65760
* A quick fix to get around a problem (described below) with cia basedAndrew Gallatin2000-09-022-3/+5
| | | | | | | | | | | | | | | | | | | | machines. The patch uses an existing global variable in place of the newbus accessor to get at use_bwx. This is a quick fix to get miatas booting again; somebody with more newbus skills than I can muster will have to correct it. Matt Jacob's description of the problem from the -alpha list: The IVAR accessor stuff for pcib is incompletely specified for CIA. There's only one accessor defined, and that's to get the BUS instance number. <..> The device methods that try and get at the use_bwx get overriden because there's only one ivar for CIA's pcib, and that's for hose #, and it's always zero. Notes: svn path=/head/; revision=65352
* Introduce explicit break statements in the various chipsets'Andrew Gallatin2000-08-316-0/+28
| | | | | | | | | | | | | foo_pcib_[read|write]_config() functions rather than relying on a break or return being in the CFG macro. This fixes a panic later in the boot process on a UP1000. From inspection, it looks like this fixes a similar problem in the tsunami code. Approved by: dfr Notes: svn path=/head/; revision=65297
* fix a typo introduced by Doug's busspace changes that causes UP1000s toAndrew Gallatin2000-08-311-1/+1
| | | | | | | | | crash very early in the boot process with a ksp not valid halt to the SRM. submitted by: dfr Notes: svn path=/head/; revision=65296
* * Completely rewrite the alpha busspace to hide the implementation fromDoug Rabson2000-08-2822-2209/+1467
| | | | | | | | | | | | | | | the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one. Notes: svn path=/head/; revision=65176
* Do the same thing for TurboLaser that was done for Rawhide- make roomMatt Jacob2000-07-101-1/+1
| | | | | | | | for secondary (bridged) PCI busses by making primary PCI instances 16 units apart. Notes: svn path=/head/; revision=62866
* Don't let the infrastructure assign the 'next' PCI bus for us.Matt Jacob2000-07-101-1/+1
| | | | | | | | | | Instead, for now (until we get a pci infrastructure cleanup), assign the PCI bus number to be mcpcia bus instance << 4. This is to allow secondary bridges some room to be recongnized on 4100 systems. Notes: svn path=/head/; revision=62862
* Support for unsigned integer and long sysctl variables. Update theJohn Baldwin2000-07-051-4/+4
| | | | | | | | | | | | SYSCTL_LONG macro to be consistent with other integer sysctl variables and require an initial value instead of assuming 0. Update several sysctl variables to use the unsigned types. PR: 15251 Submitted by: Kelly Yancey <kbyanc@posi.net> Notes: svn path=/head/; revision=62622
* Add support for the Alpha Processor, Inc. UP1000 system.Andrew Gallatin2000-06-194-0/+588
| | | | | | | | Reviewed by: dfr Thanks to: Alpha Processor Inc. for supplying the hardware. Notes: svn path=/head/; revision=61829
* Sometimes there isn't an ISA bus configured.Matt Jacob2000-06-121-0/+4
| | | | Notes: svn path=/head/; revision=61588
* Part of AS2100 support that I neglected to commit last nightAndrew Gallatin2000-05-281-0/+29
| | | | | | | pointed out by: dfr Notes: svn path=/head/; revision=61052
* Add AlphaServer 2000 (demi-sable), 2100 (sable), and 2100A (lynx) support.Andrew Gallatin2000-05-283-0/+917
| | | | | | | | | | | | Only PCI and on-board ISA peripherials are supported at this time. This support has been only lightly tested due to a lack of response to my call for testers on the freebsd-alpha mailing list. It works quite well on the one AS2100 on which it has been tested, but it may not work on an AS2100A and should therefore be regarded as experimental. Notes: svn path=/head/; revision=60989
* Handle PCI devices that actually use an ISA IRQ for the cia and tsunamiJohn Baldwin2000-05-103-5/+51
| | | | | | | | | | | chipsets. An example of this is the USB controller on these chipsets. With this, I can now use USB devices on the test Alpha I am borrowing at the moment. Reviewed by: dfr, obrien Notes: svn path=/head/; revision=60334
* add in stubbie mcpcia_pci that will parent PCI bussesMatt Jacob2000-05-071-0/+80
| | | | Notes: svn path=/head/; revision=60118
* Add $FreeBSD$Peter Wemm2000-05-014-0/+4
| | | | Notes: svn path=/head/; revision=59874
* Alpha 8200: Add in a dummy child of dwlpx so that we can make the leapMatt Jacob2000-03-181-0/+80
| | | | | | | | | from DWLPX to PCI space. Just a methods holder such that we have a parent which is a "pcib" and we create a child which is a "pci". Add the appropriate ivar code (which is for a hose #). Notes: svn path=/head/; revision=58211
* Alpha 8200: Do some compilation cleanup. Conditionalize some IDE stuffMatt Jacob2000-03-181-6/+35
| | | | | | | | | | | | | | based upon presence/absence of ISA (there is no ISA bus on an 8200- okay, well, there *could* be one in a DWLPX tray, but we don't support it)). Most importantly change the interrupt resource map to cover a whole 16 bits. The 8200 uses 16 bit interrupt vectors which we construct that contain the I/O-board, hose, an pci slot in them, and then we write these vectors into the appropriate DWLPX registers. At any rate, a flat array of 64 'IRQs' isn't enough. Notes: svn path=/head/; revision=58210
* Update the ata driver to take more advantage of newbus, thisSøren Schmidt2000-02-181-14/+23
| | | | | | | | | | | | | | | | | | | was needed to make attach/detach of devices work, which is needed for the PCCARD support. (PCCARD support is still not working though, more to come on that) Support the CMD646 chip which is used on many alphas, sadly only in WDMA2 mode, as the silicon is broken beyond belief for UDMA modes. Lots of cosmetic fixes here and there. Sorry for the size of this megapatchfromhell but it was not possible otherwise... newbus patches based on work from: dfr (Doug Rabson) Notes: svn path=/head/; revision=57325
* Make devices behind PPBs work on DS10s (and any other single pchip tsunamis)Andrew Gallatin2000-01-201-9/+1
| | | | | | | | | I was wagering on DEC being elegant & numbering PCI buses normally on machines with one pchip. It looks like they went with consistent -- buses behind ppbs begin with bus 2. Notes: svn path=/head/; revision=56338
* Improve the mapping between the hardware PCI bus numbering on multi-hoseAndrew Gallatin1999-12-142-17/+81
| | | | | | | | | | | | | | | | | tsunami systems and the PCI bus-numbering system of FreeBSD. Eg, the former allows for 2 PCI bus 2's (one each on hoses 0 and 1) while the latter needs to give each PCI bus a unique monotonically increasing number. It has been fairly well tested and correctly maps machines with a ppb on hose 1 as well as machines with ppbs on both hoses. DS10s remain untested, as I do not have a pci card with a ppb which will pass POST in a tsunami. This is a house of cards. Notes: svn path=/head/; revision=54603
* Remove the 'ivars' arguement to device_add_child() andMatthew N. Dodd1999-12-038-8/+10
| | | | | | | | | | | | | | | | | | | device_add_child_ordered(). 'ivars' may now be set using the device_set_ivars() function. This makes it easier for us to change how arbitrary data structures are associated with a device_t. Eventually we won't be modifying device_t to add additional pointers for ivars, softc data etc. Despite my best efforts I've probably forgotten something so let me know if this breaks anything. I've been running with this change for months and its been quite involved actually isolating all the changes from the rest of the local changes in my tree. Reviewed by: peter, dfr Notes: svn path=/head/; revision=54073
* Mchines whose interrupts are not routed through the ISA pic were stillAndrew Gallatin1999-11-161-3/+11
| | | | | | | | | | | | | | | | | registering their interrupts with rman as though they were going through the ISA pic. This prevents a conflict between isa & pci for irqs on such machines. Also hookup the chipset struct before calling platform.pci_intr_init(). This allows me to call inw/outw down in the platform code. Add interrupt printfs to match the CIA chipset. Reviewed by: dfr Tested by: wilko Notes: svn path=/head/; revision=53222
* Add a second direct map window to increase the maximum RAM this platformAndrew Gallatin1999-11-031-28/+43
| | | | | | | | | | can deal with from 1GB to 2GB. I have no way to test with >1GB because I don't have high enough density memory to get any one box over 1GB. However, I have tested it on xp1000 & ds10 with < 1GB of memory & have verified that it does no harm. Notes: svn path=/head/; revision=52818
* useracc() the prequel:Poul-Henning Kamp1999-10-294-4/+0
| | | | | | | | | | | | | | Merge the contents (less some trivial bordering the silly comments) of <vm/vm_prot.h> and <vm/vm_inherit.h> into <vm/vm.h>. This puts the #defines for the vm_inherit_t and vm_prot_t types next to their typedefs. This paves the road for the commit to follow shortly: change useracc() to use VM_PROT_{READ|WRITE} rather than B_{READ|WRITE} as argument. Notes: svn path=/head/; revision=52635
* * Implement bus_set/get/delete_resource for pci.Doug Rabson1999-10-141-15/+6
| | | | | | | | | | * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary. Notes: svn path=/head/; revision=52243
* allow pci_ioctl to work with multi-hose alphas.Andrew Gallatin1999-10-123-5/+27
| | | | | | | | | | | Rather than teaching pci_ioctl about hoses, we just pass down a magic number & let the platform code figure out what the hose is based on what the bus number is. concept approved by dfr Notes: svn path=/head/; revision=52175
* This fix allows cards inserted in one of the bottem-most slots on an xp1000Andrew Gallatin1999-09-301-2/+2
| | | | | | | | | | | | | | | (behind the built-in ppb on hose 1) to be found: When testing the adaptec controller on alpha, I realized I misread the xp1000 documentation and the way I'm calculating the bus number for PCI config space accesses on the tsunami is wrong. I had thought that a bus behind a ppb should be numbered as the nth bus in that hose, but it actually needs to be the nth global bus within the system. The bus number for the primary bus on a hose must always remain 0 when calculating config space addresses. Notes: svn path=/head/; revision=51823
* $Id$ -> $FreeBSD$ (some mangled and/or hidden ones)Peter Wemm1999-08-281-1/+1
| | | | Notes: svn path=/head/; revision=50481
* $Id$ -> $FreeBSD$Peter Wemm1999-08-2815-15/+15
| | | | Notes: svn path=/head/; revision=50477
* Some very minor changes to the ISA dma code.Doug Rabson1999-08-251-3/+3
| | | | Notes: svn path=/head/; revision=50339
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