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* MFC r302988:Luiz Otavio O Souza2016-08-051-0/+1
| | | | | | | | | | | | | | Fix a random memory overwrite at boot time, simplebus_init() and simplebus_add_device() expect a simplebus_softc structure associated with the device. Add the simplebus_softc as first member in am335x_pwmss_softc structure. Sponsored by: Rubicon Communications (Netgate) Approved by: re (gjb) Notes: svn path=/stable/11/; revision=303772
* Disable debugging options in arm configurations.Ian Lepore2016-07-212-48/+0
| | | | | | | Approved by: re (gjb) Notes: svn path=/stable/11/; revision=303163
* MFC r302502, r302505:Ian Lepore2016-07-1551-692/+62
| | | | | | | | | | | Consolidate debugging options from all arm kernel configs to std.arm[v6]. Correct syntax errors that only show up when compiled with INVARIANTS. Approved by: re (gjb) Notes: svn path=/stable/11/; revision=302915
* Fix a lockup in tx path for cspw.Luiz Otavio O Souza2016-07-072-1/+18
| | | | | | | | | | | | | | | Sometimes the software loses the race when appending more descriptors to the tx ring and the tx queue stops. This commit detects this condition and restart the tx queue whenever it stall. Tested by: sobomax@, Keith White <kwhite@site.uottawa.ca>, Paul Mather <paul@gromit.dlib.vt.edu> Sponsored by: Rubicon Communications (Netgate) Approved by: re (kib) Notes: svn path=/head/; revision=302394
* Revert the recent armv6 changes to ALIGNED_POINTER(), restoring theIan Lepore2016-06-211-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | fully-pessimized implementation that requires a type to be aligned to its natural size. On armv6+ the compiler might generate load-/store-multiple instructions which require 4-byte alignment even though the source code is only accessing individual uint32_t values in a way that doesn't require any particular alignment at all. The compiler apparently feels free to combine multiple accesses into a single instruction that requires a more-strict alignment, and no set of compiler flags seems to disable this behavior (at least in clang 3.8). This fixes alignment faults on arm systems using wifi adapters. The wifi code uses ALIGNED_POINTER(p, uint32_t) to decide whether it needs to copy-align tcp headers. Because clang is combining several uint32_t accesses into a single ldm instruction, we need to say that accessing a uint32_t requires 4-byte alignment. Approved by: re(gjb) Notes: svn path=/head/; revision=302064
* Update comments for the MD functions managing contexts for newKonstantin Belousov2016-06-162-13/+12
| | | | | | | | | | | | | | | | | | | threads, to make it less confusing and using modern kernel terms. Rename the functions to reflect current use of the functions, instead of the historic KSE conventions: cpu_set_fork_handler -> cpu_fork_kthread_handler (for kthreads) cpu_set_upcall -> cpu_copy_thread (for forks) cpu_set_upcall_kse -> cpu_set_upcall (for new threads creation) Reviewed by: jhb (previous version) Sponsored by: The FreeBSD Foundation MFC after: 1 week Approved by: re (hrs) Differential revision: https://reviews.freebsd.org/D6731 Notes: svn path=/head/; revision=301961
* Move the arm call to intr_pic_init_secondary earlier in the secondary CPUAndrew Turner2016-06-141-1/+3
| | | | | | | | | | | | | initialisation. This ensures it will complete before signalling to the boot CPU it has booted. This fixes a race with the GIC where the arm_gic_map may not be populated before it is used to bind interrupts leading to some interrupts becoming bound to no CPUs. Approved by: re (kib) Sponsored by: ABT Systems Ltd Notes: svn path=/head/; revision=301890
* Do not define __NO_STRICT_ALIGNMENT for armv6. While the requirementsIan Lepore2016-06-131-4/+0
| | | | | | | | | | | | | | | | | | | | | are no longer natural-alignment strict, there are still some restrictions. FreeBSD network code assumes data is naturally-aligned or is running on a platform with no restrictions; pointers are not annotated to indicate the data pointed to may be packed or unaligned. The clang optimizer can sometimes combine the load or store of a pair of adjacent 32-bit values into a single doubleword load/store, and that operation requires at least 4-byte alignment. __NO_STRICT_ALIGNMENT can lead to tcp headers being only 2-byte aligned. Note that alignment faults remain disabled on armv6, this change reverts only the defining of the symbol which leads to some overly-agressive code shortcuts when building common/shared drivers and network code for arm. Approved by: re(kib) Notes: svn path=/head/; revision=301872
* Remove the ARMv4/ARMv5 userland atomic support from struct proc on armv6.Andrew Turner2016-06-082-0/+4
| | | | | | | | | | Nothing should use this on armv6 as we use the atomic instructions added in ARMv6k. Sponsored by: ABT Systems Ltd Notes: svn path=/head/; revision=301700
* Start to clean MIDR values using the CPUID scheme. We don't need to knowAndrew Turner2016-06-072-34/+46
| | | | | | | | | | | | the exact CPU we are running on to set the cpu functions. Relax the check to ignore the CPU revision. Even so this may still be too specific. Reviewed by: mmel Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D6504 Notes: svn path=/head/; revision=301561
* INTRNG - change the way how an interrupt mapping data are providedSvatopluk Kraus2016-06-051-0/+4
| | | | | | | | | | | to the framework in OFW (FDT) case. This is a follow-up to r301451. Differential Revision: https://reviews.freebsd.org/D6634 Notes: svn path=/head/; revision=301453
* tegra124: use roundup/rounddown macros from <sys/param.h>.Pedro F. Giffuni2016-06-031-2/+2
| | | | Notes: svn path=/head/; revision=301288
* Use nitems() macro instead of re-inventing itZbigniew Bodek2016-06-031-1/+1
| | | | | | | | | | | Fixed after r301221. Pointed out by: oshogbo Submitted by: Michal Stanek <mst@semihalf.com> Obtained from: Semihalf Notes: svn path=/head/; revision=301281
* Define irq variable only in the block where used.Svatopluk Kraus2016-06-031-7/+4
| | | | Notes: svn path=/head/; revision=301267
* Postpone allocation of IRQ resource to the time when interruptSvatopluk Kraus2016-06-031-3/+11
| | | | | | | | | | | | | | | controller devices are attached. This has already been done for bus_setup_intr(). There was no doubt that if someone wants to setup an interrupt, corresponding interrupt controller device must already be attached. However, the same must be valid for allocation of an interrupt resource unless the allocation is done blindly, without any information that such interrupt even exists. While it was done this blind way before, it won't be possible after next INTRNG change. Notes: svn path=/head/; revision=301266
* Add support for CESA on Armada38xZbigniew Bodek2016-06-021-0/+5
| | | | | | | | | | | | | | | | Changes: - added new SoC ID in CESA attach - allowed crypto driver IDs other than 0 - added CESA nodes to Armada38x .dts files - enabled required devices in kernconf Submitted by: Michal Stanek <mst@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D6220 Notes: svn path=/head/; revision=301225
* Configure CPU window to second CESA SRAMZbigniew Bodek2016-06-022-0/+44
| | | | | | | | | | | | | | Check if there is a second CESA SRAM node in FDT and add a CPU window for it. Define A38X specific macro for setting device attribute for each node. Submitted by: Michal Stanek <mst@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D6216 Notes: svn path=/head/; revision=301221
* Map CESA SRAM memory in driver attach for Armada38xZbigniew Bodek2016-06-021-1/+1
| | | | | | | | | | | | | | | | | | On other platforms with CESA accelerator the SRAM memory is mapped in early init before driver is attached. This method only works correctly with mappings no smaller than L1 section size (1MB). There may be more SRAM blocks and they may have smaller sizes than 1MB as is the case for Armada38x. Instead, map SRAM memory with bus_space_map() in CESA driver attach. Note that we can no longer assume that VA == PA for the SRAM. Submitted by: Michal Stanek <mst@semihalf.com Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D6215 Notes: svn path=/head/; revision=301220
* Fix a crash while iterating compat strings when no match is found.Jared McNeill2016-05-311-1/+1
| | | | | | | Spotted by: ian Notes: svn path=/head/; revision=301082
* arm_gic_map is a mask not the CPUs ID, there is no need to shift it.Andrew Turner2016-05-311-1/+1
| | | | | | | | | Pointy-hat to: andrew Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Notes: svn path=/head/; revision=301062
* Bin interrupts to the correct CPU when we boot on a non-zero CPU.Andrew Turner2016-05-311-1/+1
| | | | | | | | Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Notes: svn path=/head/; revision=301060
* Improve ARM debug_monitor for SMP machinesZbigniew Bodek2016-05-293-53/+65
| | | | | | | | | | | | | | - Reset debug architecture and enable monitor for secondary CPUs in init_secondary() rather than when configuring watchpoint, etc. - Disable HW debugging capabilities when one of the CPU cores fails to set up. - Use dbg_capable() in a more atomic manner to avoid any mismatch between CPUs. Differential Revision: https://reviews.freebsd.org/D6009 Notes: svn path=/head/; revision=300969
* Fix debug_monitor code for older ARMs (ARM11)Zbigniew Bodek2016-05-291-75/+29
| | | | | | | | | | | | | | | | - Enable monitor mode prior to accessing watchpoint registers for v6, v6.1 architectures. - Fix configuration scheme for v6, v6.1 and v7 Debug Archs - Enable monitor unconditionally and for good instead of enabling and disabling it (needed for single stepping on on v6/v6.1) Tested on RPI-B and Arndale Differential Revision: https://reviews.freebsd.org/D6008 Notes: svn path=/head/; revision=300968
* ARM GIC: Allow to setup interrupt without configuration data.Michal Meloun2016-05-291-2/+5
| | | | | | | | In some cases, like for PCI devices, only interrupt numbers are enumerated from HW. In this case, use INTR_foo_CONFORM as level and trigger values. Notes: svn path=/head/; revision=300951
* Add support for triggering interrupts on both rising and falling edges.Ian Lepore2016-05-261-39/+67
| | | | | | | Also, EOI a gpio interrupt in the post_ithread routine before re-enabling. Notes: svn path=/head/; revision=300786
* Add support for interrupts, sensors and GPIO for AXP209 PMIC.Emmanuel Vadot2016-05-262-42/+692
| | | | | | | | | | | | | | | | | | | | Pressing the PEK (power enable key) will shutdown the board. Some events are reported to devd via system "PMU" and subsystem "Battery", "AC" and "USB" such as connected/disconnected. Some sensors values (power source voltage/current) are reported via sysctl (dev.axp209_pmu.X.) It also expose a gpioc node usable in kernel and userland. Only 3 of the 4 GPIO are exposed (The GPIO3 is different and mostly unused on boards). Most popular boards uses GPIO1 as a sense pin for OTG power. Add a dtsi file that adds gpio-controller capability to the device as upstream doesn't defined it and include it in our custom DTS. Reviewed by: jmcneill Approved by: cognet (mentor) Differential Revision: https://reviews.freebsd.org/D6135 Notes: svn path=/head/; revision=300777
* Only do the touch screen setup when the 'ti,wires' property is present.Luiz Otavio O Souza2016-05-261-2/+2
| | | | | | | While here fix a typo in a debug message. Notes: svn path=/head/; revision=300769
* Enable USB PHY regulators when requested by the host controller driver.Jared McNeill2016-05-262-13/+115
| | | | | | | | | Previously the USB PHY driver would enable all regulators at attach time. This prevented boards from booting when powered by the USB OTG port, as it didn't take VBUS presence into consideration. Notes: svn path=/head/; revision=300728
* Another round of changes to add compatibility with the older ESHDC varietyIan Lepore2016-05-261-82/+160
| | | | | | | | | | | | | | | | | | | | of hardware. Mostly this focuses on the big changes needed for setting the bus clock, because ESDHC is SDHCI v2.0 and USDHC is 3.0, and the number, location, and interpretation of clock divisor bits is vastly different between the two. This doesn't get the device all the way to functioning on ESDHC hardware yet, but it's much closer, now getting through all the card detection and negotiation of capabilties and speed (but it eventually hangs on what appears to be a missing interrupt). Another missing chunk of code for handling ESDHC's 32 bit command-and-mode register using sdhci's pair of 16 bit writes is added. This also does some leading whitespace cleanups and sorts some softc struct members by size, and adds some comments (because when do I ever touch code without adding comments?). Notes: svn path=/head/; revision=300709
* Disable alignment faults on armv6, adjust various alignment-related macrosIan Lepore2016-05-264-2/+18
| | | | | | | | | | | | to match the new state of affairs. The hardware we support has always been able to do unaligned accesses, we've just never enabled it until now. This brings FreeBSD into line with all the other major OSes, and should help with the growing volume of 3rd-party software that assumes unaligned access will just work on armv6 and armv7. Notes: svn path=/head/; revision=300701
* Include machine/acle-compat.h in cdefs.h on arm if the compiler doesn'tIan Lepore2016-05-2539-48/+0
| | | | | | | | | | | | | | | | | | | | | | | | | have ACLE support built in. The ACLE (ARM C Language Extensions) defines a set of standardized symbols which indicate the architecture version and features available. ACLE support is built in to modern compilers (both clang and gcc), but absent from gcc prior to 4.4. ARM (the company) provides the acle-compat.h header file to define the right symbols for older versions of gcc. Basically, acle-compat.h does for arm about the same thing cdefs.h does for freebsd: defines standardized macros that work no matter which compiler you use. If ARM hadn't provided this file we would have ended up with a big #ifdef __arm__ section in cdefs.h with our own compatibility shims. Remove #include <machine/acle-compat.h> from the zillion other places (an ever-growing list) that it appears. Since style(9) requires sys/types.h or sys/param.h early in the include list, and both of those lead to including cdefs.h, only a couple special cases still need to include acle-compat.h directly. Loves it: imp Notes: svn path=/head/; revision=300694
* Add more info about the issue fixed in r298460. Rephrase some sentencesSvatopluk Kraus2016-05-251-8/+15
| | | | | | | | | | | | and fix grammar. No functional change. Suggested by: alc Reviewed by: alc Notes: svn path=/head/; revision=300674
* Spaces->tab in comment.Ian Lepore2016-05-231-1/+1
| | | | Notes: svn path=/head/; revision=300535
* Oops, fix a paste-o commited in r300533.Ian Lepore2016-05-231-1/+1
| | | | Notes: svn path=/head/; revision=300534
* Use the new(-ish) CP15_SCTLR macro to generate system control reg accessesIan Lepore2016-05-2310-43/+41
| | | | | | | | | | | | where possible. In the places that doesn't work (multi-line inline asm, and places where the old armv4 cpufuncs mechanism is used), annotate the accesses with a comment that includes SCTLR. Now a grep -i sctlr can find all the system control register manipulations. No functional changes. Notes: svn path=/head/; revision=300533
* INTRNG - support new interrupt mapping type INTR_MAP_DATA_GPIOSvatopluk Kraus2016-05-231-25/+65
| | | | | | | | | introduced in r298738. Reviewed by: ian Notes: svn path=/head/; revision=300529
* INTRNG - use gpio generic interrupt modes definitions added in r298738.Svatopluk Kraus2016-05-231-47/+31
| | | | | | | Reviewed by: ian Notes: svn path=/head/; revision=300528
* Fix the deciKelvin to Celsius conversion in kernel.Luiz Otavio O Souza2016-05-224-4/+4
| | | | | | | | | | | | | | After r285994, sysctl(8) was fixed to use 273.15 instead of 273.20 as 0C reference and as result, the temperature read in sysctl(8) now exibits a +0.1C difference. This commit fix the kernel references to match the reference value used in sysctl(8) after r285994. Sponsored by: Rubicon Communications (Netgate) Notes: svn path=/head/; revision=300421
* INTRNG - implement pic_post_filter method. This method is fundamentalSvatopluk Kraus2016-05-221-0/+6
| | | | | | | | one and must always be implemented for a PIC. There is no default for it intentionally. Notes: svn path=/head/; revision=300410
* Fix some format strings to make them either correct or uniform.Svatopluk Kraus2016-05-221-3/+3
| | | | | | | No functional change. Notes: svn path=/head/; revision=300409
* Adjust _ALIGNBYTES to the proper value for arm and armv6 arches. ModernIan Lepore2016-05-211-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | compilers can emit arm instructions that require 8-byte alignment. The alignment-sensitive instructions were added in armv5, which has to be supported by our combined v4/v5 kernels, so the value is set uncoditionally for all arm architecture versions. Also adjust the comment to explain in more detail why the macros have the form and values they do. Per advice from bde@, maintain the unsignedness of the value of _ALIGNBYTES (but do so using his second choice of allowing sizeof() to supply the unsignedness, rather than just hardcoding '8U', which in my mind would require an even more verbose comment to explain why it's right). Also explain in the comment that the resulting type of _ALIGN() is equivelent to uinptr_t on arm (32-bit unsigned int), but it's purposely spelled as "unsigned" to avoid problems with including other header files. Even including machine/_types.h to allow use of __uintptr_t causes compilation failures because of this header being included (indirectly) in asm code. The discussion that led to this change (albeit at a glacial pace) is at https://lists.freebsd.org/pipermail/svn-src-head/2014-November/064593.html Notes: svn path=/head/; revision=300375
* Remove hf appending code from param.h for machine arch name.Warner Losh2016-05-201-7/+1
| | | | | | | Submitted by: ian@ andyt@ Notes: svn path=/head/; revision=300324
* Use OF_prop_free instead of direct call to free(9)Oleksandr Tymoshenko2016-05-186-17/+17
| | | | | | | Reviewed by: ganbold Notes: svn path=/head/; revision=300175
* Return the struct intr_pic pointer from intr_pic_register. This will beAndrew Turner2016-05-1812-21/+36
| | | | | | | | | | | needed in later changes where we may not be able to lock the pic list lock to perform a lookup, e.g. from within interrupt context. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation Notes: svn path=/head/; revision=300149
* Implement atomic_cmpset_acq_64 and atomic_cmpset_rel_64 on arm and armeb.Andrew Turner2016-05-181-0/+2
| | | | | | | | | This should allow r300113 to build there. Sponsored by: ABT Systems Ltd Notes: svn path=/head/; revision=300144
* Add driver for "generic-ohci" as defined by FDT.Emmanuel Vadot2016-05-173-2/+4
| | | | | | | | | | | | | | | If platform support EXT_RESOURCES, clocks and resets are handled out of the box. If not driver can be subclassed using the generic_usb interface. generic_usb name was choosed because at one point I'll add generic-ehci FDT driver. Reviewed by: jmcneill, hselasky Approved by: andrew (mentor) Differential Revision: https://reviews.freebsd.org/D5481 Notes: svn path=/head/; revision=300068
* The GIC (v2 at least) has a bit in the TYPER register to indicate whether ↵Bjoern A. Zeeb2016-05-171-5/+11
| | | | | | | | | | | | | | | | | | the GIC supports the Security Extensions or not. This bit is not the same as the CPU one. Currently we are not checking for either before trying to write to the special registers. This can lead to problems on hardware or simulators that do not provide the security extensions. Add the missing checks. Their interactions with the CPU flag is not entirely clear to me but using a macro will make it easier to quickly adjust the condition once the CPU bits are sorted as well. Reviewed by: br Sponsored by: DARPA/AFRL Differential Revision: https://reviews.freebsd.org/D6397 Notes: svn path=/head/; revision=300051
* Don't repeat the the word 'the'Eitan Adler2016-05-173-3/+3
| | | | | | | | | | (one manual change to fix grammar) Confirmed With: db Approved by: secteam (not really, but this is a comment typo fix) Notes: svn path=/head/; revision=300050
* Add HWPMC_HOOKS to std.armv6 to make them availableBjoern A. Zeeb2016-05-162-1/+1
| | | | | | | | | | | | so the module could be loaded. Discussed with: andrew Reviewed by: andrew Sponsored by: DARPA/AFRL Differential Revision: https://reviews.freebsd.org/D6359 Notes: svn path=/head/; revision=299963
* Introduce MSI and MSI-X support to intrng. This adds a new msi deviceAndrew Turner2016-05-161-20/+246
| | | | | | | | | | | | | | | interface with 5 methods to mirror the 5 MSI/MSI-X methods in the pcib interface. The pcib driver will need to perform a device specific lookup to find the MSI controller and pass this to intrng as the xref. Intrng will finally find the controller and have it handle the requested operation. Obtained from: ABT Systems Ltd MFH: yes Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D5985 Notes: svn path=/head/; revision=299928
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