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* alc_rev was used without initialization such that it failed toPyun YongHyeon2011-01-311-1/+1
| | | | | | | | | | apply AR8152 v1.0 specific initialization code. Fix this bug by explicitly reading PCI device revision id via PCI accessor. Reported by: Gabriel Linder ( linder.gabriel <> gmail dot com ) Notes: svn path=/head/; revision=218141
* Fix logic error. Due to the bug, it incorrectly checked TXQ statusPyun YongHyeon2011-01-281-1/+1
| | | | | | | | | | which in turn can leave TXQ active. Submitted by: Brad ( brad <> comstyle dot com ) MFC after: 3 days Notes: svn path=/head/; revision=218038
* Correct wrong definition of PM timer mask and adjust L1/PM timerPyun YongHyeon2011-01-202-4/+16
| | | | | | | | | | | | value. While I'm here enable all clocks before initializing controller. This change should fix lockup issue seen on AR8152 v1.1 PCIe Fast Ethernet controller. PR: kern/154076 MFC after: 3 days Notes: svn path=/head/; revision=217649
* - Move ether_ifdetach() earlier and remove now-unneeded IN_DETACH flag.John Baldwin2011-01-132-7/+8
| | | | | | | | | - Expand locking in interrupt handler. Reviewed by: yongari Notes: svn path=/head/; revision=217379
* Make sure to invoke unlocked foo_start since the taskqueue does notPyun YongHyeon2011-01-121-1/+1
| | | | | | | | | | hold a driver lock. This should fix a regression introduced in r216925. PR: kern/153769 Notes: svn path=/head/; revision=217331
* sysctl(9) cleanup checkpoint: amd64 GENERIC builds cleanly.Matthew D Fleming2011-01-121-1/+1
| | | | | | | Commit the rest of the devices. Notes: svn path=/head/; revision=217323
* Add a 'locked' variant of the foo_start() routine and call it directlyJohn Baldwin2011-01-032-17/+12
| | | | | | | | | | | from interrupt handlers and watchdog routines instead of queueing a task to call foo_start(). Reviewed by: yongari MFC after: 1 month Notes: svn path=/head/; revision=216925
* Remove unecessary and clearly wrong usage of atomic(9).Pyun YongHyeon2010-12-101-4/+4
| | | | | | | Reported by: avg, jhb, attilio Notes: svn path=/head/; revision=216362
* Enable ethernet flow-control on all alc(4) controllers. This changePyun YongHyeon2010-11-261-3/+1
| | | | | | | should reduce a lot of dropped frames under high network load. Notes: svn path=/head/; revision=215850
* Don't bother to enable ASPM L1 to save more power. Even though I amPyun YongHyeon2010-10-301-1/+1
| | | | | | | | | | | | | not able to trigger the issue with sample boards, some users seems to suffer from freeze/lockup when system is booted without UTP cable plugged in. I'm not sure whether this is BIOS issue or controller bug. This change fixes AR8132 lockup issue seen on EEE PC. Reported by: kmoore Tested by: kmoore Notes: svn path=/head/; revision=214542
* Convert the PHY drivers to honor the mii_flags passed down and convertMarius Strobl2010-10-151-9/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | the NIC drivers as well as the PHY drivers to take advantage of the mii_attach() introduced in r213878 to get rid of certain hacks. For the most part these were: - Artificially limiting miibus_{read,write}reg methods to certain PHY addresses; we now let mii_attach() only probe the PHY at the desired address(es) instead. - PHY drivers setting MIIF_* flags based on the NIC driver they hang off from, partly even based on grabbing and using the softc of the parent; we now pass these flags down from the NIC to the PHY drivers via mii_attach(). This got us rid of all such hacks except those of brgphy() in combination with bce(4) and bge(4), which is way beyond what can be expressed with simple flags. While at it, I took the opportunity to change the NIC drivers to pass up the error returned by mii_attach() (previously by mii_phy_probe()) and unify the error message used in this case where and as appropriate as mii_attach() actually can fail for a number of reasons, not just because of no PHY(s) being present at the expected address(es). Reviewed by: jhb, yongari Notes: svn path=/head/; revision=213893
* Make sure to not use stale ip/tcp header pointers. The ip/tcpPyun YongHyeon2010-10-141-0/+2
| | | | | | | | | | | | | | header parser uses m_pullup(9) to get access to mbuf chain. m_pullup(9) can allocate new mbuf chain and free old one if the space left in the mbuf chain is not enough to hold requested contiguous bytes. Previously drivers can use stale ip/tcp header pointer if m_pullup(9) returned new mbuf chain. Reported by: Andrew Boyer (aboyer <> averesystems dot com) MFC after: 10 days Notes: svn path=/head/; revision=213844
* Backout r204230. TX mbuf parser for VLAN is still required toPyun YongHyeon2010-10-141-7/+25
| | | | | | | enable TX checksum offloading if VLAN hardware tagging is disabled. Notes: svn path=/head/; revision=213842
* status bits should be &'ed against status to be really functional.Xin LI2010-09-161-2/+2
| | | | | | | | | Reported by: Jike Song Reviewed by: yongari MFC after: 1 week Notes: svn path=/head/; revision=212764
* Make sure to disable RX MAC in alc_stop_mac(). Previously therePyun YongHyeon2010-08-131-1/+1
| | | | | | | was a logic error which it always enabled RX MAC. Notes: svn path=/head/; revision=211285
* Add support for Atheros AR8151/AR8152 PCIe gigabit/fast ethernetPyun YongHyeon2010-08-093-99/+388
| | | | | | | | | | | | | | | | | | | controller. These controllers are known as L1D(AR8151) and L2CB/B2(AR8152). This change adds supports for the following controllers. o AR8151 v1.0(L1D) gigabit ethernet controller o AR8151 v2.0(L1D) gigabit ethernet controller o AR8152 v1.1(L2CB) fast ethernet controller o AR8152 v2.0(L2CB2) fast ethernet controller These controllers have the same feature of AR8131/AR8132 and support improved power saving control. The user visible change at this moment is reduced jumbo frame size from 9KB to 6KB. Many thanks to Atheros for continuing to support FreeBSD. HW donated by: Atheros Communications, Inc. Notes: svn path=/head/; revision=211105
* Cache PCIY_PMG and PCIY_EXPRESS capability pointer to softc and usePyun YongHyeon2010-08-082-10/+17
| | | | | | | it instead of calling pci_find_extcap(). Notes: svn path=/head/; revision=211053
* Remove unnecessary assignment.Pyun YongHyeon2010-08-081-1/+0
| | | | Notes: svn path=/head/; revision=211052
* Always disable ASPM L0s and enable L1 before entering into WOLPyun YongHyeon2010-08-081-12/+10
| | | | | | | | | suspend state. Also disable master clock after PHY power down, this is supposed to save more power. The master clock should be enabled if WOL is active. Notes: svn path=/head/; revision=211051
* Do not touch CMB TX threshold register when CMB is not used.Pyun YongHyeon2010-08-071-3/+3
| | | | | | | Note, alc(4) does not use CMB at all due to silicon bug. Notes: svn path=/head/; revision=211048
* Controller does not seem to support more than 1024 bytes DMA burst.Pyun YongHyeon2010-08-071-0/+4
| | | | | | | Limit DMA burst size to be less than or equal to 1024 bytes. Notes: svn path=/head/; revision=211047
* Reduce Tx interrupt moderation timer from 50ms to 1ms. The defaultPyun YongHyeon2010-08-061-2/+2
| | | | | | | | | | value resulted in poor performance for UDP packets. With this change, UDP bulk transfer performance is more than 940Mbps. While I'm here fix a wrong register definition. Notes: svn path=/head/; revision=210904
* With r206844, CSUM_TCP is also set for CSUM_TSO case. ModifyPyun YongHyeon2010-04-191-22/+22
| | | | | | | | drivers to take into account for the change. Basically CSUM_TSO should be checked before checking CSUM_TCP. Notes: svn path=/head/; revision=206876
* Remove Tx mbuf parsing code for VLAN in TSO path. Controller doesPyun YongHyeon2010-02-221-25/+5
| | | | | | | | not support TSO over VLAN if VLAN hardware tagging is disabled so there is no need to check VLAN here. Notes: svn path=/head/; revision=204230
* Add TSO support on VLANs. Also make sure to update TSO capabilityPyun YongHyeon2010-02-221-13/+3
| | | | | | | | | whenever jumbo frame is configured. While I'm here remove unnecessary check of VLAN hardware checksum offloading. vlan(4) already takes care of this. Notes: svn path=/head/; revision=204228
* Fix multicast handling. All Atheros controllers use big-endian formPyun YongHyeon2009-09-291-1/+1
| | | | | | | | | in computing multicast hash. PR: kern/139137 Notes: svn path=/head/; revision=197627
* For AR8132 fast ethernet controller, do not report 1000baseTPyun YongHyeon2009-09-281-0/+10
| | | | | | | | | | | | | capability to mii(4). Even though AR8132 uses the same model/ revision number of F1 gigabit PHY, the PHY has no ability to establish 1000baseT link. I have no idea why Atheros use the same device/model id for this PHY. With this change atphy(4) does not report 1000baseT media capability and manual 1000baseT configuration is also disabled which is more desirable behavior for 10/100Mbps PHY. Notes: svn path=/head/; revision=197600
* Don't try to power down PHY when alc(4) failed to map the device.Pyun YongHyeon2009-08-241-1/+2
| | | | | | | | | | | This fixes system crash when mapping alc(4) device failed in device attach. Reported by: Jim < stapleton.41 <> gmail DOT com > MFC after: 3 days Notes: svn path=/head/; revision=196517
* Free allocated Rx ring dma memory/tags.Kevin Lo2009-07-311-0/+15
| | | | | | | | Reviewed by: yongari@ Approved by: re (kib) Notes: svn path=/head/; revision=195989
* Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/Robert Watson2009-06-261-2/+2
| | | | | | | | | | | | | | | | IF_ADDR_UNLOCK() across network device drivers when accessing the per-interface multicast address list, if_multiaddrs. This will allow us to change the locking strategy without affecting our driver programming interface or binary interface. For two wireless drivers, remove unnecessary locking, since they don't actually access the multicast address list. Approved by: re (kib) MFC after: 6 weeks Notes: svn path=/head/; revision=195049
* Add alc(4), a driver for Atheros AR8131/AR8132 PCIe ethernetPyun YongHyeon2009-06-103-0/+4717
controller. These controllers are also known as L1C(AR8131) and L2C(AR8132) respectively. These controllers resembles the first generation controller L1 but usage of different descriptor format and new register mappings over L1 register space requires a new driver. There are a couple of registers I still don't understand but the driver seems to have no critical issues for performance and stability. Currently alc(4) supports the following hardware features. o MSI o TCP Segmentation offload o Hardware VLAN tag insertion/stripping o Tx/Rx interrupt moderation o Hardware statistics counters(dev.alc.%d.stats) o Jumbo frame o WOL AR8131/AR8132 also supports Tx checksum offloading but I disabled it due to stability issues. I'm not sure this comes from broken sample boards or hardware bugs. If you know your controller works without problems you can still enable it. The controller has a silicon bug for Rx checksum offloading, so the feature was not implemented. I'd like to say big thanks to Atheros. Atheros kindly sent sample boards to me and answered several questions I had. HW donated by: Atheros Communications, Inc. Notes: svn path=/head/; revision=193880
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