| Commit message (Collapse) | Author | Age | Files | Lines |
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svn path=/head/; revision=149368
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The workaround use PIO mode above ~137GB to allow using the disk.
Add the Acer chips with rev < 0xc4 as first candidate.
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svn path=/head/; revision=149191
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Docs kindly provided by Promise.
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svn path=/head/; revision=148992
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svn path=/head/; revision=148731
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Submitted by: Olivier Houchard
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svn path=/head/; revision=147230
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chips. The DMA timing value was set on device 0 for all devices :/
Prodded by: Harald Schmalzbauer
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svn path=/head/; revision=147201
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wrestle the older Promise chips to do 48bit addressing.
Spotted by: Martin Birgmeier
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svn path=/head/; revision=147187
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Most code by the submitters, hammered upon to get the right ATA fell by me.
Submitted by: Olivier Houchard
Submitted by: Jia-Shiun Li
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svn path=/head/; revision=147139
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HW sponsored by: Yahoo!
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svn path=/head/; revision=147019
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svn path=/head/; revision=147012
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The most prominent part is that its now possible to issue ata_requests
directly to say acd0, instead of going through the cumbersome /dev/ata
device.
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svn path=/head/; revision=146266
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svn path=/head/; revision=146178
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svn path=/head/; revision=146112
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For now just support the Intel ICH6 as that the HW at hand.
Sponsored by: pair.com
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svn path=/head/; revision=146106
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new HW that has new and different demands.
Fix a few nits in former commit in this cleanup crusade.
Sponsored by: pair.com
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svn path=/head/; revision=145818
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a channel device, not an ata device, or we'll be out of luck in
reset/timeout where we dont have a device.
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svn path=/head/; revision=145769
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all way through the code down the layers, instead of the mix'n'match that
resulted from the conversion done earlier.
Sponsored by: pair.com
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svn path=/head/; revision=145713
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Prepare for different looking controllers.
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svn path=/head/; revision=145641
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by the BIOS. It seems some BIOS's doesn't get this right, and that would
result in ATA panic'ing.
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svn path=/head/; revision=145498
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This broke on the changes done to get atapicam happy earlier.
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svn path=/head/; revision=145327
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svn path=/head/; revision=145191
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svn path=/head/; revision=145168
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the previous commit.
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svn path=/head/; revision=144915
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svn path=/head/; revision=144914
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Add the older nVidia nForce2 SATA chip to supported HW.
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svn path=/head/; revision=144861
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This code is done blindfolded as I dont have such HW here, so reports
of success/failure are most welcome.
More SATA PHY cleanups.
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svn path=/head/; revision=144808
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each SATA chip.
Promise and Silicon Image are the current candidates for this.
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svn path=/head/; revision=144790
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layout. No functional changes.
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svn path=/head/; revision=144707
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Update ALi PATA support to handle ATA133 as well
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svn path=/head/; revision=144667
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controller device. This helps when there is no controller parent
to a channel (PPC port).
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svn path=/head/; revision=144397
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that was left our by accident.
Prodded by: Patrik Backlund
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svn path=/head/; revision=144382
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o ATA is now fully newbus'd and split into modules.
This means that on a modern system you just load "atapci and ata"
to get the base support, and then one or more of the device
subdrivers "atadisk atapicd atapifd atapist ataraid".
All can be loaded/unloaded anytime, but for obvious reasons you
dont want to unload atadisk when you have mounted filesystems.
o The device identify part of the probe has been rewritten to fix
the problems with odd devices the old had, and to try to remove
so of the long delays some HW could provoke. Also probing is done
without the need for interrupts, making earlier probing possible.
o SATA devices can be hot inserted/removed and devices will be created/
removed in /dev accordingly.
NOTE: only supported on controllers that has this feature:
Promise and Silicon Image for now.
On other controllers the usual atacontrol detach/attach dance is
still needed.
o Support for "atomic" composite ATA requests used for RAID.
o ATA RAID support has been rewritten and and now supports these
metadata formats:
"Adaptec HostRAID"
"Highpoint V2 RocketRAID"
"Highpoint V3 RocketRAID"
"Intel MatrixRAID"
"Integrated Technology Express"
"LSILogic V2 MegaRAID"
"LSILogic V3 MegaRAID"
"Promise FastTrak"
"Silicon Image Medley"
"FreeBSD PseudoRAID"
o Update the ioctl API to match new RAID levels etc.
o Update atacontrol to know about the new RAID levels etc
NOTE: you need to recompile atacontrol with the new sys/ata.h,
make world will take care of that.
NOTE2: that rebuild is done differently from the old system as
the rebuild is now done piggybacked on read requests to the
array, so atacontrol simply starts a background "dd" to rebuild
the array.
o The reinit code has been worked over to be much more robust.
o The timeout code has been overhauled for races.
o Support of new chipsets.
o Lots of fixes for bugs found while doing the modulerization and
reviewing the old code.
Missing or changed features from current ATA:
o atapi-cd no longer has support for ATAPI changers. Todays its
much cheaper and alot faster to copy those CD images to disk
and serve them from there. Besides they dont seem to be made
anymore, maybe for that exact reason.
o ATA RAID can only read metadata from all the above metadata formats,
not write all of them (Promise and Highpoint V2 so far). This means
that arrays can be picked up from the BIOS, but they cannot be
created from FreeBSD. There is more to it than just the missing
write metadata support, those formats are not unique to a given
controller like Promise and Highpoint formats, instead they exist
for several types, and even worse, some controllers can have
different formats and its impossible to tell which one.
The outcome is that we cannot reliably create the metadata of those
formats and be sure the controller BIOS will understand it.
However write support is needed to update/fail/rebuild the arrays
properly so it sits fairly high on the TODO list.
o So far atapicam is not supported with these changes. When/if this
will change is up to the maintainer of atapi-cam so go there for
questions.
HW donated by: Webveveriet AS
HW donated by: Frode Nordahl
HW donated by: Yahoo!
HW donated by: Sentex
Patience by: Vife and my boys (and even the cats)
Notes:
svn path=/head/; revision=144330
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Support should now cover all old and current products.
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svn path=/head/; revision=139546
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svn path=/head/; revision=139260
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svn path=/head/; revision=138617
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We still use "normal" mode, AHCI mode is in the works still.
HW donated by: Sentex
HW donated by: Yahoo!
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svn path=/head/; revision=138582
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HW donated by: Yahoo!
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svn path=/head/; revision=138555
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HW donated by: pil.dk
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svn path=/head/; revision=138553
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The AHCI part is not supported yet, but is in the works.
5.3 RC1 candidate
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svn path=/head/; revision=136324
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The interchannel locking for PC98 needed to be updated to match the
rest of the locking in ATA.
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svn path=/head/; revision=136198
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svn path=/head/; revision=136022
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svn path=/head/; revision=136021
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This made the requirements for bouncebuffers too big with PAE.
Cleanup the way size defines for transfers are implemented.
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svn path=/head/; revision=135034
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In places where we have long delays that doesn't depend on too accurate
timing, use ata_udelay() instead of DELAY() so we dont uselessly spin
the CPU if not nessesary;
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svn path=/head/; revision=134698
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svn path=/head/; revision=134690
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Add new nVidia controllers.
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svn path=/head/; revision=134687
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svn path=/head/; revision=134601
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svn path=/head/; revision=134377
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use tsleep instead of DELAY.
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svn path=/head/; revision=134265
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svn path=/head/; revision=133832
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