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* MFC r263957:Pyun YongHyeon2014-04-141-1/+1
* MFC r257490:Pyun YongHyeon2013-11-051-3/+3
* MFC: r251133Marius Strobl2013-06-091-7/+16
* MFC: r243857 (partial)Marius Strobl2013-03-091-4/+4
* MFC r247382:Pyun YongHyeon2013-03-061-0/+6
* MFC r228717:Pyun YongHyeon2012-01-091-2/+2
* MFC r227582:Pyun YongHyeon2012-01-042-67/+177
* MFC r226173, r227843, r227848 and r227908:Hans Petter Selasky2011-12-311-10/+2
* MFC r226478:Pyun YongHyeon2011-12-311-1/+1
* Correctly check MAC running status before disabling TX/RX MACs.Pyun YongHyeon2011-05-311-1/+1
* style(9)Pyun YongHyeon2011-05-241-16/+17
* When MTU is changed, check whether driver should be reinitialized orPyun YongHyeon2011-05-231-1/+4
* Add initial support for Marvell 88E8055/88E8075 Yukon Supreme.Pyun YongHyeon2011-05-232-4/+28
* Do not touch ASF related register for controllers that do not havePyun YongHyeon2011-05-232-17/+25
* Make sure to enable all clocks before accessing registers.Pyun YongHyeon2011-05-231-31/+23
* Do not configure RAM registers for controllers that do not havePyun YongHyeon2011-05-231-2/+8
* Rework store and forward configuration of TX MAC FIFO. Basically itPyun YongHyeon2011-05-231-23/+10
* Do not blindly clear entire GPHY control register. It seems somePyun YongHyeon2011-05-231-2/+2
* When msk_detach() is called from msk_attach(), ifp may beGleb Smirnoff2011-04-251-1/+2
* Do a sweep of the tree replacing calls to pci_find_extcap() with calls toJohn Baldwin2011-03-231-2/+2
* Introduce signed and unsigned version of CTLTYPE_QUAD, renamingMatthew D Fleming2011-01-191-3/+3
* Fix a few more SYSCTL_PROC() that were missing a CTLFLAG type specifier.Matthew D Fleming2011-01-191-1/+1
* Fix endianness bug introduced in r205091.Pyun YongHyeon2010-12-311-1/+1
* o Flesh out the generic IEEE 802.3 annex 31B full duplex flow controlMarius Strobl2010-11-141-5/+7
* Fix typos.Rebecca Cran2010-11-091-9/+9
* Convert the PHY drivers to honor the mii_flags passed down and convertMarius Strobl2010-10-151-11/+10
* Catch up to rename of the constant for the Master Data Parity Error bit inJohn Baldwin2010-09-091-2/+2
* When VLAN hardware tagging is disabled, make sure to disable VLANPyun YongHyeon2010-05-041-1/+2
* Make sure to check whether driver is running before processingPyun YongHyeon2010-05-041-9/+6
* Drop driver lock before exiting from interrupt handler.Pyun YongHyeon2010-05-041-0/+1
* Add basic support for Marvell 88E8059 Yukon Optima.Pyun YongHyeon2010-04-302-3/+23
* Disable non-ASF packet flushing on Yukon Extreme as vendor's driverPyun YongHyeon2010-04-302-0/+7
* Both RX_GMF_LP_THR and RX_GMF_UP_THR must be 16 bits register. IfPyun YongHyeon2010-04-302-4/+4
* With r206844, CSUM_TCP is also set for CSUM_TSO case. ModifyPyun YongHyeon2010-04-191-24/+24
* Partial revert r204545.Pyun YongHyeon2010-04-071-1/+4
* It seems PCI_OUR_REG_[1-5] registers are not mapped on PCIPyun YongHyeon2010-03-141-10/+10
* Implement Rx checksum offloading for Yukon EC, Yukon Ultra,Pyun YongHyeon2010-03-122-47/+204
* Remove taskqueue based interrupt handling. After r204541 msk(4)Pyun YongHyeon2010-03-022-155/+26
* Implement rudimentary interrupt moderation with programmablePyun YongHyeon2010-03-012-20/+23
* Make sure to enable flow-control only if established link isPyun YongHyeon2010-03-011-14/+11
* Properly sync status LEs after processing.Pyun YongHyeon2010-03-011-9/+2
* Remove trailing white spaces.Pyun YongHyeon2010-02-261-4/+4
* Allocate single MSI message. msk(4) used to allocate 2 MSI messagesPyun YongHyeon2010-02-262-46/+15
* Don't hardcod register offset to set PCIe max read request size.Pyun YongHyeon2010-02-262-29/+20
* Optimize inserting LE for TX checksum computation. Controller doesPyun YongHyeon2010-02-262-10/+17
* Add TSO support on VLANs. Controller requires VLAN hardware taggingPyun YongHyeon2010-02-261-6/+11
* Reuse the configured LE for VLAN if new LE was created for TSO.Pyun YongHyeon2010-02-261-1/+1
* Correct inversed programming of ethernet hardware address onPyun YongHyeon2010-02-201-10/+16
* Yukon Ultra2 has 126MHz clock.Pyun YongHyeon2010-01-221-1/+1
* s/Mhz/MHz/gPyun YongHyeon2010-01-221-8/+8
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