| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | MFC r257334, r257336, r257337, r257338, r257341, r257342, r257343, r257370, | Ian Lepore | 2014-05-14 | 7 | -7/+7 |
| * | MFC: r260889, r260890, r260911: | Warner Losh | 2014-03-01 | 1 | -0/+32 |
| * | MFC r258779,r258780,r258787,r258822: | Eitan Adler | 2014-02-04 | 3 | -5/+27 |
| * | Add some missing AR934x register definitions. | Adrian Chadd | 2013-10-09 | 2 | -0/+45 |
| * | Fix interrupt handling from the APB periperals (ie, UART) - it | Adrian Chadd | 2013-10-09 | 1 | -0/+3 |
| * | Fix the AR933x CPU UART support by using the correct clock when calculating | Adrian Chadd | 2013-09-21 | 1 | -2/+8 |
| * | Remove the hardcoded limit for the number of gpio_pins that can be used. | Luiz Otavio O Souza | 2013-09-06 | 2 | -2/+10 |
| * | Fix an off-by-one bug in ar71xx_gpio and bcm2835_gpio which makes the last | Luiz Otavio O Souza | 2013-09-06 | 1 | -1/+1 |
| * | Fix the leakage of dma tags on if_arge. The leak occur when arge_start() | Luiz Otavio O Souza | 2013-09-06 | 1 | -0/+26 |
| * | Prevent the full restart cycle every time arge_start() is called. Only | Luiz Otavio O Souza | 2013-08-29 | 1 | -1/+2 |
| * | Make ar71xx_spi attach the next free unit of spibus and not only spibus0. | Luiz Otavio O Souza | 2013-08-28 | 1 | -1/+1 |
| * | Some vendors store the mac addresses of arge(4) as a literal sring in the | Sean Bruno | 2013-08-23 | 1 | -4/+17 |
| * | Add a missing break. | Adrian Chadd | 2013-08-12 | 1 | -0/+1 |
| * | Implement some initial AR934x support routines. | Adrian Chadd | 2013-07-21 | 4 | -0/+394 |
| * | Teach the GPIO code about the AR934x GPIO register and pin counts. | Adrian Chadd | 2013-07-21 | 1 | -2/+17 |
| * | Use the UART frequency when programming the UART clock. | Adrian Chadd | 2013-07-21 | 4 | -4/+4 |
| * | Initialise the watchdog and UART frequencies. | Adrian Chadd | 2013-07-21 | 4 | -0/+12 |
| * | Add two new CPU specific definitions - the watchdog clock frequency and | Adrian Chadd | 2013-07-21 | 1 | -1/+5 |
| * | Import the initial SoC register definitions for the AR934x MIPS74k SoC. | Adrian Chadd | 2013-07-08 | 1 | -0/+156 |
| * | Add AR9341, AR9342, AR9344 SoC types. | Adrian Chadd | 2013-07-08 | 1 | -0/+3 |
| * | Add the AR933x SoC GPIO pin count limitation. | Adrian Chadd | 2013-05-02 | 1 | -0/+5 |
| * | Fix undefined behaviour in several gpio_pin_setflags() routines (under | Dimitry Andric | 2013-04-13 | 1 | -2/+2 |
| * | Implement USB device reset and poweron. | Adrian Chadd | 2013-04-05 | 1 | -35/+6 |
| * | Fix AR933x USB support - this needs the same controller initialisation | Adrian Chadd | 2013-04-05 | 1 | -0/+2 |
| * | Implement the AR933x ethernet support. | Adrian Chadd | 2013-04-05 | 3 | -1/+24 |
| * | Implement the AR933x interrupt driven UART code. | Adrian Chadd | 2013-04-05 | 1 | -46/+103 |
| * | AR9330/AR9331 also needs to ACK the APB interrupt register, same as | Adrian Chadd | 2013-04-05 | 1 | -0/+2 |
| * | * Add AR9330/AR9331 to the soc identifier enum; | Adrian Chadd | 2013-04-05 | 2 | -1/+5 |
| * | Implement AR933x polled IO uart bus code. | Adrian Chadd | 2013-04-04 | 1 | -316/+112 |
| * | AR933x CPU device improvements: | Adrian Chadd | 2013-03-30 | 1 | -68/+93 |
| * | AR933x UART updates: | Adrian Chadd | 2013-03-30 | 1 | -11/+8 |
| * | For the AR933x UART, the serial clock is not the AHB clock, it's the | Adrian Chadd | 2013-03-29 | 2 | -2/+2 |
| * | * Fix clock register definitions | Adrian Chadd | 2013-03-29 | 1 | -2/+5 |
| * | Print out the platform reference frequency. | Adrian Chadd | 2013-03-29 | 1 | -2/+2 |
| * | Tie in the AR933x support into -HEAD. | Adrian Chadd | 2013-03-28 | 2 | -3/+19 |
| * | Bring over the initial, CPU-only UART support for the AR933x SoC. | Adrian Chadd | 2013-03-28 | 4 | -0/+1081 |
| * | Fix the AR933x platform device start/stop code. | Adrian Chadd | 2013-03-28 | 1 | -10/+4 |
| * | Commit initial (unfinished!) support for the AR933x series of embedded | Adrian Chadd | 2013-03-27 | 4 | -0/+468 |
| * | Add the reference clock for each supported chip. | Adrian Chadd | 2013-03-27 | 4 | -0/+9 |
| * | Mips Atheros AR71XX: make PCI base slot configurable through hints. | Monthadar Al Jaberi | 2013-01-06 | 1 | -2/+15 |
| * | Mechanically substitute flags from historic mbuf allocator with | Gleb Smirnoff | 2012-12-05 | 1 | -2/+2 |
| * | Make MIPS24k PMC optional on "hwpmc_mips24k." | Adrian Chadd | 2012-11-17 | 1 | -1/+1 |
| * | Migrate the AR71xx UART (an 8250 derivative) to hide behind uart_ar71xx. | Adrian Chadd | 2012-11-17 | 1 | -2/+2 |
| * | Ensure that BAR(0) is set for the PCI slot before the ath(4) PCI registers | Adrian Chadd | 2012-08-26 | 1 | -0/+4 |
| * | The GPIO drivers were initialising their mutexes with type of | Rui Paulo | 2012-08-17 | 1 | -2/+1 |
| * | Disable setting the MII port speed. | Adrian Chadd | 2012-05-04 | 1 | -0/+12 |
| * | Fix a totally bone-headed, last minute bounds check snafu that somehow | Adrian Chadd | 2012-05-03 | 1 | -3/+5 |
| * | Implement PLL configuration override support, similar to what openwrt | Adrian Chadd | 2012-05-02 | 2 | -3/+57 |
| * | Allow the MII mode to be overridden via 'hint.arge.X.miimode'. | Adrian Chadd | 2012-05-02 | 2 | -0/+25 |
| * | Add a missing newline. | Adrian Chadd | 2012-05-02 | 1 | -0/+1 |
