From d08c35566595bf29a50e39cbaaf32188ede63f7a Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sun, 4 Nov 2018 14:42:21 +0000 Subject: Vendor import of lld release_70 branch r346007: https://llvm.org/svn/llvm-project/lld/branches/release_70@346007 --- ELF/Writer.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ELF/Writer.cpp') diff --git a/ELF/Writer.cpp b/ELF/Writer.cpp index 88a2d5c71266..09a17049ffb4 100644 --- a/ELF/Writer.cpp +++ b/ELF/Writer.cpp @@ -874,7 +874,7 @@ void PhdrEntry::add(OutputSection *Sec) { // need these symbols, since IRELATIVE relocs are resolved through GOT // and PLT. For details, see http://www.airs.com/blog/archives/403. template void Writer::addRelIpltSymbols() { - if (needsInterpSection()) + if (Config->Relocatable || needsInterpSection()) return; StringRef S = Config->IsRela ? "__rela_iplt_start" : "__rel_iplt_start"; addOptionalRegular(S, InX::RelaIplt, 0, STV_HIDDEN, STB_WEAK); -- cgit v1.2.3