From 0499b37cea9ca98acfe36368e521ad36b7783f2d Mon Sep 17 00:00:00 2001 From: Warner Losh Date: Tue, 7 Mar 2017 20:53:26 +0000 Subject: Bring in snapshot of the MdePkg from Tianocore's EDK2 project at git hash 7babb4372e6a34cbbc54249b25056272a5a9924c From 2017-Mar-03. EDK2 is Intel's BSD Licensed UEFI implementation. We'll be bringing in various routines from there rather than reimplementing them from scratch for libefivar and the EFI boot loader. The upstream repo has ^M ending on everything (sometimes multiple times!), so the following script was run prior to import so changes we have to do don't first include changing every line: % find . -type f | xargs -n 1 sed -I.BAK -e `printf "s/\r//g"` % find . -name \*.BAK | xargs rm Also, only the MdePkg was brought in (it's 17MB, while the entire repo is 250MB). It's almost completely certain nothing else will be used, but if it is, it can be brough in along side MdePkg in the future. Obtained from: https://github.com/tianocore/edk2.git --- MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.S | 36 ++++++++++++++++++++++ MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm | 37 ++++++++++++++++++++++ MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S | 43 ++++++++++++++++++++++++++ MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm | 44 +++++++++++++++++++++++++++ 4 files changed, 160 insertions(+) create mode 100644 MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.S create mode 100644 MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm create mode 100644 MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S create mode 100644 MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm (limited to 'MdePkg/Library/BaseCpuLib/Arm') diff --git a/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.S b/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.S new file mode 100644 index 000000000000..738f73356a3f --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# CpuFlushTlb() for ARM +# +# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#------------------------------------------------------------------------------ + +.text +.p2align 2 +GCC_ASM_EXPORT(CpuFlushTlb) + +#/** +# Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU. +# +# Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU. +# +#**/ +#VOID +#EFIAPI +#CpuFlushTlb ( +# VOID +# )# +# +ASM_PFX(CpuFlushTlb): + mov r0,#0 + mcr p15,0,r0,c8,c5,0 // Invalidate all the unlocked entried in TLB + bx LR diff --git a/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm b/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm new file mode 100644 index 000000000000..037d221a794d --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/Arm/CpuFlushTlb.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ +; +; CpuFlushTlb() for ARM +; +; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +;------------------------------------------------------------------------------ + + EXPORT CpuFlushTlb + AREA cpu_flush_tlb, CODE, READONLY + +;/** +; Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU. +; +; Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU. +; +;**/ +;VOID +;EFIAPI +;CpuFlushTlb ( +; VOID +; ); +; +CpuFlushTlb + MOV r0,#0 + MCR p15,0,r0,c8,c5,0 ;Invalidate all the unlocked entried in TLB + BX LR + + END diff --git a/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S b/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S new file mode 100644 index 000000000000..b84c80862350 --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S @@ -0,0 +1,43 @@ +#------------------------------------------------------------------------------ +# +# CpuSleep() for ARMv7 +# +# ARMv6 versions was: +# MOV r0,#0 +# MCR p15,0,r0,c7,c0,4 ;Wait for Interrupt instruction +# +# But this is a no-op on ARMv7 +# +# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#------------------------------------------------------------------------------ + +.text +.p2align 2 +GCC_ASM_EXPORT(CpuSleep) + +#/** +# Places the CPU in a sleep state until an interrupt is received. +# +# Places the CPU in a sleep state until an interrupt is received. If interrupts +# are disabled prior to calling this function, then the CPU will be placed in a +# sleep state indefinitely. +# +#**/ +#VOID +#EFIAPI +#CpuSleep ( +# VOID +# ); +# +ASM_PFX(CpuSleep): + wfi + bx lr diff --git a/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm b/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm new file mode 100644 index 000000000000..399b80f720fb --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------ +; +; CpuSleep() for ARMv7 +; +; ARMv6 versions was: +; MOV r0,#0 +; MCR p15,0,r0,c7,c0,4 ;Wait for Interrupt instruction +; +; But this is a no-op on ARMv7 +; +; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+; Portions copyright (c) 2008 - 2011, Apple Inc. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +;------------------------------------------------------------------------------ + + EXPORT CpuSleep + AREA cpu_sleep, CODE, READONLY + +;/** +; Places the CPU in a sleep state until an interrupt is received. +; +; Places the CPU in a sleep state until an interrupt is received. If interrupts +; are disabled prior to calling this function, then the CPU will be placed in a +; sleep state indefinitely. +; +;**/ +;VOID +;EFIAPI +;CpuSleep ( +; VOID +; ); +; +CpuSleep + WFI + BX LR + + END -- cgit v1.3