From b61ab53cb789e568acbb2952fbead20ab853a696 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Thu, 3 May 2012 16:50:55 +0000 Subject: Vendor import of llvm release_31 branch r155985: http://llvm.org/svn/llvm-project/llvm/branches/release_31@155985 --- lib/Target/Hexagon/HexagonMCInstLower.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'lib/Target/Hexagon/HexagonMCInstLower.cpp') diff --git a/lib/Target/Hexagon/HexagonMCInstLower.cpp b/lib/Target/Hexagon/HexagonMCInstLower.cpp index 70bddcc76a59..fbb331bdd8bf 100644 --- a/lib/Target/Hexagon/HexagonMCInstLower.cpp +++ b/lib/Target/Hexagon/HexagonMCInstLower.cpp @@ -49,7 +49,7 @@ void llvm::HexagonLowerToMC(const MachineInstr* MI, MCInst& MCI, switch (MO.getType()) { default: MI->dump(); - llvm_unreachable("unknown operand type"); + assert(0 && "unknown operand type"); case MachineOperand::MO_Register: // Ignore all implicit register operands. if (MO.isImplicit()) continue; -- cgit v1.3