From 344a3780b2e33f6ca763666c380202b18aab72a3 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Thu, 29 Jul 2021 22:15:26 +0200 Subject: Vendor import of llvm-project main 88e66fa60ae5, the last commit before the upstream release/13.x branch was created. --- llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp') diff --git a/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp b/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp index f8f99b7e87f2..e3c4e86d203b 100644 --- a/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp +++ b/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp @@ -484,6 +484,16 @@ public: MachineOperand &DefMO = MI.getOperand(I); assert(DefMO.isReg() && DefMO.isDef() && "Expected Reg Def operand"); Register Reg = DefMO.getReg(); + assert(DefMO.isTied() && "Def is expected to be tied"); + // We skipped undef uses and did not spill them, so we should not + // proceed with defs here. + if (MI.getOperand(MI.findTiedOperandIdx(I)).isUndef()) { + if (AllowGCPtrInCSR) { + NewIndices.push_back(NewMI->getNumOperands()); + MIB.addReg(Reg, RegState::Define); + } + continue; + } if (!AllowGCPtrInCSR) { assert(is_contained(RegsToSpill, Reg)); RegsToReload.push_back(Reg); -- cgit v1.2.3